Abstract: Technologies are generally described for operating and manufacturing optomechanical accelerometers. In some examples, an optomechanical accelerometer device is described that uses a cavity resonant displacement sensor based on a zipper photonic crystal nano-cavity to measure the displacement of an integrated test mass generated by acceleration applied to the chip. The cavity-resonant sensor may be fully integrated on-chip and exhibit an enhanced displacement resolution due to its strong optomechanical coupling. The accelerometer structure may be fabricated in a silicon nitride thin film and constitute a rectangular test mass flexibly suspended on high aspect ratio inorganic nitride nano-tethers under high tensile stress. By increasing the mechanical Q-factors through adjustment of tether width and tether length, the noise-equivalent acceleration (NEA) may be reduced, while maintaining a large operation bandwidth. The mechanical Q-factor may be improved with thinner (e.g., <1 micron) and longer tethers (e.

Abstract: An inertial sensor having a body with an excitation coil and a first sensing coil extending along a first axis. A suspended mass includes a magnetic-field concentrator, in a position corresponding to the excitation coil, and configured for displacing by inertia in a plane along the first axis. A supply and sensing circuit is electrically coupled to the excitation coil and to the first sensing coil, and is configured for generating a time-variable flow of electric current that flows in the excitation coil so as to generate a magnetic field that interacts with the magnetic-field concentrator to induce a voltage/current in the sensing coil. The integrated circuit is configured for measuring a value of the voltage/current induced in the first sensing coil so as to detect a quantity associated to the displacement of the suspended mass along the first axis.

Abstract: Systems and methods are disclosed herein for determining rotation. A gyroscope includes a drive frame and a base, the drive frame springedly coupled to the base. The gyroscope includes a drive structure configured for causing a drive frame to oscillate along a first axis. The gyroscope includes a sense mass springedly coupled to the drive frame. The gyroscope includes a sense mass sense structure configured for measuring a displacement of the sense mass along a second axis orthogonal to the first axis. The gyroscope includes measurement circuitry configured for determining a velocity of the drive frame, extracting a Coriolis component from the measured displacement, and determining, based on the determined velocity and extracted Coriolis component, a rotation rate of the gyroscope.

Abstract: Embodiments of the invention come up from a guide and support member within a device for testing electronic components, which guide and support member can be moved into a feeding position and into a testing position, the guide and support member with a base body for accommodating an electronic component to be tested, with at least one support for supporting contact springs of the electronic component to be tested, and with at least one stopper that stops the movement of the electronic component to be tested at one of its contact springs once the electronic component to be tested is in an exact position. According to the invention, the at least one support comprises a ceramic material, wherein the stopper is anchored in the base body.

Abstract: A test instrument probe that encompasses the dual alternate action of a point or a clamp-grip within the same probe. This probe has approximately the same dimensions as a conventional probe, and allows either the point or clamp action to be used without the necessity of removing the probe from the hand. This alternate action requires only using a thumb and finger pressure to change from a point to a clamp or the clamp to a point. One embodiment allows a clamp jaw opening of up to a nominal ¼ inch that is usually sufficient to grip onto the leads of an electronic component such as resistor, capacitor or integrated circuit pin. The probes are also designed so that when not in use, the two probes can be connected together by a snap-in action that minimizes the potential loss of a probe and importantly allows the points to become safely enclosed to minimize a sharp point hazard.

Abstract: A probe needle includes a head, a tail and a body connected between the head and the tail and provided with a first flat section curvedly extending from the head towards the tail for providing sufficient deformation when the tail is pressed on a device under test, and a second flat section neighbored to the first flat section for supporting the probe needle in between upper and lower dies. When the probe needles are used in a probe module, the probe needles can be arranged with a pitch same as that of the conventional probe needles even though the probe needles are formed from posts having a relatively greater diameter than that of the posts for making the conventional probe needles, such that the probe needles may have enhanced current withstanding capacity and prolonged lifespan.

Abstract: A shunt resistance type current sensor includes a bus bar, a circuit board disposed to oppose the bus bar, a shunt resistance part in the bus bar, connection terminals which electrically connect the bus bar and the circuit board, and a voltage detector which is mounted on the circuit board and detects a voltage applied to the bus bar to detect a magnitude of current to be measured flowing through the bus bar. The connection terminal is formed integrally with the bus bar as an extending piece extended from an edge part of the bus bar, an area of the connection terminal reduced in its plate thickness than that of the bus bar is set in a range from a tip side thereof, and the tip side of the connection terminal penetrates the circuit board and connects with the circuit board.

Abstract: For decades, a mainstay of electrical and electronic testing has been the conventional use of the multi-meter that used a pair of probes to connect the Device Under Test to the meter. This often proves inadequate for present-day testing because more than one simultaneous or alternate reading or the connection of another testing tool and the reading of its effect on the DUT is often required. The Dual-Function Switch and Lead set (DFSL) of the present invention provides a switch and lead set interfacing two multi-meters, or one multi-meter and one test device or instrument with the DUT, while using the traditional and convenient pair of probes and a simple finger movement on the DFSL. The DFSL facilitates these tests, their safety and integrity, and reduces the time of many test procedures.

Abstract: A DC-DC converter includes a directly coupled inductor with coil elements and power-switching phases. Each phase includes a high-side and low-side switch, where the high-side switch couples a voltage source to a coil element and the low-side switch couples the coil element to a ground voltage. Each switch is configured to be alternately activated and no two switches are activated at the same time. A current sensor for the DC-DC converter includes a single current amplifier having inputs and an output. The output provides a current sensing signal. The current sensor also includes a single RC network coupled to one of the power-switching phases and a first input of the current amplifier. The current sensor also includes a resistive ladder. The ladder includes, for each of the other power-switching phases, a resistor coupled in parallel to the RC network resistor and to a second input of the current amplifier.

Abstract: A current sensing module and a power conversion apparatus and an electronic apparatus using the same are provided. The current sensing module is suitable for detecting a first load current flowing through a first load. The current sensing module includes a sampling stage circuit and an output stage circuit. The sampling stage circuit couples across the first load and selectively exchanges coupling nodes between the sampling stage circuit and the first load by a multiplex switching means, so as to sample the first load current flowing along a first direction or a second direction, and thus generate a sampling signal. The output stage circuit is coupled to the sampling stage circuit and switches coupling nodes between the output stage circuit and the output terminal of the sampling stage circuit, so as to generate a current indication signal indicating the magnitude of the first load current according to the sampling signal.

Abstract: A magnetometer that senses low level currents flowing in a conductor or wire includes two cores with excitation windings on each core that are connected in series but which are wound in opposite orientations. A periodic alternating current drives the windings. Since the windings are in series but oppositely wound, the current flowing through the windings will produce equal but opposite flux flows in the two cores. A sensing winding is wound around both cores to provide flux profiles. A digital processor analyzes a quiescent flux profile, which is generated when no sense current is flowing through the dual cores, and distorted flux profiles when sense currents are flowing through the dual cores to measure a sense current flowing through the dual cores.

Abstract: A sensor includes a core, first and second windings, an integrating amplifier circuit and a DC balancing circuit. The first and second windings are wrapped around the core. The integrating amplifier circuit has a first input coupled to the first winding, and an output operably coupled to the second winding. The DC balancing circuit is operably coupled between the output of the integrating amplifier circuit and the first input of the integrating amplifier circuit.

Abstract: A method and a control system for a multiphase-phase inverter system, the control system comprising an electric current detection circuit and a processor, wherein each phase of an electrical cycle is separated into a plurality of sections, inputs from the electric current detection circuit are received, each input indicating a measured phase current, and a phase current is calculated in each section, wherein the phase current calculation in at least one of the sections is determined from a changing ratio of the value of the phase current calculated from the measured values of the other phase currents in the multiphase system and the measured value of the phase.

Abstract: Systems and methods for verifying a reference voltage within a battery pack are disclosed. In one example, an assessment of a reference voltage is made via a band-gap voltage of a microcontroller. The system and method may be particularly useful determining whether or not the reference voltage has drifted from a desired voltage.

Abstract: The invention relates to an apparatus and method for tracking energy consumption. An energy tracking system comprises at least one switching element, at least one inductor and a control block to keep the output voltage at a pre-selected level. The switching elements are configured to apply the source of energy to the inductors. The control block compares the output voltage of the energy tracking system to a reference value and controls the switching of the switched elements in order to transfer energy for the primary voltage into a secondary voltage at the output of the energy tracking system. The electronic device further comprises an ON-time and OFF-time generator and an accumulator wherein the control block is coupled to receive a signal from the ON-time and OFF-time generator and generates switching signals for the at least one switching element in the form of ON-time pulses with a constant width ON-time.

Abstract: A method for improving the usability of photovoltaic installations (PV installations) by taking account of shading information of adjacent PV installations for forecasting the power output by a relevant PV installation is provided. In particular, cloud movements and cloud shapes are taken into account. This improves the accuracy of the forecast. Here, it is advantageous that short-term forecasts in relation to e.g. the next 15 minutes are possible and a substitute energy source can be activated accordingly, in good time, prior to a dip in the power output by the PV installation. The invention can be used e.g. in the field of renewable energies, PV installations or smart grids.

Abstract: Power consumed by a digital circuit that contains multiple sub-circuits may be computed. Each sub-circuit may include more than one transistor and have at least one input. A signal transition sensor may be connected to an input to each sub-circuit and configured to count the number of signal transitions at the input or to time the duration of a signal transition at the input. Weight information may be stored that is indicative of an amount of power that is being consumed by each sub-circuit based on a count that is counted by or a time duration that is timed by each signal transition sensor that is connected to an input of that sub-circuit. The amount of power being consumed by the digital circuit may be computed based on a count that is counted by or a time duration that is timed by each signal transition sensor and the weight information.

Abstract: An energy monitoring system for retrofitting a miniature circuit breaker load center 100, comprises energy monitoring module 120, data bus 140, and main controller 110. The energy monitoring module attaches onto miniature circuit breaker 130, forming a combined shape that fits into a branch circuit space of the load center. An attachment connector 320 electrically and mechanically connects the energy monitoring module to load terminal 318 of the circuit breaker. An energy sensing circuit 314 in the energy monitoring module senses energy passing through the circuit breaker and transmits data signals over the data bus to the main controller. The main controller has a shape that fits into another branch circuit space of the load center. The main controller wirelessly transmits to a network, information based on the data signals received on the data bus. The main controller provides operating power via the data bus, to the energy monitoring module.

Abstract: A spectrum analyzer contains a number of improvements that adapt it to common commercial uses. The spectrum analyzer is capable of automatically wirelessly receiving and synchronizing frequency spectrum data collected from multiple remote spectrum analyzers with respect to frequency, time and location. A selector function is used to create composite frequency data sets from multiple frequency data sets while allowing retroactive identification and examination of the original frequency data. An improved non-linear graphical display of the frequency spectrum data is created by automatically expanding the resolution of frequency axis for frequency ranges having signals of interest and contracting the resolution of the frequency axis of frequency ranges having no signals of interest.

Abstract: A semiconductor device testing apparatus 1A includes a tester unit 16 that generates an operational pulse signal, an optical sensor 10 that outputs a detection signal as a response to the operational pulse signal, a pulse generator 17 that generates a reference signal containing a plurality of harmonics for the operational pulse signal in synchronization with the operational pulse signal, a spectrum analyzer 13 that receives the detection signal and acquires a phase and amplitude of the detection signal at a detection frequency, a spectrum analyzer 14 that receives the reference signal and acquires a phase of the reference signal at a detection frequency, and an analysis control unit 18 that acquires a time waveform of the detection signal based on the phase and the amplitude of the detection signal acquired by the spectrum analyzer 13 and the phase of the reference signal acquired by the spectrum analyzer 14.

Abstract: System and method for calibrating a step attenuator. N attenuation measurements of a step attenuator may be received, where the step attenuator includes M series-connected attenuation sections. Each attenuation section may be configured to switchably provide a respective level of attenuation, where N is greater than M, and where the step attenuator may be modeled via M+1 coefficients, including a coefficient for a no-attenuation state and respective coefficients for the attenuation sections. Values of the coefficients may be determined via least squares estimation using the N attenuation measurements, thereby calibrating the step attenuator.

Abstract: A method and apparatus is disclosed herein for measuring radio-frequency energy. In one embodiment, the apparatus comprises one or more antennas, a wideband radio frequency detector (e.g., a logarithmic amplifier (LogAmp)) coupled to the one or more antennas to measure ambient RF energy, wherein the wideband radio frequency detector has an analog output indicative of RF input power received by the one or more antennas, and an analog-to-digital converter coupled to the wideband radio frequency detector to convert the analog output to a digital value, the digital value being applied to a calibration function, to provide a number representing RF energy.

Abstract: Systems and methods for sensing environmental changes using electromagnetic interference (EMI) signals are disclosed herein. An EMI monitoring system may be used to monitor an EMI signal of one or more light sources provided over a power line, e.g., in a home or building. The received EMI energy at the power line may be analyzed to detect variations in the EMI signature indicative of environmental changes occurring in the proximity of the light sources. Environmental changes that may be sensed include, but are not limited to, proximity, touch, motion, and temperature change.

Abstract: A system and method for performing radiation source analysis on a device under test (DUT) uses discrete Fourier transform on measured field components values at different sampling locations away from the DUT to derive field component values at locations on the DUT. The results of the discrete Fourier transform are multiplied by a complex phase adjustment term as a function of distance from the sampling locations to the DUT to translate the measured field component values back to the locations on the surface of the DUT.

Abstract: A method for impedance measurement using chirp signal injection is provided. The method includes injecting at least one chirp signal into the three-phase AC system, and collecting at least one response to the at least one chirp signal. The method further includes transferring the at least one response from abc coordinates to dq coordinates. At least one impedance is calculated based on the at least one response to the at least one chirp signal.

Abstract: A positioning apparatus includes a support structure, a positioning structure, and a fixture for retaining MEMS devices. A shaft spans between the support structure and the positioning structure, and is configured to rotate about a first axis relative to the support structure in order to rotate the positioning structure and the fixture about the first axis. The positioning structure includes a pair of beams spaced apart by a third beam. Another shaft spans between the pair of beams and is configured to rotate about a second axis relative to the positioning structure in order to rotate the fixture about the second axis. Methodology entails installing the positioning apparatus into a chamber, orienting the fixture into various positions, and obtaining output signals from the MEMS devices to determine functionality of the MEMS devices.

Abstract: A diagnostic circuit arranged to measure an electrical characteristic in a drive circuit of a coil of a fluid injector and compare the measured electrical characteristic with another electrical characteristic to determine whether a PN junction is working to discharge electrical energy in the coil of the fluid injector, in particular a selective catalytic reduction dosing injector.

Abstract: A motor driving apparatus includes: a voltage detecting unit for detecting a voltage of each direct-current capacitor; a current detecting unit for detecting each current inputted to or outputted from each inverter; an commanding unit for outputting a power-converting command to each inverter after each direct-current capacitor is charged and supply of direct-current power to a converter is shut off; a current integrating unit for integrating each current detected while the power-converting command is outputted; a capacity estimating unit for calculating the estimated capacity of each direct-current capacitor based on the current integration value and the voltage of the direct-current capacitor after supply of direct-current power to the converter is shut off and before the power-converting command is outputted; and a life determining unit for determining a life of each direct-current capacitor based on the initial capacity value and the estimated capacity of the direct-current capacitor.

Abstract: An apparatus and methods are provided that more accurately detect the onset of thermal runaway in a device and timely control it. According to one embodiment, changes in stand-by current and temperature of a transistor device are measured and are used to be compared to some thresholds to trigger the device to respond before the onset thermal runaway. According to another embodiment, stand-by current is measured and is compared to some thresholds to trigger the device to respond before the onset thermal runaway.

Abstract: A micro-electro-mechanical device includes a movable structure. The movable structure includes a test structure changing an electrical characteristic, if the movable structure is damaged. Further, a method for detecting damaging of a micro-electro-mechanical device includes detecting a change of an electrical characteristic of the electrical test structure of the movable structure. Further, the method includes indicating a deviation of the electrical characteristic from a predefined tolerable range.

Abstract: Disclosed herein is an apparatus that includes a first internal-potential generation circuit that generates a first internal potential from a power supply potential and that outputs the first internal potential to a first node, and an internal-potential force circuit that includes a first switch element provided between the first node and a second external terminal. The internal-potential force circuit causes the first switch element to enter into an off-state when the test signal supplied to a third external terminal is activated and a potential level of a first external terminal is a first level, and causes the first switch element to enter into an on-state when the test signal supplied to the third external terminal is activated and the potential level of the first external terminal is a second level different from the first level.

Abstract: A semiconductor device inspection system includes a laser light source for generating light to be irradiated a semiconductor device, an optical sensor for detecting the light reflected by the semiconductor device and outputting the detection signal, a tester unit for applying a operating signal to the semiconductor device, an electricity measurement unit to which the detection signal is input, an electricity measurement unit to which the detection signal and the operating signal are selectively input, and a switching unit having a detection signal terminal and a operating signal terminal. The switching unit inputs the detection signal to the electricity measurement unit by connecting a connection section to the detection signal terminal and inputs the operating signal by connecting the connection section to the operating signal terminal.

Abstract: Electrical components may be soldered to a printed circuit. The printed circuit may have an edge with an opening. Printed circuit contacts in the opening may be configured to form electrical connections with mating contacts on a flexible printed circuit or other external structure. A tester may test the electrical components by conveying signals through the contacts. Following testing, the external structure may be removed from the opening. The opening may then be filled with dielectric to isolate the printed circuit contacts. A printed circuit may have traces that extend under a ground on a surface of the printed circuit, may have edge test points formed from contacts that are cut in half when removing portions of the printed circuit, or may have through-mold vias that are formed through encapsulant over the electrical components.

Abstract: A test system (and methodology) suitable for testing a resonant sensor circuit configured to drive a sensor resonator with a negative resistance. Example embodiments include a test sensor resonator setup configured to simulate a sensor resonator with a selectable loss factor Rs, and includes, in a single-ended configuration, a first oscillator signal source that generates a first oscillation signal, coupled to a first controllable resistor that provides a controlled resistance R1 that simulates a selectable sensor resonator loss factor Rs, which together generate a first oscillation voltage signal based on the controlled resistance R1. A DUT resonant sensor circuit is coupled to receive the first oscillation voltage signal at a first input, and generate a negative resistance ?Ra that substantially counterbalances the resistance R1 (corresponding to sustained oscillation).

Abstract: In the systems and methods, an identifier is generated for a printed circuit board (PCB), chips are connected to the PCB, and corresponding sets of programmable bits on the chips are programmed to match specific sections of the identifier. Due to the generation of the identifier and the programming of the corresponding sets of programmable bits on the chips to match specific sections of the identifier, the validity of the chips can be verified at any time during product life. For example, for each chip, its set of programmable bits can be read and, then, a determination can be made as to whether that set of programmable bits is indeed programmed to match a specific section of the identifier. Operation of the PCB can be allowed when all the chips are determined to be valid and prohibited when any of the chips are determined to be invalid (e.g., previously used).

Abstract: Disclosed is in particular a device (2) for stressing an integrated circuit (1) including an electronic chip (10) mounted in a housing (12), the device including a source (20) of thermal stress. The device (2) also includes a thermally conductive coupling member (22), designed to be thermally coupled to the source (20) of thermal stress during the stressing operation. The coupling member (22) includes an end (220) whose geometry is suitable for being introduced into an aperture with a predefined geometry, to be made in the housing (12) of the integrated circuit (1) so as to thermally couple a coupling face (222) of this end (220) with a face (102) of the electronic chip (10).

Abstract: A method of testing a semiconductor device using the test equipment includes loading an undivided printed circuit board (PCB) including unit PCBs in a test equipment. A semiconductor device is mounted in each of the unit PCBs. Product information of the undivided PCB loaded in the test equipment is confirmed. The undivided PCB whose product information has been confirmed is electrically connected to one of a plurality of main testers of the test equipment. Each of the main testers includes a main test interface directly connected to a cloud server in which firmwares for various kinds of tests are stored. The product information of the undivided PCB is transmitted to the main tester electrically connected to the undivided PCB. The main tester to which the product information has been transmitted performs a main test of the undivided PCB using the product information. The undivided PCB on which the main test has been performed by the main tester is unloaded from the test equipment.

Abstract: A testing method includes measuring an electrical parameter of a device under test (DUT) and a corresponding temperature of the DUT one or more times, determining coefficients in a pre-constructed model based on a plurality of measured values of the electrical parameter and corresponding measured temperatures to characterize a relationship of the electrical parameter to the temperature, and determining a quality of the DUT based on the model and a limit value of the electrical parameter at a specified temperature. The model is pre-constructed to characterize the relationship of the electrical parameter to the temperature with the coefficients that are DUT-dependent variables.

Abstract: In an embodiment, a testing apparatus includes an air mixing chamber, a docking unit, and a DUT (device under test) test execution unit. The air mixing chamber includes a first air inlet operable to receive a first air flow, a second air inlet operable to receive a second air flow, and an air outlet operable to output a mixed air flow. The docking unit is operable to receive and to securely hold a DUT (device under test) receptacle including an electrical interface, an air flow interface, and a DUT coupled to the electrical interface. The DUT receptacle is configured to enclose and hold inside the DUT. The docking unit is operable to couple to the electrical interface and to the air flow interface. The docking unit is operable to receive and to send the mixed air flow to the DUT receptacle. A DUT test execution unit is coupled to the docking unit. The DUT test execution unit is operable to perform a test on the DUT that is inside of the DUT receptacle.

Abstract: A detection circuit for a relative error voltage, including: a first current mirror, a second current mirror, a third current mirror, a current sink and resistors R1, R2 and R3. A voltage signal to be detected V1 accesses the first current mirror via the resistor R2, and a voltage signal to be detected V2 accesses the second current mirror via the resistor R3; a mirrored-end of the first current mirror is connected to the current sink, and a mirroring-end thereof is connected to a mirrored-end of the third current mirror; a mirrored-end of the second current mirror is connected to the current sink, and a mirroring-end thereof is connected to a mirroring-end of the third current mirror; the current sink is grounded via the resistor R1; and the third current mirror converts double-ended currents of the first and the second current mirrors to single-ended currents to output as voltage signals.

Abstract: A package includes a semiconductor chip. The semiconductor chip includes a test pad, and a plurality of microbump pads, wherein each microbump pad of the plurality of microbump pads is electrically connected to the test pad. The package further includes a substrate; and a plurality of microbumps configured to electrically connect the semiconductor chip to the substrate, wherein each microbump of the plurality of microbumps is electrically connected to a corresponding microbump pad of the plurality of microbump pads. The package further includes a package substrate, wherein the package substrate comprises a bump pad, wherein an area of the bump pad is greater than a combined area of the test pad and the plurality of microbump pads. The package further includes a bump configured to electrically connect the substrate to the package substrate.

Abstract: A test handler comprises an orientation changing device having a device holder for holding electronic devices, the device holder having a vertical rotary axis. A conveying device is operative to convey electronic devices to the device holder, and a rotary motor connected to the device holder is operative to rotate the device holder about the vertical rotary axis to change an orientation of the electronic device held on it. A rotary turret of the test handler has a plurality of pick heads arranged on the rotary turret, and each pick head is configured to pick up electronic devices from the device holder.

Abstract: In an embodiment, a method includes causing a test floor system to insert a DUT (device under test) into a DUT receptacle. This is performed in a manner that couples the DUT to an electrical interface of the DUT receptacle and that encloses the DUT inside the DUT receptacle to facilitate testing of the DUT. Also, the method includes causing the test floor system to transport the DUT receptacle that encloses the DUT to a tester of the test floor system and to insert the DUT receptacle into a DUT testing module of the tester. Further, the method includes causing the test floor system to determine identification information of the DUT. Furthermore, the method includes, based on the identification information, sending a test routine to the DUT testing module to perform on the DUT.

Abstract: Disclosed herein is a device that includes a plurality of first terminals; a first circuit including a plurality of first nodes; a buffer circuit including a plurality of second nodes connected to the first terminals through a plurality of first interconnection lines, respectively, and a plurality of third nodes connected to the first nodes of the first circuit through a plurality of second interconnection lines, respectively; and a second circuit configured to perform at least one of first and second operations. The first operation is such that a plurality of first signals, that appear respectively on the first interconnection lines, are outputted in series, and the second operation is such that a plurality of second signals, that are supplied in series, are transferred respectively to the first interconnection lines.

Abstract: A semiconductor device measurement apparatus 1A includes a tester 2 that generates an operational pulse signal to be input to a semiconductor device 3, a light source 5 that generates light, a light branch optical system 6 that irradiates the semiconductor device with the light, a light detector 7 that detects reflected light obtained by the semiconductor device 3 reflecting the light, and outputs a detection signal, an analog signal amplifier 8 that amplifies the detection signal and outputs an amplified signal, and an analysis apparatus 10 that analyzes an operation of the semiconductor device 3 based on the amplified signal and a predetermined correction value, wherein the predetermined correction value is obtained based on a signal obtained by the analog signal amplifier 8 amplifying a signal corresponding to a harmonic of a fundamental frequency of the operational pulse signal.

Abstract: A system and method for testing a wireless data packet signal transceiver device under test (DUT) by using DUT control circuitry separate from a tester to access and execute test program instructions for controlling the DUT during testing with the tester. The test program instructions can be provided previously and stored for subsequent access and execution under control of the tester or an external control source, such a personal computer. Alternatively, the test program instructions can be provided by the tester or external control source immediately prior to testing, such as when beginning testing of a DUT with new or different performance characteristics or requirements. Accordingly, specialized testing of different DUTs while accounting for differences among various chipsets employed by the DUTs can be performed in coordination with a standard tester configuration without need for reconfiguring or reprogramming of the tester.

Abstract: A method for performing scan testing using a scan chain having a plurality of storage elements is described. During a capture phase, each storage element of the scan chain stores data from a first data input of the storage element synchronously to a clock signal. And during a shift phase, a scan pattern is shifted into the scan chain in which each storage element stores data from a second data input of the storage element asynchronously with to the clock signal.

Abstract: In certain embodiments, an integrated circuit has scan-test circuitry that performs scan testing on circuitry under scan test (CUST) within the IC, where the scan-test circuitry is susceptible to a defect. In order to enable the defect to be corrected after it occurs, the scan-test circuitry includes a set of programmable circuitry connected to provide a signal to other circuitry (e.g., a scan chain) within the scan-test circuitry, where the set of programmable circuitry includes one or more configurable memory cells connected to control the programming of the set of programmable circuitry. The memory cell(s) can be configured to program the set of programmable circuitry to enable the scan testing to be performed without modification. The memory cell(s) can also be configured to program the set of programmable circuitry to modify the scan testing to correct the defect in the scan-test circuitry.

Abstract: A latch circuit having a master latch and a slave latch includes a device used to short either the master latch or the slave latch. The device includes a transistor and a global control used to assert a signal, and is positioned to short an inverter of the master latch or the slave latch. When the signal is asserted by the global control, the inverter is shorted such that the output value of the inverter is the same as the input value. The assertion of the signal is facilitated by another device connected to the master latch and the slave latch that includes the global control and a transistor.

Abstract: A test architecture accesses IP core test wrappers within an IC using a Link Instruction Register (LIR). An IEEE P1500 standard is in development for providing test access to these individual cores via a test structure called a wrapper. The wrapper resides at the boundary of the core and provides a way to test the core and the interconnections between cores. —The test architecture enables each of the plural wrappers in the IC, including wrappers in cores embedded within other cores, with separate enable signals.