Abstract: Software configuration management for a software system under development includes receiving a change to the software system under development from a first user, determining a merit score for the first user, wherein the merit score is calculated according to success of prior changes received from the first user, and comparing, using a processor, the merit score for the first user with a merit threshold for the software system under development. The change is accepted for inclusion in a build of the software system under development responsive to determining that the merit score for the first user complies with the merit threshold.

Abstract: Disclosed herein is a system and method that determine whether activity pertaining to a software development project violates at least one development rule whose associated severity level exceeds a predetermined threshold.

Abstract: Embodiments of the present invention provide a method, system and computer program product for melding mediation and adaptation modules of a service component architecture (SCA) system. A method for melding mediation and adaptation modules of an SCA system can include selecting each of a mediation module and an adaptation module in an integrated development tool executing in memory by a processor of a computer and loading respectively different descriptor files for each of the mediation module and the adaptation module. The method further can include combining descriptors from the different descriptor files into a single descriptor file for a melded module. Finally, the method can include modifying names and wiring descriptors in the single descriptor file for the melded module to account for a combination of the mediation component and the adaptation component in the melded component.

Abstract: Validating and maintaining respective validated status of software applications and manufacturing systems and processes is presented herein. A validation system can comprise a mapping component configured to extract, from a set of requirement specification documents, individual requirement specifications; and extract, from a set of test function documents, test steps. Further, the validation system can comprise a tracing component configured to generate a trace matrix associating the individual requirement specifications with respective test steps of the test functions or respective documents of the set of requirement specification documents. In an aspect, the validation system can enforce, via respective object linking and embedding control extensions, respective roles of authors, reviewers, and approvers of the set of requirement specification documents. In another aspect, the validation system can electronically receive and insert test results in the set of test function documents.

Abstract: Aspects include extensible change set conflict and merge gap detection in a record-based configuration management system. A method includes instructing the record-based configuration management system to create a change set. The method also includes instructing the record-based configuration management system to add one or more version mappings to a given configuration and to indicate specific concepts which should be flagged as not participating in a process that includes change set conflict and merge gap detection. The record-based configuration management system is instructed to deliver the change set to a requestor.

Abstract: Dynamic ontological working sets support the automatic identification of a context-specific working set (or a visualization of a tree in a hierarchical data structure) that displays those tree nodes that are most relevant to an identified context. Pre-defined rules are used to determine a level of relevance to be applied when identifying the context-specific working set. Context-specific working sets may be displayed automatically when identified.

Abstract: A method of improving software architecture by untangling undesired code level dependencies is provided herein. The method includes the following stages: generating an abstract representation of a computer code in a form of a code model; recording manipulations to the computer code applied by a user to the code model; calculating a series of refactorings in the computer code that represents the recorded manipulation; and carrying out the refactorings within the computer code. Specifically, some of the refactorings include separating low level software elements on the method level in response to the user manipulations of the model.

Abstract: In an example, a method for speculative scalarization may include receiving, by a first processor, vector code. The method may include determining, during compilation of the vector code, whether at least one instruction of the plurality of instructions is a speculatively uniform instruction. The method may include generating, during complication of the vector code, uniformity detection code for the at least one speculatively uniform instruction. The uniformity detection code, when executed, may be configured to determine whether the at least one speculatively uniform instruction is uniform during runtime. The method may include generating, during complication of the vector code, scalar code by scalarizing the at least one speculatively uniform instruction. The scalar code may be configured to be compiled for execution by the first processor, a scalar processor, a scalar processing unit of the vector processor, or a vector pipeline of the vector processor.

Abstract: Method, apparatus, and program for performing a comparison operation. An apparatus includes execution resources to execute a first instruction. In response to the first instruction, the execution resources store a result of a comparison between valid data elements of a first and second operand.

Abstract: A processor core in an instruction block-based microarchitecture includes a control unit that allocates instructions into an instruction window in bulk by fetching blocks of instructions and associated resources including control bits and operands at once. Such bulk allocation supports increased efficiency in processor core operations by enabling consistent management and policy implementation across all the instructions in the block during execution. For example, when an instruction block branches back on itself, it may be reused in a refresh process rather than being re-fetched from the instruction cache. As all of the resources for that instruction block are in one place, the instructions can remain in place and only valid bits need to be cleared. Bulk allocation also facilitates operand sharing by instructions in a block and explicit messaging among instructions.

Abstract: A method, system, and computer program product of utilizing branch prediction logic in a system that processes instructions that include a branch are described. The method includes identifying the branch as conventionally predictable or not conventionally predictable, and based on the branch being identified as not conventionally predictable according to the identifying, either foregoing branch prediction and reallocating, using a processor, the branch prediction logic to another thread of the instructions or performing, using the processor, the branch prediction and speculative execution of one or more of the instructions following the branch to obtain prediction information. Based on the performing the branch prediction and the speculative execution, the method also includes verifying a match between a branch end according to the instructions and a branch end according to the branch prediction prior to providing the prediction information to a second processor processing the instructions.

Abstract: The invention is a method and system for providing trace data in a pipelined data processor. Aspects of the invention include providing a trace pipeline in parallel to the execution pipeline, providing trace information on whether conditional instructions complete or not, providing trace information on the interrupt status of the processor, replacing instructions in the processor with functionally equivalent instructions that also produce trace information and modifying the scheduling of instructions in the processor based on the occupancy of a trace output buffer.

Abstract: Embodiments of the present invention provide systems and methods for mapping the architected state of one or more threads to a set of distributed physical register files to enable independent execution of one or more threads in a multiple slice processor. In one embodiment, a system is disclosed including a plurality of dispatch queues which receive instructions from one or more threads and an even number of parallel execution slices, each parallel execution slice containing a register file. A routing network directs an output from the dispatch queues to the parallel execution slices and the parallel execution slices independently execute the one or more threads.

Abstract: In an embodiment, a method is provided. The method includes managing user-level threads on a first instruction sequencer in response to executing user-level instructions on a second instruction sequencer that is under control of an application level program. A first user-level thread is run on the second instruction sequencer and contains one or more user level instructions. A first user level instruction has at least 1) a field that makes reference to one or more instruction sequencers or 2) implicitly references with a pointer to code that specifically addresses one or more instruction sequencers when the code is executed.

Abstract: An OS bootloader or other code or data requested by firmware during a boot sequence is cached inside ROM or another non-volatile memory location. Firmware uses this cached version, instead of retrieving the OS bootloader or other code from a peripheral location to speed up the boot sequence. Embodiments also create additional room in the cache based on pre-determined rules if the cache doesn't already include the requested data and doesn't have enough room to store the requested data at the time of the firmware's read request.

Abstract: Systems and methods are disclosed for managing program code in a computing device, such as an embedded system. In a computing device, a non-volatile flash memory stores program code comprising initialization code designed to be executed a single time during device booting, main program code separate from the initialization code, and main code loader code designed to direct a controller of the computing device to load the main program code from the flash memory to the RAM when executed by the controller. The controller loads the initialization code and the main code loader code to first and second adjacent portions of the RAM, respectively, and loads the main program code, separately from the initialization code, to a third portion of the RAM at least partially overlapping the first portion but not overlapping the second portion, thereby at least partially overwriting the initialization code.

Abstract: A secure storage device includes a physical key input device, a secure memory and a controller. The controller arbitrates access by a host to securely configure the device based on the device's mode of operation. The controller determines whether the device is in a configuration-ready mode based on information within the device. Only when the device is in the configuration-ready mode, the device may be configured by the host. When a device is in a non-configuration-ready mode, the device is prevented from being configured by the host, but the device can be set to the configuration-ready mode, for example, by nullifying configuration data (e.g., PINs), by creating new encryption key(s), and by setting the mode to the configuration-ready mode. A null PIN is unusable to unlock the device after being locked. A new encryption key is unusable to decrypt data previously stored in the device, making such data unrecoverable.

Abstract: A method of providing support for power-management of a device. The method may include gathering contextual data from a sensor communicatively coupled to a sensor controller. The method may also include receiving power-management data including an operational state of a main processor of the device. The method may also include modifying the operation of the device based on the contextual data and the power management data.

Abstract: The described technology is directed towards an object-oriented programming (OOP) system and library that maps conventional object-oriented concepts such as class hierarchies, interfaces, and static methods and properties onto a prototypal object system such as JavaScript®. Various functions of the OOP system are called to create a class-like structure that is instantiated into an object instance upon request. The OOP system allows for use of a wrapper pattern to wrap selected objects with added functionality such as validation and tracing, and to provide enhanced functionality with respect to properties, such as to call a function associated with a property when the property's value changes, and/or to lazily generate property values only when accessed.

Abstract: A system and computer program product provide processor initialization in different platform environments via a single code set. The system includes: in response to detecting a power-on operation of the processor, a microcontroller retrieving hardware procedures (HWP) framework code from a storage and triggering execution of the HWP framework code on the processor. The execution of the HWP framework code generates a HWP framework that comprises a plurality of application programming interfaces (APIs) which govern how all communication processes involving hardware procedures can be accomplished. The system further includes the microcontroller performing one or more initialization procedures by communicating one or more attribute data via the HWP framework to configure the processor for operation within a specific platform environment in which the processor is to be operated.

Abstract: A method provides processor initialization in different platform environments via a single code set. The method includes: in response to detecting a power-on operation of the processor, a microcontroller retrieving hardware procedures (HWP) framework code from a storage and triggering execution of the HWP framework code on the processor. The execution of the HWP framework code generates a HWP framework that comprises a plurality of application programming interfaces (APIs) which govern how all communication processes involving hardware procedures can be accomplished. The method further includes performing one or more initialization procedures by communicating one or more attribute data via the HWP framework to configure the processor for operation within a specific platform environment in which the processor is to be operated. The HWP framework includes standard interfaces and enables direct updates to hardware procedures without requiring a new flash code or a firmware patch.

Abstract: A system for Demand Oriented User Interface Framework may include a display screen displaying a user interface, a memory, an input, and a processor to detect information of a data item displaying in a window for an application program in the user interface. The processor, in response to the input detecting the information of the data item, may control the display screen to display one or more additional windows. The one or more additional windows may provide one or more functions outside of functionality for the application program to process the data item. The one or more functions may be ranked and displayed in the user interface for user selection.

Abstract: The present disclosure provides a method for generating task flows for an application. Actions of a user of an application are monitored and key actions carried out by the user in the application are logged. Based on a determined flow of key actions a task flow is formed. A representation of the task flow is stored for access by other users. The stored representation of a task flow is associated with a goal to be achieved in the application. Representations of task flows may be stored locally to the application for access by other users of the application or remotely stored with an indication of the application to which a task flow relates to provide access to the task flows by users of other applications. A list of stored representations of task flows may be provided to enable selection of a task flow.

Abstract: A device may communicate with a first server to obtain first information regarding a plurality of groups of entities. The device may process the first information to generate a data model relating to attributes of the plurality of groups of entities. The device may communicate with a second server to obtain second information regarding a particular group of entities. The device may process the second information using the data model to identify a set of recommendations relating to the particular group of entities. The device may select a particular recommendation, of the set of recommendations, based on a corresponding score of the set of scores. The device may generate a user interface including the particular recommendation based on selecting the particular recommendation. The device may communicate with a plurality of client devices to cause the particular recommendation to be provided for display.

Abstract: Techniques are disclosed relating to data transformation for distributing workloads between processors or cores within a processor. In various embodiments, a first processing element receives a set of bytecode. The set of bytecode specifies a set of tasks and a first data structure that specifies data to be operated on during performance of the set of tasks. The first data structure is stored non-contiguously in memory of the computer system. In response to determining to offload the set of tasks to a second processing element of the computer system, the first processing element generates a second data structure that specifies the data. The second data structure is stored contiguously in memory of the computer system. The first processing element provides the second data structure to the second processing element for performance of the set of tasks.

Abstract: A technology is described for a software container recommendation service. An example method may include collecting utilization metrics for an application hosted on a computing instance. The utilization metrics may be a measure of computing resources used by the application. The utilization metrics may be analyzed to determine a level of computing resources for the computing instance used by the application. A software container configuration for the application may be determined based at least in part on the utilization metrics when analysis of the utilization metrics indicates an underutilization of computing resources by the application. The specifications of the software container configuration may then be provided to a customer.

Abstract: Embodiments relate to systems, devices, and computer-implemented methods for provisioning, managing, and executing tasks. An agent program can be configured to receive task data, determine a task definition corresponding to the task data, retrieve the task definition, and execute the task definition using the task data. The agent program can additionally be configured to set a time-to-live for the task definition and locally delete the task definition when the time-to-live elapses.

Abstract: A method and architecture for using dynamically loaded plugins is described herein. The dynamically loaded plugin architecture comprises a parent context and a plugin repository. The parent context may define one or more reusable software components. The plugin repository may store one or more plugins. When a plugin is loaded, a child context may be created dynamically. The child context is associated with the plugin and inherits the one or more reusable software components from the parent context.

Abstract: The subject matter of this specification can be implemented in, among other things, a method that includes identifying an assigned device that is assigned to a guest operating system of a virtual machine. The method includes transmitting, to the guest operating system, a request indicating a failover event. The failover event involves a switch from the assigned device to an emulated device. The assigned device and the emulated device share a backend physical device. The method further includes receiving an acknowledgement message from the guest operating system that it is ready to switch from the assigned device to the emulated device. The method further includes preventing access to the assigned device by the guest operating system. The method further includes associating a device driver of a hypervisor with the backend physical device and providing a notification to the guest operating system that the emulated device is available for use.

Abstract: Using hardware transactional memory (HTM) for queue operations includes invoking a first operation for a concurrent linked queue of an interpretive program using a Just-In-Time (JIT) compiler of a virtual machine, wherein the first operation does not use HTM, determining whether a data processing system executing the virtual machine supports HTM, and responsive to determining that the data processing system does support HTM, detecting, using a processor and within the first operation, a call to a second operation that is that is configured, in byte code, to return an indication of a failed hardware transaction. Responsive to detecting the second operation, a machine code implementation of the first operation that includes a machine code implementation of the second operation is generated. The machine code implementation of the second operation is an implementation of the first operation that does use HTM.

Abstract: A coherent computer system includes a memory shared by a processor and a coherent accelerator device (CAD). The memory includes a work queue directly accessible by the accelerator functional unit (AFU) within the CAD and by the processor utilizing the same effective addresses. The coherent computer system provides accelerator functionality when the accelerator is unavailable by implementing a virtual AFU to carryout accelerator function while the AFU is unavailable. The virtual AFU is a functional logical equivalent of the AFU and is coherent with the processor. When the AFU becomes available, the virtual AFU is disabled and the accelerator is enabled to allow the accelerator to carryout accelerator functionality.

Abstract: A graphical data type inference transparently transforms a legacy text-oriented command line interface (CLI) into a graphic-oriented or graphic-aware CLI (G-CLI). A user fuses graphical references with the legacy scripting language by identifying objects using syntax familiar to the user. The objects are presented to the user via a user interface and may be queried/selected by the user. The user issues commands on the selected objects by referencing the graphical selection in a command line within a shell. The graphical selection in short hand is translated into a form operable by a server or computer. The syntax of the legacy command language is extended with operators that operate entirely within the G-CLI. Consequently, the command line used in the shell has an existing operation set, as well as new graphic-based operations.

Abstract: Various embodiments are generally directed to the provision and use of various hardware and software components of a computing device to monitor the state of layered virtual machine (VM) monitoring software components. An apparatus includes a first processor element; and logic to receive an indication that a first timer has reached an end of a first period of time, monitor execution of a VMM (virtual machine monitor) watcher by a second processor element, determine whether the second processor element completes execution of the VMM watcher to verify integrity of a VMM before a second timer reaches an end of a second period of time, and transmit an indication of the determination to a computing device. Other embodiments are described and claimed.

Abstract: Techniques are disclosed relating to enabling virtual machines to access data on a physical recording medium. In one embodiment, a computing system provides a logical address space for a storage device to an allocation agent that is executable to allocate the logical address space to a plurality of virtual machines having access to the storage device. In such an embodiment, the logical address space is larger than a physical address space of the storage device. The computing system may then process a storage request from one of the plurality of virtual machines. In some embodiments, the allocation agent is a hypervisor executing on the computing system. In some embodiments, the computing system tracks utilizations of the storage device by the plurality of virtual machines, and based on the utilizations, enforces a quality of service level associated with one or more of the plurality of virtual machines.

Abstract: An approach for remotely managing virtual network appliances (VNAs) includes establishing a management virtual circuit (VC) to a hypervisor running on a server at a customer premise, remotely deploying one or more VNAs to the hypervisor, and remotely managing the hypervisor and the one or more VNAs via the management VC.

Abstract: A first computing device is provided for virtual disk provisioning. The first computing device includes one or more processors configured to provide a first virtual disk and a first publish differencing disk. The one or more processors are further configured to obtain meta data associated with the first virtual disk and the first publish differencing disk, and generate one or more first differencing patches and one or more second differencing patches. The first and second differencing patches having a binary format. The first computing device further includes a storage configured to store data associated with the first virtual disk and the first publish differencing disk, the meta data, and the one or more first and second differencing patches. The first computing device further includes a communication subsystem configured to provide one or more first and second differencing patches to provision the virtual machine associated with a second computing device.

Abstract: A virtualization manager receives a request to change a current number of virtual functions associated with at least one physical interface that provides virtual function capability to a new number of virtual functions. Responsive to determining that that new number of virtual functions is not greater than a maximum number of virtual functions for the at least one physical interface, configuring, by the virtualization manager, the at least one physical interface with the new number.

Abstract: A computer-implemented method includes receiving a definition of a source guest memory area for utilization by a virtual machine on a source system, wherein the source system includes a source trusted firmware and a source hypervisor. The method restricts write access to the source guest memory area of the virtual machine. The method receives repeatedly a source guest memory page location, content for each of a plurality of source guest memory pages, and an integrity value for each of a plurality of source guest memory page locations. The method receives a global integrity value for integrity values associated with the plurality of source guest memory page locations, wherein a latest integrity values for each of the plurality of source guest memory page locations is utilized. Subsequent to verifying the global integrity value, the method initializes the virtual machine on the source hypervisor.

Abstract: A hypervisor determines a target CPU usage of a virtual machine in responding to a request to allocate guest memory. Then the hypervisor receives a first balloon request for a first quantity of guest memory to be ballooned. The hypervisor transmits a second balloon request for guest memory to be allocated to a balloon of the virtual machine, where the second quantity of guest memory is a first fraction of the first quantity of guest memory. The hypervisor then determines a first quantity of time that the virtual machine took to execute the second balloon request and waits a second quantity of time. The hypervisor then transmits a third balloon request for a third quantity of guest memory to be allocated to the balloon of the virtual machine, where the third quantity of guest memory is a second fraction of the first quantity of guest memory.

Abstract: A computer-implemented method includes receiving a definition of a source guest memory area for utilization by a virtual machine on a source system, wherein the source system includes a source trusted firmware and a source hypervisor. The method restricts write access to the source guest memory area of the virtual machine. The method receives repeatedly a source guest memory page location, content for each of a plurality of source guest memory pages, and an integrity value for each of a plurality of source guest memory page locations. The method receives a global integrity value for integrity values associated with the plurality of source guest memory page locations, wherein a latest integrity values for each of the plurality of source guest memory page locations is utilized. Subsequent to verifying the global integrity value, the method initializes the virtual machine on the source hypervisor.

Abstract: A system and method for instantiation of a virtual machine (VM) in a datacenter includes providing a network appliance in a location for listening to management information traffic. Indices are created for data center images in the network appliance. VM instantiation requests are intercepted in the network appliance. Locations from which blocks for the VM should be fetched based upon network cost are determined. VM image blocks are populated from the locations.

Abstract: Transactional execution of a transaction beginning instruction initiates prefetching, by a CPU, of discontiguous storage locations specified by a list. The list includes entries specifying addresses and may also include corresponding metadata. The list may be specified by levels of indirection. Fetching of corresponding discontiguous cache lines is initiated while in TX mode. Additional instructions in the transaction may be executed and use the prefetched cache lines.

Abstract: A method and an apparatus that partition a total number of threads to concurrently execute executable codes compiled from a single source for target processing units in response to an API (Application Programming Interface) request from an application running in a host processing unit are described. The total number of threads is based on a multi-dimensional value for a global thread number specified in the API. The target processing units include GPUs (Graphics Processing Unit) and CPUs (Central Processing Unit). Thread group sizes for the target processing units are determined to partition the total number of threads according to either a dimension for a data parallel task associated with the executable codes or a dimension for a multi-dimensional value for a local thread group number. The executable codes are loaded to be executed in thread groups with the determined thread group sizes concurrently in the target processing units.

Abstract: Systems and method for the management of migrations of virtual machine instances are provided. A migration manager monitors the resource usage of a virtual machine instance over time in order to create a migration profile. When migration of a virtual machine instance is desired, the migration manager schedules the migration to occur such that the migration conforms to the migration profile.

Abstract: Embodiments of the present invention disclose a virtual machine migration management method, where the method includes: calculating, according to migration parameters of a to-be-migrated virtual machine, migration duration time required for migrating the to-be-migrated virtual machine from a source computing node to a destination computing node, where the migration parameters include an allocated memory size, a memory change rate, and migration network bandwidth that are of the to-be-migrated virtual machine; separately acquiring current available migration duration time of the source computing node and current available migration duration time of the destination computing node; and, if neither the current available migration duration time of the source computing node nor the current available migration duration time of the destination computing node is less than the migration duration time, determining to migrate the to-be-migrated virtual machine from the source computing node to the destination computing n

Abstract: A runtime environment allows a scheduler in a process of a computer system to be finalized prior to the process completing. The runtime environment causes execution contexts that are inducted into the scheduler and execution contexts created by the scheduler to be tracked. The runtime environment finalizes the scheduler subsequent to each inducted execution context exiting the scheduler and each created execution context being retired by the scheduler.

Abstract: In one embodiment, the present invention includes a multicore processor with first and second groups of cores. The second group can be of a different instruction set architecture (ISA) than the first group or of the same ISA set but having different power and performance support level, and is transparent to an operating system (OS). The processor further includes a migration unit that handles migration requests for a number of different scenarios and causes a context switch to dynamically migrate a process from the second core to a first core of the first group. This dynamic hardware-based context switch can be transparent to the OS. Other embodiments are described and claimed.

Abstract: Techniques are disclosed for allocation of resources under the control of resource managers and the choice and coordination of resource acquisition protocols to communicate with these resource managers. The resource managers may be distributed and heterogeneous. For example, a technique for use by a service provider for allocating one or more resources from multiple resources associated with multiple resource managers based on at least one service agreement offer from a service client comprises the following steps/operations. At least one service agreement offer is obtained. A resource allocation is automatically determined based on the obtained service agreement offer.

Abstract: Methods and systems for optimization of task execution are disclosed. A definition of a task is received. A plurality of parameter values for execution of the task are selected based on an execution history for a plurality of prior tasks performed for a plurality of clients. The plurality of parameter values are selected to optimize one or more execution constraints for the execution of the task. The execution of the task is initiated using one or more computing resources configured with the selected parameter values.

Abstract: Methods and systems for routing control blocks is provided. One method includes receiving a control block from a computing device at an adapter having a plurality of hardware engines for processing control blocks, where the control blocks are to read data, write data, obtain status for an input/output request and perform a management task; evaluating the control block by the adapter to determine that the control block is a continuation control block for data transfer using more than one control block; is a direct route control block for a specific hardware engine; or is for a management task; routing the control block to a same hardware engine when the control block is a continuation control block; and routing the control block to a master hardware engine from among the plurality of hardware engines, when the control block is for the management task.