Abstract: A variable checkpoint mechanism in a streams manager checkpoints a streaming application based on periodic time periods for checkpoints. The variable checkpoint mechanism can take a checkpoint early before a periodic time period ends or late after the periodic time period ends based on predicted size of one or more tuple windows in the streaming application. The time for taking the checkpoint can be selected based on multiple checkpoint timing criteria, which include storage requirement for the checkpoint and predicted backpressure in the flow graph. In this manner the checkpoint timing of the variable checkpoint mechanism can be adjusted real-time to minimize the negative impact of checkpointing on the performance of the streaming application.

Abstract: When the mirrored point in time copy fails, at that point in time all the data for making the source and target of the point in time copy consistent is available on secondary volumes at disaster recovery site. The data for the source and target of the failed point in time copy are logically and physically equal at that point in time. This logical relationship can be maintained, and protected against ongoing physical updates to the affected tracks on the source secondary volume, by first reading the affected tracks from the source secondary volume, copying the data to the target secondary volume, and then writing the updated track to the source secondary volume.

Abstract: The data storage system according to certain aspects can implement table level database restore. Table level database restore may refer to restoring a database table and its related data without restoring the entire database. The data storage system may use table metadata index to implement table level restore. A table metadata index may be created for each table, e.g., during a backup of the database. The table metadata index for a table can include any type of information for restoring the table and its related data. Some examples of the type of information included in the table metadata index include the following: container for the table, table backup location, system data, table index, table relationships, etc. Table metadata index can make the restoring of tables fast and efficient by packaging information that can be used to restore a table and its related data in an easily accessible manner.

Abstract: A recording device 11 has a control unit 20 that executes multiple restore processes. The control unit restores a backbone system based on a restore file stored in a USB memory UM if the recording device 11 is started with the USB memory UM already connected. The control unit initializes the backbone system based on an initialization file in the USB memory UM when the USB memory UM is newly connected while the recording device 11 is already running. The control unit creates a restore file to restore the backbone system, and saves the created restore file to the USB memory UM if an initialization file is not already stored in the USB memory UM.

Abstract: One or more techniques and/or systems are provided for multicast transport configuration, for multicast transport, and/or for fault policy implementation. In an example, a multicast component may receive a data copy request from an application to copy data to multiple destinations. A scheduler component may create a transport schedule specifying an order with which to facilitate data copy operations across transports, such as heterogeneous transports, to the destinations. A dispatcher component may apply application specified transport modifiers to the data copy operations (e.g., a modification to a quality of service for a transport). The dispatcher component may facilitate the data copy operations and provide operation result information to a policy agent. The policy agent may provide notifications of data copy operation statuses from the operation result information and/or may implement a fault policy (e.g., a retry on a different transport) for a data copy operation that experienced a fault.

Abstract: Technology described herein includes an arrangement whereby a hardware-based solution is implemented to enable mirroring of NVRAM data in a master server directly to NVRAM in a sleeper server. Both the master server and sleeper server implement a like motherboard unit, which is configured to implement the mirroring technology. That is, the roles of master and sleeper may be reversed. The master server includes a hardware module that monitors (but does not affect) NVRAM operations at the master server, and replicates those operations via a high speed communications link, such as a fiber optic link, to the sleeper server. The term “high speed communications link” refers to a link with at least 2.5 gigabit speed, and preferably at least 5 gigabit speed. The sleeper server is configured to, when in sleeper mode, suspend control of its own NVRAM module. Instead, the NVRAM module is controlled by a module that is configured to receive NVRAM operations via the fiber optic link, and apply those operations.

Abstract: In an approach for testing the operations of a host system during a host system migration, a terminal agent exchanges messages already exchanged between the current host system and a terminal with the new host system. A manual operation replay unit replays messages generated by manual operations among the messages sent to the current host system by the terminal. An automatic response unit automatically generates a response message for messages received from the new host system. The automatic response unit also generates screen data for a screen displayed on the terminal on the basis of messages received from the new host system. A comparison unit compares and evaluates screen data generated by the automatic response unit and screen data from a screen generated by the terminal on the basis of messages received from the current host system.

Abstract: Computer-implemented techniques are disclosed for verifying circuit designs using dynamic problem generation. A device under test (DUT) is modeled as part of a test bench where the test bench is a random process. A set of constraints is solved to generate stimuli for the DUT. Problem generation is repeated numerous times throughout a verification process with problems and sub-problems being generated and solved. When a problem is solved, the problem structure can be stored in a cache. The storage can be based on entropy of variables used in the problem. The problem storage cache can be searched for previously stored problems which match a current problem. By retrieving a problem structure from cache, the computational burden is reduced during verification. Problems can be multi-phase problems with storage and retrieval of problem structures based on the phase level. Caching can be accomplished using an information theoretic approach.

Abstract: A method and system are provided for implementing functional verification including generating and running constrained random irritator tests for a multiple processor system and for a processor core with multiple threads. Separate tests are generated, a main test for one thread, and an irritator test for each other thread in the configuration. The main test and each irritator test are saved and randomly mixed then combined together again, where the main thread is not forced to be generated with any particular irritator.

Abstract: A method and system for providing a self-test configuration in a device is disclosed. The method and system comprise providing a self-test mechanism in a kernel space of a memory and enabling a hook in a user space of the memory, wherein the hook is in communication with the self-test mechanism. The method and system also include running the self-test driver and utilizing the results.

Abstract: System and computer program product to perform an operation comprising generating, based on a first output generated by a first execution instance of a command, a first output file specifying a value of at least one performance metric, wherein the first output file is formatted according to a predefined format, comparing the value of the at least one performance metric in the first output file to a value of the performance metric in a second output file, the second output file having been generated based on a second output generated by a second execution instance of the command, and outputting for display an indication of a result of the comparison of the value of the at least one performance metric of the first output file to the value of the at least one performance metric of the second output file.

Abstract: An apparatuses includes a processor, a storage unit, and a communication unit to access the storage unit without intermediary of the processor and to access a second apparatus of the plurality of information processing apparatuses via a communication unit of the second apparatus. The communication unit of a first apparatus of the plurality of information processing apparatuses executes at least one of a process of storing redundant data which is generated by making redundant data stored in the storage unit of the first apparatus in the storage unit of the second apparatus via the communication unit of the second apparatus, and a process of acquiring redundant data which is generated by making redundant data stored in the storage unit of the second apparatus via the communication unit of the second apparatus, and storing the acquired data in the storage unit of the first apparatus.

Abstract: The present application relates to a flash memory controller and a method of operating thereof. A system bus interface is provided to interface with a system bus and a debug bus interface is provided to interface with a debug bus. A flash access control block is provided to perform storage I/O operations on a flash memory array. A debug control block is provided to monitor debug related information. The flash memory controller is configured to selectively operate in one or storage operating mode or debug operating mode. In the debug operating mode: the storage control block is configured to serve only read data access requests; and the debug control block is configured to store trace messages in an allocated part of the storage resources of the flash memory controller in response to trace events. The trace messages are generated on the basis of the monitored debug related information.

Abstract: Systems, methods are program products for simulating black box test results using information obtained from white box testing, including analyzing computer software (e.g., an application) to identify a potential vulnerability within the computer software application and a plurality of milestones associated with the potential vulnerability, where each of the milestones indicates a location within the computer software application, tracing a path from a first one of the milestones to an entry point into the computer software application, identifying an input to the entry point that would result in a control flow from the entry point and through each of the milestones, describing the potential vulnerability in a description indicating the entry point and the input, and presenting the description via a computer-controlled output medium.

Abstract: Application validation is performed based on object level hierarchy data associated with the application. An application is executed on a physical or emulated host device, and assembly code is generated for the executing application. The assembly code is analyzed to identify objects associated with the application, and to identify relationships between the objects. Based on the object and relationship data, an object level hierarchy is generated for the application. Validation of the application may be performed by comparing an object level hierarchy for a current version of the application to a previously generated hierarchy for a previous version of the application to identify differences between the two hierarchies.

Abstract: Provided are techniques for auto-generating Representational State Transfer (REST) services for quality assurance. One or more test cases and artifacts are received for a project. A test Representational State Transfer (REST) service is generated for the project using the one or more test cases and the artifacts. The test REST service is deployed on an application server for use in testing features of a REST service client application.

Abstract: The present invention relates to a system and method for linking a debugging message, and the system for linking a debugging message includes: a web development terminal for creating, if information which needs to be confirmed while developing a web program is input, a debugging message, outputting the debugging message on a debug window displayed in a predetermined area of a screen, and transmitting, if a magic number is input from a user through the debug window, a debugging message registration request signal including web development terminal identification information, the magic number and the debugging message to a service providing device; the service providing device for storing, if the debugging message registration request signal is received from the web development terminal, the debugging message.

Abstract: A stream of tuples is received to be processed by processing elements operating on one or more computer processors with each processing element having one or more stream operators. A breakpoint is identified for a stream operator that is configured to be triggered when time for processing of a tuple by the first stream operator is predicted to exceed a threshold time. A tuple is received at the stream operator having a set of attributes. A predicted time to process the tuple is determined based on the set of attributes. It is determined that the predicted time exceeds the threshold time. The breakpoint is triggered, in response to determining that the predicted time exceeds the threshold time, to pause processing of the tuple by the first stream operator.

Abstract: Methods and apparatus for debugging of remote systems are disclosed. An example apparatus includes an activator to establish a connection between a first computer system and a second computer system, a data fetcher to transfer values of a first set of data elements from the second computer system to the first computer system via the connection, an executor to execute a first software code on the first computer system using the transferred values of the first set of data elements after the connection is closed, and a debugger to debug the first software code on the first computer system after the executor executes the first software code on the first computer system.

Abstract: Embodiments of the present invention provide a system and method for a dynamic tracing framework for debugging in a virtualized environment. Embodiment of the present invention can include selecting a home node and a set of remote nodes to which apply a set of probes. Data collection is performed by a tracing agent of each node and the collection of data is shared across multiple software systems.

Abstract: Target device monitoring systems and methods are presented. In one embodiment, a host emulation target device control method includes receiving high level express interface direction to change a design element value. The design element values are associated with an operating target device. Design element values corresponding to the direction are created. The design element values are also forwarded to the operating target device in real time.

Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for generating stable location identifiers. One of the methods includes generating, for each relevant location in an existing file, a signature for the relevant location using at most a predetermined quantity of characters surrounding the relevant location; obtaining, for a first file that includes location information for the existing file, data that identify one or more locatable strings in the existing file and, for each locatable string, a corresponding location within the existing file; determining, for each particular location associated with a locatable string from the one or more locatable strings in the existing file, a respective corresponding signature; and generating the first file that includes, for each locatable string from the one or more locatable strings, the respective corresponding signature that uniquely identifies the relevant location on which the locatable string occurs in the existing file.

Abstract: A list of classes found in a core dump file is determined. One or more classes requested by a classloader is also determined. A set of one or more classes requested by the classloader that are found in the core dump file is then determined.

Abstract: A debugging system receives traceback data representing logging of a system error of a target system. An operating environment of the target system is replicated by creating a virtual machine (VM) having characteristics represented by the state data representing an operating state of the target system. An analysis is performed on the traceback data within the VM to simulate the system error.

Abstract: Debugging capabilities for software running in a cloud-computing environment are disclosed. Embodiments enable developers to debug any process running on a virtual machine hosted in a remote data center, virtual network, or cloud services environment over the Internet through a secured connection without manually installing and configuring a remote debugging monitor. A debugger module is dynamically installed and configured on a remote machine over the Internet through an extension model. In another embodiment, a debugger module is dynamically installed and configured on a remote machine over the Internet through a remote scripting approach. A secure connection is automatically established between debugger application components and debugging components on the remote machine.

Abstract: An example system may include a first device connected over respective communications interfaces to a plurality of second devices. The first device may establish respective remote terminals between the first device and one or more second devices. Establishing the respective remote terminals may indicate that the devices are in an online state. The first device may periodically update respective heartbeat files on the second devices. A respective second device may detect that a pre-determined time period has elapsed since the heartbeat file was updated. The respective second device may determine that a respective remote terminal between the first device and the respective second device has been terminated. Determining that the remote terminal has been terminated may indicate that the device is in an offline state. The respective second device may reset itself so as to transition the respective second device from the offline state to the online state.

Abstract: A computing system receives user input of a root for a web application component in a HTML (hypertext markup language) tree structure for the web application component and receives user input of sub-elements for the web application component based on the location of the root for the web application component. The computing system generates a component model for the web application component based on the location of the root and the sub-elements and provides the component model to a test tool to enable the test tool to test the web application component.

Abstract: A processor receives a rule containing a first set of code statements. The processor compares the first set of code statements of the rule to a second set of code statements of a plurality of code statements of source code. The processor responds to a match of the first set of code statements of the rule and the second set of code statements of the plurality of code statements of the source code, by applying a weight modifier to the rule, which adds a weighted value to the rule, and the processor, in response to a second matching of the first set of code statements of the rule to the second set of code statements of the plurality of code statements of the source code, applies the weight modifier to the rule, which includes a weighted value, and the weight modifier adjusts the weighted value of the rule.

Abstract: Information associated with tests performed on an application program is captured and stored in memory. This information is then used to recommend a set of regression tests to a user for use in regression testing the application. Particularly, responsive to being notified about a change in the program code, the device analyzes the stored information and recommends a selected set of regression tests to a user based on the results of that analysis. The recommended tests enable the user to adequately regression test the program code in the application program using an optimal number of test cases.

Abstract: Template identification techniques for control of testing are described. In one or more implementations, a method is described to control testing of one or more services by one or more computing devices using inferred template identification. Templates are inferred, by the one or more computing devices, that are likely used for documents for respective services of a service provider that are available via corresponding universal resource locators (URLs) to form an inferred dataset. Overlaps are identified by the one or computing devices in the inferred dataset to cluster services together that have likely used corresponding templates. Testing is controlled by the one or more computing devices of the one or more services based at least in part on the clusters.

Abstract: A technique for generating testcases includes receiving a new product specification for an application. A noun-verb pairing is performed on the new product specification. An attempt is made to locate a similar noun-verb pairing in a previous product specification for the application that corresponds to the new noun-verb pairing. In response to locating the similar noun-verb pairing in the previous product specification, a new testcase is generated by modifying an existing testcase that is associated with the similar noun-verb pairing in the previous product specification. In response to not locating the similar noun-verb pairing in the previous product specification, the fact that the new testcase was not generated is indicated.

Abstract: The present invention provides a software development method, system and computer program product. Generally, a computer program product for software development assistance includes a computer readable storage medium having computer readable program code embodied therewith such that the computer readable program receives from a server over a computer communications network both a software update for software installed in an end user device, and also test cases and a testing tool. The test cases are loaded in memory of the end user device and executed in the end user device with the execution tool with respect to the software update. Execution information produced by the execution of the test cases is collected and transmitted back to the server from the end user device. Optionally, a new test case for the software update can be created within the memory of the end user device the new test case can be executed along with the received test cases with the execution tool in the end user device.

Abstract: In order to perform system-capability testing, an application in an application layer may provide predefined system capabilities and/or requirements of or associated with the application to a communication plugin in a data-link layer, such as availability of communication via a network and/or a latency of the network less than a predefined value. In response, the communication plugin may determine feedback information that specifies whether the predefined system capabilities are available and whether the predefined requirements are satisfied. Then, the communication plugin may provide the feedback information to the application. When the feedback information indicates that a system capability is unavailable, remedial action may be performed. For example, the remedial action may include updating a version of the application, updating a version of the communication plugin, and/or updating a path to a location in a network.

Abstract: A testing framework has been developed to address these issues that takes common functionality normally imported by the testing scripts on the client device and instead splits the functionality into standalone, fault tolerant, scalable services. Accordingly, the scripts can utilize the functionality through APIs and therefore test drivers executing a test or building a test environment or other testing processes may access the services through an API. Therefore, each testing client and test driver does not need to separately import the functionality and run the functionality on the memory of the client device separately. Rather, multiple tests can use these functionalities, allowing the testing services to be scaled between tests.

Abstract: Electronic garbage collection moves objects within memory to consolidate the objects thereby reducing access time and improving memory performance. Transactions occurring in an atomic transactional memory appear to occur instantaneously—such that the transaction completes in its entirety or is aborted. A garbage collection circuit attempts to move a memory object from a first memory location to a second memory location using a transactional fast-path move operation. If the transactional fast-path move operation is unsuccessful after a number of attempts, the garbage collection circuit attempts to move the object using a non-transactional slow-path move.

Abstract: A FLASH memory control technique with wear leveling between the different blocks of the FLASH memory. By a controller managing the blocks of a FLASH memory within a data storage device, some of the blocks are pushed into a spare queue waiting to be allocated as data blocks or system blocks. When the number of blocks within the spare queue is lower than a clean threshold and any block within the spare queue has an erase count greater than an overused lower threshold, the controller performs a garbage correction operation with wear leveling between the different blocks.

Abstract: An adaptive compression data storing method for non-volatile memories and a system using the method are disclosed. The system includes a host interface unit, a data compressor, a padding unit, a buffer, a combining unit, and a mapping table unit. By combining some compressed data in one page, the present invention can settle the problem that space for storing a compressed data that can not be utilized. Further, lifetime of non-volatile memories can be extended.

Abstract: In one embodiment, a node coupled to solid state drives (SSDs) of a plurality of storage arrays executes a storage input/output (I/O) stack having a plurality of layers. The node includes a non-volatile random access memory (NVRAM). A first portion of the NVRAM is configured as a write-back cache to store write data associated with a write request and a second portion of the NVRAM is configured as one or more non-volatile logs (NVLogs) to record metadata associated with the write request. The write data is passed from the write-back cache over a first path of the storage I/O stack for storage on a first storage array and the metadata is passed from the one or more NVLogs over a second path of the storage I/O stack for storage on a second storage array, wherein the first path is different from the second path.

Abstract: The disclosed embodiments provide a system that detects anomalous events in a virtual machine. During operation, the system obtains time-series virtual machine (VM) data including garbage-collection (GC) data collected during execution of a virtual machine in a computer system. Next, the system computes, by a service processor, a time window for analyzing the time-series VM data based at least in part on a working time scale of high-activity patterns in the time-series GC data. The system then uses a trend-estimation technique to analyze the time-series VM data within the time window to determine an out-of-memory (OOM) risk in the virtual machine. Finally, the system stores an indication of the OOM risk for the virtual machine based at least in part on determining the OOM risk in the virtual machine.

Abstract: Garbage collection processing is facilitated. Based on execution of a load instruction and determining that an object pointer to be loaded indicates a location within a selected portion of memory undergoing garbage collection, processing control is obtained by a handler executing within a processor of the computing environment. The handler obtains an address of the object pointer from a pre-defined location, reads the object pointer, and determines whether the object pointer is to be modified. If the object pointer is to be modified, the handler modifies the object pointer. The handler then stores the modified object pointer in a selected location.

Abstract: An information handling system includes a processor having a plurality of memory channels. The information handling system also includes a plurality of dual inline memory modules non-symmetrically populated on the memory channels. The dual inline memory modules are divided by bank to create a plurality of interleave groups, and each of the interleave groups spans across all of the memory channels of the processor.

Abstract: Various embodiments of systems and methods to allow and control simultaneous access and processing by multiple compute elements of multiple data sets stored in multiple memory modules. The compute elements request data to be processed without specifying any particular data sets to be received. Data interfaces receive the data requests from the compute elements, determine which data sets have not yet been served to the compute elements, select data sets to be served from among those that have not yet been served, and fetch these data sets from the memory modules. The process of requesting additional data by the compute elements, selection by the data interfaces of data sets to be served among those that have not yet been served, and providing such data sets by the data interfaces to the compute elements, may continue until all of the data sets have been served to the compute elements.

Abstract: In one embodiment, a processor comprises: at least one core formed on a die to execute instructions; a first memory controller to interface with an in-package memory; a second memory controller to interface with a platform memory to couple to the processor; and the in-package memory located within a package of the processor, where the in-package memory is to be identified as a more distant memory with respect to the at least one core than the platform memory. Other embodiments are described and claimed.

Abstract: An electronic device includes a first magnetic layer pinned in its magnetization direction, a third magnetic layer pinned in its magnetization direction, a second magnetic layer interposed between the first magnetic layer and the third magnetic layer, and changeable in its magnetization direction, a barrier layer interposed between the first magnetic layer and the second magnetic layer, and a dielectric layer interposed between the second magnetic layer and the third magnetic layer, wherein the first magnetic layer has a width 1.5 to 5 times wider than a width of the second magnetic layer.

Abstract: Some implementations disclosed herein provide techniques for caching memory data and for managing cache retention. Different cache retention policies may be applied to different cached data streams such as those of a graphics processing unit. Actual performance of the cache with respect to the data streams may be observed, and the cache retention policies may be varied based on the observed actual performance.

Abstract: Systems and methods that facilitate reduced latency via stashing in multi-level cache memory architectures of systems on chips (SoCs) are provided. One method involves stashing, by a device includes a plurality of multi-processor central processing unit cores, first data into a first cache memory of a plurality of cache memories, the plurality of cache memories being associated with a multi-level cache memory architecture. The method also includes generating control information including: a first instruction to cause monitoring contents of a second cache memory of the plurality of cache memories to determine whether a defined condition is satisfied for the second cache memory; and a second instruction to cause prefetching the first data into the second cache memory of the plurality of cache memories based on a determination that the defined condition is satisfied.

Abstract: A method for maintaining the coherency of a store coalescing cache and a load cache is disclosed. As a part of the method, responsive to a write-back of an entry from a level one store coalescing cache to a level two cache, the entry is written into the level two cache and into the level one load cache. The writing of the entry into the level two cache and into the level one load cache is executed at the speed of access of the level two cache.

Abstract: In one embodiment, a computer-implemented method includes encountering a store operation during a compile-time of a program, where the store operation is applicable to a memory line. It is determined, by a computer processor, that no cache coherence action is necessary for the store operation. A store-without-coherence-action instruction is generated for the store operation, responsive to determining that no cache coherence action is necessary. The store-without-coherence-action instruction specifies that the store operation is to be performed without a cache coherence action, and cache coherence is maintained upon execution of the store-without-coherence-action instruction.

Abstract: A computer system comprising multiple nodes, each node comprising a plurality of processors and a local cache hierarchy, suppresses local cache coherency of a node operations or global cache coherency operations between nodes based on the coherency request being a global or local request, and the state of the cache line at the node.

Abstract: Embodiments include systems and methods for improving power consumption characteristics of reverse directories in microprocessors. Some embodiments operate in context of multiprocessor semiconductors having cache hierarchies in which multiple higher-level caches share lower-level caches. Lower-level cache is coupled with reverse directories associated with respective ones of the higher-level caches. Each reverse directory can be segregated into two reverse sub-directories, one reverse sub-directory for relatively high-frequency accesses (e.g., updating “valid” and/or “private” information), and the other reverse sub-directories for relatively low-frequency accesses updating “index” and “way” information). During a write mode operation, when the reverse directories are updated, the write operation is performed only on the sub-directories having the entries invoked by the update, such that write operations can frequently consume only a fraction (e.g.