Patents Issued in August 8, 2017
  • Patent number: 9727381
    Abstract: The upper limit value of a resource amount is set for a group introduced as a fragment bundle for a resource service. At the time of introducing a group, the amount of a resource used by an application belonging to the group can be transferred to management for each group.
    Type: Grant
    Filed: August 27, 2015
    Date of Patent: August 8, 2017
    Assignee: CANON KABUSHIKI KAISHA
    Inventor: Manami Hatano
  • Patent number: 9727382
    Abstract: A parallelization method includes: obtaining profiling information for each job step of a job by performing profiling of the job to be executed on an electronic device; determining at least one job step to be parallelized on a central processing unit (CPU) and at least one heterogeneous unit of the electronic device among a plurality of job steps of the job based on the profiling information; determining a unit to process each unit data among the CPU and the heterogeneous unit based on the profiling information, with respect to the determined at least one job step; and determining a unit to process each task among the CPU and the heterogeneous unit based on the profiling information, with respect to at least one job step including a plurality of separately executable tasks in the determined at least one job step.
    Type: Grant
    Filed: July 1, 2015
    Date of Patent: August 8, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jaehan Koh, Anuradha Oberoi, GopalaKrishna Puligedda Sharma, Raghavan Velappan, Priyank Popatlal Faldu
  • Patent number: 9727383
    Abstract: Methods of predicting datacenter performance to improve provisioning are described. In an embodiment, a resource manager element receives a request from a tenant which describes an application that the tenant wants executed by a multi-resource, multi-tenant datacenter. The request that has been received is mapped to a set of different candidate resource combinations within the datacenter, where each candidate resource combination can be used to execute the application in a manner which satisfies a high level constraint specified within the request. This mapping may, for example, be performed using a combination of benchmarking and an analytical model. In some examples, each resource combination may comprise a number of virtual machines and a bandwidth between those machines. Data relating to at least a subset (and in some examples, two or more) of the candidate resource combinations is then presented to the tenant.
    Type: Grant
    Filed: February 21, 2012
    Date of Patent: August 8, 2017
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Hitesh Ballani, Thomas Karagiannis, Antony Rowstron, Paolo Costa, Virajith Jalaparti
  • Patent number: 9727384
    Abstract: A system, method and computer program product for cloud computing, including a cloud server including a cloud link module or program and coupled to a communications network; a client device including a device link module or program and coupled to the cloud server via the communications network; and a memory card including a card link module or program and coupled to the client device. The cloud link, client link, and card link modules or programs are configured to allocate processing of content between the cloud server, client device and memory card, such that communications bandwidth usage between the cloud server and the client device are minimized during content delivery.
    Type: Grant
    Filed: November 17, 2010
    Date of Patent: August 8, 2017
    Assignee: Satellite Technologies, LLC
    Inventor: Amir Masoud Zarkesh
  • Patent number: 9727385
    Abstract: Techniques and structures relating to virtual graphics processing units (VGPUs) are disclosed. A VGPU may appear to software as an independent hardware GPU. However, two or more VGPUs can be implemented on the same GPU through the use of control structures and by duplicating some (but not all) hardware elements of the GPU. For example, additional registers and storage space may be added in a GPU supporting multiple VGPUs. Different execution priorities may be set for tasks and threads that correspond to the different supported VGPUs. Memory address space for the VGPUs may also be managed, including use of virtual address space for different VGPUs. Halting and resuming execution of different VGPUs allows for fine-grained execution control in various embodiments.
    Type: Grant
    Filed: June 13, 2012
    Date of Patent: August 8, 2017
    Assignee: Apple Inc.
    Inventors: Robert A. Drebin, James Wang
  • Patent number: 9727386
    Abstract: A method and apparatus are disclosed for network resource virtual partitioning. An embodiment method includes mapping a plurality of hardware functions at a plurality of physical network interface devices into a plurality of virtual partitions (VPs) implemented using software, wherein the VPs are configured to manage and operate independent from one another the corresponding hardware functions at the physical network interface devises. An embodiment apparatus includes a processor configured to aggregate a plurality of hardware functions at a plurality of physical network interface devices into a plurality of virtual partition aggregations (VPAs), wherein the VPAs are configured to manage and operate independent from one another a plurality of corresponding subsets of the hardware functions to serve one or more clients.
    Type: Grant
    Filed: October 12, 2012
    Date of Patent: August 8, 2017
    Assignee: Futurewei Technologies, Inc.
    Inventor: Yunsong Lu
  • Patent number: 9727387
    Abstract: Technology for monitoring all resources and services of a distributed computing environment to collect and store information technology (IT) infrastructure resources, task resource usage metrics, and idle times of the environment. A system management task, both manually created by administrators and automatically scheduled, is queued on a management queue to be processed at a later time. When the system management task is removed from the queue, resources required to execute the activity of the distributed computing environment are then requested. The task is authorized to execute if the requested resources and time to complete the activity are available. The resources are then secured and the system management task executed in the distributed computing environment.
    Type: Grant
    Filed: November 10, 2014
    Date of Patent: August 8, 2017
    Assignee: International Business Machines Corporation
    Inventors: Michele Crudele, Gaetano Ferrari, Bernardo Pastorelli
  • Patent number: 9727388
    Abstract: Some implementations provide techniques and arrangements to migrate threads from a first core of a processor to a second core of the processor. For example, some implementations may identify one or more threads scheduled for execution at a processor. The processor may include a plurality of cores, including a first core having a first characteristic and a second core have a second characteristic that is different than the first characteristic. Execution of the one or more threads by the first core may be initiated. A determination may be made whether to apply a migration policy. In response to determining to apply the migration policy, migration of the one or more threads from the first core to the second core may be initiated.
    Type: Grant
    Filed: December 29, 2011
    Date of Patent: August 8, 2017
    Assignee: INTEL CORPORATION
    Inventors: Sanjeev S. Jahagirdar, Varghese George, Inder Sodhi
  • Patent number: 9727389
    Abstract: Systems and methods are used to provide distributed processing on a service provider network that includes a plurality of remotely located consumer devices. Each of the remotely located consumer devices includes a processing device. A service is provided from the service provider network to the remotely located consumer devices. Distributed processing of a task on the processing devices of the remotely located consumer devices occurs, the distributed processing being unrelated to the service provided to the consumers. The distributed processing occurs even when the processing devices are in use by corresponding remotely located consumer devices.
    Type: Grant
    Filed: June 11, 2015
    Date of Patent: August 8, 2017
    Assignee: CSC Holdings, LLC
    Inventors: Richard W. Neill, Leon Rivkin
  • Patent number: 9727390
    Abstract: A computer system firmware is provided that includes functionality for allowing a calling application to invoke firmware functions through the use of firmware services for getting and setting firmware variables. Firmware functions may be defined and mapped to firmware variable names. When a request is received by the firmware to get or set a value for a particular firmware variable, the firmware determines whether a custom firmware function has been defined that corresponds to the requested firmware variable. If a custom function has been defined that corresponds to the requested firmware variable, then the corresponding custom function is executed rather than the requested get or set operation. A firmware setup application might utilize this mechanism to obtain information from a firmware for use in modifying the configuration of a computer system that would not otherwise be available to the setup application.
    Type: Grant
    Filed: June 1, 2012
    Date of Patent: August 8, 2017
    Assignee: American Megatrends, Inc.
    Inventor: Stefano Righi
  • Patent number: 9727391
    Abstract: The method for performing a task on unified information units in a personal workspace, comprising: plugging at least one information importer and at least one unified tool to a personal workspace; obtaining at least one information via the at least one information importer from at least one of a plurality of information sources and unifying the at least one information into at least one unified information unit; arranging the at least one unified information unit and the at least one unified tool in the personal workspace; and performing the task for accessing or controlling the at least one unified information unit by using the at least one unified tool.
    Type: Grant
    Filed: July 8, 2014
    Date of Patent: August 8, 2017
    Assignee: ABLE WORLD INTERNATIONAL LIMITED
    Inventors: Chen-Chun Lai, Shih-Cheng Lan, Shih-Yi Yeh, Chun-Hsiao Lin, Wai-Tung Cheung, Ho-Cheung Cheung
  • Patent number: 9727392
    Abstract: Techniques for passing dependencies in an application programming interface API includes identifying a plurality of passes of execution commands. For each set of passes, wherein one pass is a destination pass and the other pass is a source pass to each other, one or more dependencies, of one or more dependency types, are determined between the execution commands of the destination pass and the source pass. Pass objects are then created for each identified pass, wherein each pass object records the execution commands and dependencies between the corresponding destination and source passes.
    Type: Grant
    Filed: September 16, 2015
    Date of Patent: August 8, 2017
    Assignee: NVIDIA CORPORATION
    Inventor: Jeffrey Bolz
  • Patent number: 9727393
    Abstract: A method, an apparatus and computer program for analyzing events in a computer system, the method comprises receiving an event, splitting the event into a meta part and a content part. The method further comprises comparing the meta part by matching the meta part with meta parts from previous events. The method further comprises determining that the meta part is new, and when the meta part is determined new storing the meta part and the content part. The method further comprises wherein when the meta part is determined not new, comparing the content part by matching with previous content parts with the same meta part. The method further comprises determining that the content part is new, and when the content part is determined new, storing the content part, thereby enabling analyzing events in a computer system and presenting events as new.
    Type: Grant
    Filed: November 14, 2014
    Date of Patent: August 8, 2017
    Inventors: Göran Weiderman Sandahl, Johan Gustafsson
  • Patent number: 9727394
    Abstract: Techniques are described herein that are capable of establishing causality order of computer trace records. A computer trace record is information that indicates an event that occurs with regard to execution of a computer program. For instance, machines in a distributed computer system may generate such computer trace records as the machines execute the computer program. The computer trace records may be ordered in an aggregated trace to accurately reflect the causality order of the computer trace records. A causality order of computer trace records is a temporal sequence of the computer trace records in which each cause event is indicated to occur before each effect event that is caused by the cause event. A cause event is an event that causes an effect event. An effect event is an event that is caused by a cause event.
    Type: Grant
    Filed: April 27, 2015
    Date of Patent: August 8, 2017
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Lu Xun, Gopala Krishna R. Kakivaya, Mihail Gavril Tarta
  • Patent number: 9727395
    Abstract: Embodiments include a method, system, and computer program product for verifying a counter design. A method includes receiving a plurality of events within the counter design. The plurality of events can include a context event and a design event. The method also includes determining a tolerance window in response to the receiving of the context. The tolerance window is defined around the context event and includes a first portion before an occurrence of the context event and a second portion after the context event. The method further includes performing a verification algorithm to identify whether the design event is within the tolerance window and should be accounted for by a design model counter of the counter design.
    Type: Grant
    Filed: July 1, 2015
    Date of Patent: August 8, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Jatin Bhartia, Matthias D. Heizmann, Ajit S. Honnungar, Jr., Parminder Singh
  • Patent number: 9727396
    Abstract: Some embodiments of a system and a method to automatically deploy message queues on-demand in a computing system have been presented. An application server may configure an application messaging service according to a set of rules in a configuration file. In response to applications requesting to access messaging queues for the first time, the application server may automatically deploy messaging queues on-demand following the set of rules in the configuration file.
    Type: Grant
    Filed: November 30, 2010
    Date of Patent: August 8, 2017
    Assignee: Red Hat, Inc.
    Inventors: Martin Vecera, Pavel Macik
  • Patent number: 9727397
    Abstract: A container-less JSP system is provided. An example container-less JSP system comprises a detector, a trigger module, and an invoker. The detector may be configured to detect a request initiated by a client application to invoke a JSP template. The request is a protocol-neutral Java™ interface. The trigger module may be configured to trigger the protocol-neutral Java™ interface to invoke the JSP template. The invoker may be configured to invoke the JSP template.
    Type: Grant
    Filed: July 18, 2008
    Date of Patent: August 8, 2017
    Assignee: PAYPAL, INC.
    Inventors: Bin Ni, Mark P. Palaima, Thierry Neel, Yitao Yao
  • Patent number: 9727398
    Abstract: A first control device includes: a switch device including a first port connected to a second control device among the plurality of control devices via a first channel and a second port connected to the second control device via a second channel and to which a processing device is connected; a detection unit that detects an error in the control devices; a first reset processing unit that performs a port reset of the first port included in the switch device; and a transmitting unit that transmits a reset instruction to the second control device; thereby propagation of an error occurred in a control device can be inhibited.
    Type: Grant
    Filed: October 27, 2014
    Date of Patent: August 8, 2017
    Assignee: FUJITSU LIMITED
    Inventor: Takashi Kidamura
  • Patent number: 9727399
    Abstract: A residue-based error checking mechanism is provided for checking for error in a shift operation of a shifter. The checking includes: partitioning an input vector into the shifter into one or more bit groups of bit width W; generating a predicted residue on the input vector being shifted, the generating including masking out any bit group of bit width W fully shifted out by the shift operation from contributing to the predicted residue, and the generating accounting for any bits of a bit group of the input vector partially shifted out by the shift operation; generating a result residue on a result vector of the shift operation; and comparing the result residue with the predicted residue to check for an error in the result vector of the shift operation.
    Type: Grant
    Filed: September 29, 2016
    Date of Patent: August 8, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Steven R. Carlough, Petra Leber, Silvia M. Mueller, Andreas Wagner
  • Patent number: 9727400
    Abstract: Embodiments relate to systems and methods for timeout monitoring of concurrent commands or parallel communication channels comprising assigning or de-assigning each one of the commands or communication channels to a corresponding one of a plurality of timeout timers when corresponding commands are to be transmitted or command acknowledges are received respectively.
    Type: Grant
    Filed: October 13, 2015
    Date of Patent: August 8, 2017
    Assignee: Infineon Technologies Ag
    Inventors: Karl Herz, Ljudmil Anastasov, Harald Zweck
  • Patent number: 9727401
    Abstract: Disclosed is a method of operating a semiconductor memory device including a plurality of pages, including: receiving a program command, an address, and program data; reading page data from a selected page corresponding to the address in response to the program command; determining whether the number of bits of data corresponding to a program state among the page data is greater than a threshold value; and outputting a state fail signal without performing a program operation on the selected page based on a result of the determination.
    Type: Grant
    Filed: July 31, 2015
    Date of Patent: August 8, 2017
    Assignee: SK Hynix Inc.
    Inventor: Ju Hyeon Han
  • Patent number: 9727402
    Abstract: Techniques and mechanisms provide a solution space visualization of bit error rates (BER) for combinations of parameter settings of transceivers. Different types of visualizations may be generated.
    Type: Grant
    Filed: February 6, 2015
    Date of Patent: August 8, 2017
    Assignee: Altera Corporation
    Inventors: Shuangxia Zhu, Yongliang Lu, Zhi Y. Wong
  • Patent number: 9727403
    Abstract: A system includes a plurality of information processing apparatuses; and a management apparatus configured to: transmit Hamilton path information including a communication route information and order information indicating a position in a communication order assigned to the each of the plurality of information processing apparatuses, to each of the plurality of information processing apparatuses, and transmit a first message to one or more information processing apparatuses that are free from an abnormal condition according to the communication order, and wherein each of the plurality of information processing apparatuses is configured to: transmit a second message including information about an abnormal condition that has been detected to a next transmission destination that is free from an abnormal condition, when the first message is received, and transmit the information about an abnormal condition that has been detected to the management apparatus, when the next transmission destination fails to be ident
    Type: Grant
    Filed: June 18, 2015
    Date of Patent: August 8, 2017
    Assignee: FUJITSU LIMITED
    Inventors: Mio Nakagawa, Tsuyoshi Hashimoto
  • Patent number: 9727404
    Abstract: A system and method for remote maintenance of user units allows efficient diagnosis of failures in a reduced time. Each user unit transmits to a management server, via a network, state data related to hardware and software parameters associated to an operating mode of the user unit. The method includes: storing state data in a user unit memory, monitoring state data stored in the memory, and detecting at least one datum of a state indicating an operational failure of the user unit. When a failure is detected, state data corresponding to current states of the user unit at the moment of the failure and state data corresponding to states stored during a predetermined period before the failure are extracted and transmitted to the management server which determines a statistic correlation coefficient between the values of each state of a user unit and the values of states of other user units.
    Type: Grant
    Filed: June 13, 2014
    Date of Patent: August 8, 2017
    Assignee: OPENTV, INC.
    Inventor: Alain Delpuch
  • Patent number: 9727405
    Abstract: Problem determination in an enterprise computer system in a distributed environment is provided. Information is obtained regarding the enterprise applications, and high-level information is presented to a user, with one or more prompts provided to the user for more detailed information. In response to a request from a user for more detailed information about the application, more detailed information is provided to the user. Several levels of more detailed information about applications, including information as to individual threads, is available. The method also includes the steps of receiving instructions from an administrator to establish an account for a user, associating one or more servers with the account, and providing access to the corresponding user only to the associated servers. In the method, searches may be conducted for strings and requests, and identified strings and requests may be sorted by a variety of criteria.
    Type: Grant
    Filed: February 4, 2015
    Date of Patent: August 8, 2017
    Assignee: International Business Machines Corporation
    Inventors: James C. Chong, Joseph L. Chan, Tushar M. Patel, Jean-Jacques Heler, Chi H. So, Arthur Tsang, Robert S. Lam, Raymond Chow, Henry Tang
  • Patent number: 9727406
    Abstract: A software circuit breaker observes an amount of free memory available in an application server and a duration of a garbage collection process performed by the application server. The application server executes an agent comprising a plurality of processes for monitoring performance of the application server. Based on the amount of free memory and duration of the garbage collection process, the circuit breaker anticipates a likely crash of the application server. In response to anticipating the likely crash, the circuit breaker disables one or more processes of the agent.
    Type: Grant
    Filed: October 9, 2015
    Date of Patent: August 8, 2017
    Assignee: New Relic, Inc.
    Inventors: Sebastian Ramirez, Andrew Kent
  • Patent number: 9727407
    Abstract: In a set of problem log entries from a computing system, a subset of the set of problem log entries are identified, which pertain to a failed request. The subset is compared to a reference model which defines log entries per request type under a healthy state of the computing system, to identify a portion of the subset of problem log entries which deviate from corresponding log entries in the reference model. In the portion of the subset, at least one high-value log entry is identified. The at least one high-value log entry is output.
    Type: Grant
    Filed: November 27, 2015
    Date of Patent: August 8, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Yaoping Ruan, Byungchul Tak, Shu Tao
  • Patent number: 9727408
    Abstract: An error detection system detects errors in data packets stored in a memory. A read signature generation circuit generates a read signature of a first data packet. A write signature generation circuit generates a write signature of a second data packet. When a trigger generation circuit generates a trigger signal, a first latching circuit stores a write address as a latch write address and a second latch stores the write signature as a latch write signature. A first synchronization and comparison circuit generates a comparison signal based on the latched write address and a read address. A second synchronization and comparison circuit generates a fault signal based on the comparison signal, the latched write signature, and the read signature.
    Type: Grant
    Filed: December 20, 2015
    Date of Patent: August 8, 2017
    Assignee: NXP USA, INC.
    Inventors: Aarul Jain, Dirk Wendel
  • Patent number: 9727409
    Abstract: A device, system, and/or method includes an internal circuit configured to perform at least one function, an input-output terminal set and a repair circuit. The input-output terminal set includes a plurality of normal input-output terminals connected to an external device via a plurality of normal signal paths and at least one repair input-output terminal selectively connected to the external device via at least one repair signal path. The repair circuit repairs at least one failed signal path included in the normal signal paths based on a mode signal and fail information signal, where the mode signal represents whether to use the repair signal path and the fail information signal represents fail information on the normal signal paths. Using the repair circuit, various systems adopting different repair schemes may be repaired and cost of designing and manufacturing the various systems may be reduced.
    Type: Grant
    Filed: June 15, 2015
    Date of Patent: August 8, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sang-Hoon Shin, Hae-Suk Lee, Han-Vit Jung, Kyo-Min Sohn
  • Patent number: 9727410
    Abstract: A computer-implemented method for handling errors is described. According to the method, a data bridge structure is received. The data bridge structure includes data being communicated between a driving caller using a first computer language layer and a set of computer code using a second computer language layer. In the method, the call between the computer language is re-driven in response to an error occurring. The re-driven call obtains an updated data bridge structure. In the method, the updated data bridge structure is returned to the caller in the first computer language layer driving the call.
    Type: Grant
    Filed: July 27, 2015
    Date of Patent: August 8, 2017
    Assignee: CA, INC.
    Inventors: Sai Swetha Gujja, Jammie Pringle, Frederic Duminy
  • Patent number: 9727411
    Abstract: A method for error tracking a log subsystem of a file system is provided. The method includes: when a data block of the log subsystem is recovered to an original position in the file system, calculating a verification code of the data block to obtain a second verification code; determining whether a verification result between the second verification code and a first verification code of the data block stored in a spare space in a submit block of the log subsystem in a disk is consistent; and when the verification result is inconsistent, processing the data block corresponding to the inconsistent verification result. With the above method, given that system performance is least affected, an error and a position of the error of the log subsystem of the file system can be more accurately detected to enhance the reliability of the log subsystem.
    Type: Grant
    Filed: December 29, 2014
    Date of Patent: August 8, 2017
    Assignee: MSTAR SEMICONDUCTOR, INC.
    Inventor: Tao Zhou
  • Patent number: 9727412
    Abstract: A memory device having an error notification function includes an error correction code (ECC) engine detecting and correcting an error bit by performing an ECC operation on data of the plurality of memory cells, and an error notifying circuit configured to output an error signal according to the ECC operation. The ECC engine outputs error information corresponding to the error bit corresponding to a particular address corrected by the ECC operation. The error notifying circuit may output the error signal when the particular address is not the same as any one of existing one or more failed addresses.
    Type: Grant
    Filed: June 3, 2015
    Date of Patent: August 8, 2017
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jong-Pil Son, Chul-Woo Park, Seong-Jin Jang, Hoi-Ju Chung, Sang-Uhn Cha
  • Patent number: 9727413
    Abstract: A method, computer-readable storage media, and a system are provided for managing a scrub. The method may include detecting a trigger for the scrub. The trigger may be based upon a metric of a memory unit. The method may further include scrubbing the memory unit based upon the detection of the trigger.
    Type: Grant
    Filed: June 28, 2013
    Date of Patent: August 8, 2017
    Assignee: International Business Machines Corporation
    Inventors: Edgar R. Cordero, Gary A. Tressler, Diyanesh B. Vidyapoornachary
  • Patent number: 9727414
    Abstract: Higher-level redundancy information computation enables a Solid-State Disk (SSD) controller to provide higher-level redundancy capabilities to maintain reliable operation in a context of failures of non-volatile (e.g. flash) memory elements during operation of an SSD implemented in part by the controller. For example, a first computation is an XOR, and a second computation is a weighted-sum. Various amounts of storage are dedicated to storing the higher-level redundancy information, such as amounts equivalent to an integer multiple of flash die (e.g. one, two, or three entire flash die), and such as amounts equivalent to a fraction of a single flash die (e.g. one-half or one-fourth of a single flash die).
    Type: Grant
    Filed: November 13, 2012
    Date of Patent: August 8, 2017
    Assignee: Seagate Technology LLC
    Inventor: Earl T. Cohen
  • Patent number: 9727415
    Abstract: A configuration structure and method of a block memory. The configuration structure includes a first port, a second port, an ECC module, and an FIFO module; the ECC module includes an ECC encoder and an ECC decoder; the FIFO module is used for setting the first clock enable terminal and the second clock enable terminal, so as to make the read clock synchronous or asynchronous with and the write clock of the block memory. The read width and the write width of the block memory can be independently configured, and the block memory has built-in an ECC function and a FIFO function, and can be cascaded to a block memory with larger storage space without consuming additional logic resource.
    Type: Grant
    Filed: November 27, 2014
    Date of Patent: August 8, 2017
    Assignee: CAPITAL MICROELECTRONICS CO., LTD.
    Inventors: Jia Geng, Yuanpeng Wang, Ping Fan
  • Patent number: 9727416
    Abstract: An apparatus, as well as a method therefor, relates generally to managing reliability of a solid state storage. In such an apparatus, there is a memory controller for providing a code rate. An encoder is for receiving input data and the code rate for providing encoded data. The solid-state storage is for receiving and storing the encoded data. A decoder is for accessing the encoded data stored in the solid-state storage and for receiving the code rate for providing decoded data of the encoded data accessed. The decoded data is provided as soft decisions representing probabilities of the decoded data. The memory controller is for receiving the decoded data for adjusting the code rate responsive to the probabilities of the decoded data.
    Type: Grant
    Filed: July 1, 2015
    Date of Patent: August 8, 2017
    Assignee: XILINX, INC.
    Inventor: Christopher H. Dick
  • Patent number: 9727417
    Abstract: An integrated circuit (IC) includes addressable blocks of memory, and at least one redundant block of memory. A block of memory includes two or more chunks of memory. The IC also includes redundancy control cells. Control circuitry is included to access a first chunk of a redundant block of memory in place of a first remapped chunk one of the addressable blocks of memory, and a second chunk of a redundant block of memory in place of a second remapped chunk one of the addressable blocks of memory, based on the redundancy control cells.
    Type: Grant
    Filed: March 29, 2012
    Date of Patent: August 8, 2017
    Assignee: Intel Corporation
    Inventor: Toru Tanzawa
  • Patent number: 9727418
    Abstract: A method for execution, when a generic computing device is paired with a specific computing device (SCD) token, begins with the SCD token sending distributed storage network (DSN) access request to DSN memory via the generic computing device, wherein the DSN access request identifies SCD operation information that is stored as one or more of sets of encoded data slices in the DSN memory and wherein the SCD operation information was encoded using a dispersed storage error encoding function to produce the plurality of sets of encoded data slices. Then, the SCD token receives the one or more of sets of encoded data slices from the DSN memory via the generic computing device and decodes the one or more of sets of encoded data slices to retrieve the SCD operation information and enables the generic computing device to function as an SCD in accordance with the SCD operation information.
    Type: Grant
    Filed: September 10, 2014
    Date of Patent: August 8, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Gary W. Grube, Timothy W. Markison, Greg Dhuse, Jason K. Resch, Ilya Volvovski, Wesley Leggette
  • Patent number: 9727419
    Abstract: An apparatus for processing data includes a storage medium operable to store encoded data, and a read channel circuit with a low density parity check encoder operable to encode data to generate the encoded data, and a low density parity check decoder operable to decode the encoded data retrieved from the storage medium. The read channel circuit is operable to perform a column rotation on the encoded data prior to storage and after retrieval before decoding.
    Type: Grant
    Filed: November 6, 2015
    Date of Patent: August 8, 2017
    Assignee: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
    Inventors: Xuebin Wu, Yang Han, Shaohua Yang
  • Patent number: 9727420
    Abstract: To generate a checkpoint for a virtual machine (VM), first, while the VM is still running, a copy-on-write (COW) disk file is created pointing to a parent disk file that the VM is using. Next, the VM is stopped, the VM's memory is marked COW, the device state of the VM is saved to memory, the VM is switched to use the COW disk file, and the VM begins running again for substantially the remainder of the checkpoint generation. Next, the device state that was stored in memory and the unmodified VM memory pages are saved to a checkpoint file. Also, a copy may be made of the parent disk file for retention as part of the checkpoint, or the original parent disk file may be retained as part of the checkpoint. If a copy of the parent disk file was made, then the COW disk file may be committed to the original parent disk file.
    Type: Grant
    Filed: April 25, 2014
    Date of Patent: August 8, 2017
    Assignee: VMware, Inc.
    Inventors: Carl A. Waldspurger, Michael Nelson, Daniel J. Scales, Pratap Subrahmanyam
  • Patent number: 9727421
    Abstract: Technologies for environment checkpointing include an orchestration node communicatively coupled to one or more working computing nodes. The orchestration node is configured to administer an environment checkpointing event by transmitting a checkpoint initialization signal to each of the one or more working computing nodes that have been registered with the orchestration node. Each working computing node is configured to pause and buffer any presently executing applications, save checkpointing data (an execution state of each of the one or more applications) and transmit the checkpointing data to the orchestration node. Other embodiments are described and claimed.
    Type: Grant
    Filed: June 24, 2015
    Date of Patent: August 8, 2017
    Assignee: Intel Corporation
    Inventors: Igor Ljubuncic, Ravi A. Giri
  • Patent number: 9727422
    Abstract: Techniques to exclude files from backup are disclosed. In various embodiments, a database that includes an exclude set table configured to store data associated with one or more files identified to be excluded from backup is accessed. Data retrieved from the database is used to exclude one or more of said one or more files from a backup. In some embodiments, files are excluded from the backup at least in part by deleting the files from a shadow copy volume created in connection with said backup.
    Type: Grant
    Filed: December 8, 2015
    Date of Patent: August 8, 2017
    Assignee: EMC IP Holding Company LLC
    Inventor: Kiran Kumar Madiraju Varadaraju
  • Patent number: 9727423
    Abstract: Disclosed in some examples are predictive storage techniques for use in a distributed data system. The predictive storage techniques may be used to manage locally stored elements of a shared data collection, such as the storage of files on nodes of the distributed data system that are limited in local storage space. The predictive storage techniques may achieve a balance between consumption of local resources and timely access of important elements in the shared data collection. For example, the predictive storage techniques may be used for keeping or pre-caching certain items of a collection that are determined as likely to be used in local storage for convenient access, and allowing access the remaining items on request over a network.
    Type: Grant
    Filed: December 31, 2014
    Date of Patent: August 8, 2017
    Assignee: Code 42 Software, Inc.
    Inventors: Matthew Dornquast, Brian Bispala, Samuel Schroeder, Christopher Gwinn, Justin Grammens, Thomas (Tony) Lindquist, Peter Lindquist
  • Patent number: 9727424
    Abstract: The System Integrity Guardian can protect any type of object and repairs and restores the system back to its original state of integrity. The Client component is the user interface for administering the System Integrity Guardian environment. An administrator can determine which servers to protect, which objects to protect, and what actions will be taken when an event that breaches integrity occurs. The Monitor Agent component is the watchdog of the System Integrity Guardian that captures and addresses any event that occurs on any object being protected. The Server component includes the server and the Protected Object Central Repository. The authoritative copies are maintained, digital signatures are created and stored, objects are validated, and communication between the three units is performed.
    Type: Grant
    Filed: July 28, 2014
    Date of Patent: August 8, 2017
    Assignee: Cimcor, Inc.
    Inventor: Robert E. Johnson, III
  • Patent number: 9727425
    Abstract: Executing a confined recovery in a distributed system having a plurality of worker systems including a failed worker system at a current superstep. The confined recovery includes determining states of the partitions of the worker systems during the supersteps preceding the current superstep, and determining a recovery initiation superstep preceding the current superstep in which all messages for recovery initiation superstep are available. The recovery initiation superstep is determined responsive to determining the states of the partitions. Additionally, a recovery set of partitions is determined for which messages in supersteps after the recovery initiation superstep are not available. The worker systems having the partitions in the recovery set are instructed to execute the defined function for the partitions in the recovery set starting at the recovery initiation superstep to recover the lost exchanged messages.
    Type: Grant
    Filed: May 4, 2015
    Date of Patent: August 8, 2017
    Assignee: Google Inc.
    Inventors: Grzegorz Malewicz, Matthew H. Austern, James C. Dehnert, Aart J. C. Bik, Grzegorz Czajkowski
  • Patent number: 9727426
    Abstract: The writing of data to a storage system such that change tracking is efficiently performed. If a portion is to be written to the storage system, the system writes a write record indicating that a group of portions (that includes the particular portion) of the storage system is to be written to the storage system. This is represented even though those other portions are not being contemporaneously written to the storage system, and may in fact never be written. The particular portion is then written to the storage system. At some point thereafter, perhaps in the background, a change tracking structure is changed to reflect that the particular portion is written to the storage system, but without reflecting writes of all of the group of portions. The write record may then be invalidated. This reduces latency in systems that track changes with small cost at the time of backup.
    Type: Grant
    Filed: February 25, 2015
    Date of Patent: August 8, 2017
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: John Starks, Angshuman Bezbaruah
  • Patent number: 9727427
    Abstract: A method begins with storage units receiving a request to transfer a copy of a set of encoded data slices from two or more source virtual storage vaults to a destination virtual storage vault. The method continues with each storage unit obtaining a slice transfer map and determining whether the storage unit supports one of the two or more source virtual storage vaults. For each supporting storage unit, the method continues with each supporting storage unit determining, based on the slice transfer map, a sub-set of encoded data slices of the set of encoded data slices that is stored within the one of the two or more source virtual storage vaults by the supporting storage unit. The method continues with the supporting storage unit sending the sub-set of encoded data slices to a corresponding storage unit that is supporting the destination virtual storage vault.
    Type: Grant
    Filed: October 29, 2015
    Date of Patent: August 8, 2017
    Assignee: International Business Machines Corporation
    Inventors: Adam Michael Gray, Greg Dhuse, Andrew Baptist, Ravi Khadiwala, Wesley Leggette, Scott Michael Horan, Franco Vincent Borich, Bart Cilfone, Daniel Scholl
  • Patent number: 9727428
    Abstract: In an example system, a first interface has a first address and a first port number. A second interface has a second address and a second port number. A router is in communication with the first and second interfaces over a network. The router is configured to request, a first set of failover information from the first interface. The router is further configured to receive the first set of failover information from the first interface. The first set of failover information includes the second address and the first port number. The router is configured to detect a failure on the first interface. The router is further configured to modify a network access translation (NAT) table stored within the router by replacing the first address of the first interface with the second address of the second interface while retaining the first port number, such that the first port number remains unchanged.
    Type: Grant
    Filed: November 30, 2015
    Date of Patent: August 8, 2017
    Assignee: Red Hat Israel, Ltd.
    Inventor: Michael Tsirkin
  • Patent number: 9727429
    Abstract: Example embodiments of the present invention relate to a method and system for immediate recovery of replicated virtual machines. The method includes replicating a complex asset from a first site of a distributed information processing system to a second site of the distributed information processing system. The replicated complex asset the may be configured at a first time in an active operational state but in a disconnected communicative state at the second site of the distributed information processing system. At a second time, the replicated complex asset may be configured in a connected communicative state at the second site of the distributed information processing system to facilitate recovery at the second site from a failure in the complex asset at the first site.
    Type: Grant
    Filed: March 31, 2015
    Date of Patent: August 8, 2017
    Assignee: EMC IP Holding Company LLC
    Inventors: James J. Moore, Sorin Faibish, Assaf Natanzon
  • Patent number: 9727430
    Abstract: Services are promptly resumed at the time of a failure recovery in an information processing system. Before a first server system 3a resumes service during the failure recovery, a second server system 3b sends the first server system 3a directory images of directories of a highest-level tier to a predetermined lower-level tier out of data of files stored in a second storage apparatus 10b, and the first server system 3a restores the directory images in a first storage apparatus 10a. When the request is transmitted from the first server system 3a, the second server system 3b reads an additional directory image from the second storage apparatus 10b and transmits the additional directory image to the first server system 3a. If a re-stubbing occurrence frequency is equal to or higher than a predetermined threshold, the second server system 3b suppresses transmission of directory images to the first server system 3a.
    Type: Grant
    Filed: April 24, 2015
    Date of Patent: August 8, 2017
    Assignee: Hitachi, Ltd.
    Inventor: Nobuyuki Saika