Patents Issued in December 28, 2017
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Publication number: 20170371698Abstract: The invention concerns a multi-core processing system comprising: a first input/output interface (312) configured to transmit data over a first network (313) based on a first network protocol; a second input/output interface (314) configured to transmit data over a second network (315) based on a second network protocol; a plurality of processing cores; and one or more memory devices storing software enabling virtual processing resources of the plurality of processing cores and virtual memory to be assigned to support: a first compartment (303) implementing one or more first virtual machines; a second compartment (304) implementing one or more second virtual machines; and a programmable virtual switch (302) configured to provide an interface between the first and second virtual machines and the first and second input/output interfaces (312, 314).Type: ApplicationFiled: June 16, 2017Publication date: December 28, 2017Inventors: Michele Paolino, Kevin CHAPPUIS, Salvatore Daniele Raho
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Publication number: 20170371699Abstract: Provided is a system and method for a multi-tenant datacenter with nested hypervisors. This is provided by at least two physical computing systems each having at least one processor and memory store adapted to provide a first level Hypervisors, each providing a First Virtual Computing Environment with a plurality of inactive Virtual Hypervisors nested therein. The multi tenant data center is structured and arranged to activate a Virtual Hypervisor on one of the at least two Hypervisors and automatically migrate the at least one Customer VM from a Customer Hypervisor to the Active Virtual Hypervisor; and evacuate the remaining inactive Virtual Hypervisors from the Hypervisor supporting the Active Hypervisor to another of the at least two Hypervisors supporting inactive Virtual Hypervisors.Type: ApplicationFiled: August 23, 2017Publication date: December 28, 2017Applicant: The Faction Group LLCInventors: BRYAN JAMES GALLANT, Luke Mathew Norris, Eric Andrew Culp
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Publication number: 20170371700Abstract: A computing apparatus includes a processor and a memory coupled with the processor and has a program to be executed in the processor. The program includes instructions for maintaining a plurality of virtual execution environments, determining context meta-data for the plurality of virtual execution environments, collecting current contextual information for the computing apparatus, and activating one or more of the plurality of virtual execution environments on the collected current contextual information and the context meta-data.Type: ApplicationFiled: September 7, 2017Publication date: December 28, 2017Inventor: Janne Karhunen
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Publication number: 20170371701Abstract: Methods and apparatuses relating to hardware transactions are described. In one embodiment, a processor includes one or more cores to concurrently execute a plurality of transactions, and a hardware transactional circuit to detect an occurrence of a software selected precursor in any of the plurality of transactions and abort at least one of the plurality of transactions on the occurrence unless an interface to software indicates the occurrence is to not cause an abort, wherein the occurrence is not a memory access of shared data by the plurality of transactions.Type: ApplicationFiled: June 27, 2016Publication date: December 28, 2017Inventors: KSHITIJ A. DOSHI, CHRISTOPHER J. HUGHES
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Publication number: 20170371702Abstract: Examples related to secure computing systems are disclosed. In one example, a method includes, at a local agent computing device, sending to a remote work scheduling computing device a work context of the local agent computing device, the work context describing a set of work that the local agent is configured to execute, and polling a remote work depository for work compatible with the work context. The method further includes receiving a response from the remote work depository identifying a job within the work context, the job being requested by a computing device other than the remote work scheduling computing device, and executing the job.Type: ApplicationFiled: June 27, 2016Publication date: December 28, 2017Applicant: Microsoft Technology Licensing, LLCInventors: Jeromy Scott Statia, Brad Turner, George Ringer, Alexandr Tcherniakhovski
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Publication number: 20170371703Abstract: Systems and methods are described for managing asynchronous code executions in an on-demand code execution system or other distributed code execution environment, in which multiple execution environments, such as virtual machine instances, can be used to enable rapid execution of user-submitted code. When asynchronous executions occur, a first execution may call a second execution, but not immediately need the second execution to complete. To efficiently allocate computing resources, this disclosure enables the second execution to be scheduled accordingly to a state of the on-demand code execution system, while still ensuring the second execution completes prior to the time required by the first execution. Scheduling of executions can, for example, enable more efficient load balancing on the on-demand code execution system.Type: ApplicationFiled: June 28, 2016Publication date: December 28, 2017Inventors: Timothy Allen Wagner, Marc John Brooker, Ajay Nair
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Publication number: 20170371704Abstract: A program information generating system includes circuitry configured to acquire a program including a non-interruption instruction code and an interruption instruction code, and action information indicating an order of execution of the non-interruption instruction code and the interruption instruction code, determine an action interruption position representing a position where interruption has occurred in the action information based on the interruption instruction code and the action information, determine a program interruption position representing a position where interruption has occurred in the program based on the non-interruption instruction code and the action interruption position, and generate program interruption position information for specifying the program interruption position.Type: ApplicationFiled: August 21, 2017Publication date: December 28, 2017Applicant: Kabushiki Kaisha ToshibaInventors: Mayuko KOEZUKA, Hidenori MATSUZAKI, Nobuaki TOJO, Akira KURODA, Tatsuaki WATANABE
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Publication number: 20170371705Abstract: A terminal apparatus includes a storage generation unit that generates a storage module that stores, in association with information concerning a process related to a job that is performed by executing multiple processes in a sequential order, and information concerning a process to be performed with a system connected from among the multiple processes, screen data of the system used in the process with the system connected and a display controller that performs control to display the screen data if the system is unconnectable when a request to execute the process is received.Type: ApplicationFiled: November 18, 2016Publication date: December 28, 2017Applicant: FUJI XEROX CO., LTD.Inventor: Shinsuke NAKAZAWA
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Publication number: 20170371706Abstract: Systems and methods are described for managing asynchronous code executions in an on-demand code execution system or other distributed code execution environment, in which multiple execution environments, such as virtual machine instances, can be used to enable rapid execution of user-submitted code. When asynchronous executions occur, one execution may become blocked while waiting for completion of another execution. Because the on-demand code execution system contains multiple execution environments, the system can efficiently handle a blocked execution by saving a state of the execution, and removing it from its execution environment. When a blocking dependency operation completes, the system can resume the blocked execution using the state information, in the same or different execution environment.Type: ApplicationFiled: June 28, 2016Publication date: December 28, 2017Inventors: Timothy Allen Wagner, Marc John Brooker, Ajay Nair
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Publication number: 20170371707Abstract: Embodiments of the present disclosure provide a method of analyzing data in a storage system, a storage system, and a computer program product. The method includes: in response to detecting a request for a data analytic job, obtaining target data for the data analytic job from a first storage device of the storage system. The method also includes storing the target data into a second storage device of the storage system that is assigned for data analysis, and performing the data analytic job using a data processing device and the second storage device in the storage system.Type: ApplicationFiled: June 21, 2017Publication date: December 28, 2017Inventors: Colin Yong Zou, Xiangqing Yang, Man Lv, Wei Lin
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Publication number: 20170371708Abstract: A virtual computer system service receives a request from a customer to instantiate a virtual machine instance onto a computing device. The virtual computer system service obtains a set of preferences from the request that can be used for selecting the computing device from a variety of data zones. The virtual computer system service identifies one or more data zones where virtual machine instances of the customer are operating. Based on the set of preferences and the one or more data zones where the virtual machine instances are operating, the virtual computer system service selects a data zone where the virtual machine instance can be instantiated. The virtual computer system service uses a computing device in the selected data zone to instantiate the virtual machine instance.Type: ApplicationFiled: September 11, 2017Publication date: December 28, 2017Inventor: Derek Solomon Pai
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Publication number: 20170371709Abstract: Identify individual machines of a multi-machine computing system. Construct a graph of dependencies among the machines. Obtain estimated total administration times and administration priorities for each of the machines. Identify availability of administration resources to assist in administration of one or more of the machines. Select a first set of machines for administration in response to the graph, administration priorities, estimated total administration times, and availability of the first set of administration resources, and administer the first set of machines in parallel using the first set of administration resources. Update the graph in response to administration of the first set of machines. Select a subsequent set of machines for administration in response to the updated graph, administration priorities, estimated total administration times, and availability of a subsequent set of administration resources.Type: ApplicationFiled: June 22, 2017Publication date: December 28, 2017Inventors: Richard E. Harper, Ruchi Mahindru, HariGovind V. Ramasamy, Long Wang
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Publication number: 20170371710Abstract: The disclosed herein provides a method, system, and/or computer program product for determining control of a processing resource. To determine control of the processing resource, the method, system, and/or computer program can set a control-loss flag indicating whether a process has control of the processing resource and check the control-loss flag to determine whether the process lost control of the processing resource.Type: ApplicationFiled: June 23, 2016Publication date: December 28, 2017Inventors: ROBERT O. DRYFOOS, CHRISTOPHER D. FILACHEK, MICHAEL J. SHERSHIN
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Publication number: 20170371711Abstract: Optimizing operational costs in a computing environment includes identifying high-cost jobs that are executed to generate one or more reports in the computing environment, identifying one or more reports the generation of which is dependent on the execution of the high-cost jobs, and culling at least a first job from among the high-cost jobs, in response to determining that a benefit achieved from the reports that depend on the first job does not justify costs associated with generating the reports.Type: ApplicationFiled: September 20, 2017Publication date: December 28, 2017Inventors: Michael Fankhauser, Marc N. Haber, Benjamin Halberstadt, Roger K. Hecker
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Publication number: 20170371712Abstract: Management of hierarchical process groups is provided. Aspects include creating a group identifier having an associated set of resource limits for shared resources of a processing system. A process is associated with the group identifier. A hierarchical process group is created including the process as a parent process and at least one child process spawned from the parent process, where the at least one child process inherits the group identifier. A container is created to store resource usage of the hierarchical process group and the set of resource limits of the group identifier. The set of resources associated with the hierarchical process group is used to collectively monitor resource usage of a plurality of processes in the hierarchical process group.Type: ApplicationFiled: June 24, 2016Publication date: December 28, 2017Inventors: Christopher D. Filachek, Gabriel Nieves, Michael J. Shershin
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Publication number: 20170371713Abstract: The specification relates to an intelligent resource management system. The system is capable of receiving a job script file requesting to run analyses for a data file on a multi-CPU system using a multi-threaded application. The system then builds an application knowledge structure and an intelligent resource mapping table based on the application knowledge structure with the intelligent resource mapping table requesting a number of CPUs needed for the analysis. The data file can be partitioned into a number of data segments equaling to the number of CPUs needed for the analysis and a number of application instances equal to the number of CPUs needed for the analysis can be created. The multi-threaded applications are executed on a plurality of CPUs for each bio-informatics data segment and resultants are obtained for each execution. These resultants are combined in the same order of data partitioning to obtain analysis.Type: ApplicationFiled: June 27, 2016Publication date: December 28, 2017Inventors: Nagarajan Kathiresan, Rashid Al-Ali
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Publication number: 20170371714Abstract: A method and an apparatus that execute a parallel computing program in a programming language for a parallel computing architecture are described. The parallel computing program is stored in memory in a system with parallel processors. The parallel computing program is stored in a memory to allocate threads between a host processor and a GPU. The programming language includes an API to allow an application to make calls using the API to allocate execution of the threads between the host processor and the GPU. The programming language includes host function data tokens for host functions performed in the host processor and kernel function data tokens for compute kernel functions performed in one or more compute processors, e.g., GPUs or CPUs, separate from the host processor.Type: ApplicationFiled: September 7, 2017Publication date: December 28, 2017Inventors: AAFTAB MUNSHI, JEREMY SANDMEL
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Publication number: 20170371715Abstract: A first category is determined of a first task being performed at a given time. A first asset that is configured for use with the first category is identified. A next task object is constructed. By analyzing a set of tasks that were performed during a period prior to the given time, a candidate next task is identified. The candidate next task has been performed sometime after a previous performance of the first task during the period. From the first asset, a link to a second asset is selected. The second asset is configured for use with a second category of the candidate next task. The next task object is populated with the link. The candidate next task is designated as a second task that will occur sometime after the first task.Type: ApplicationFiled: June 23, 2016Publication date: December 28, 2017Applicant: International Business Machines CorporationInventors: Hobert Bush, III, Geoffrey M. Hambrick, Damarius Hayes
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Publication number: 20170371716Abstract: Example methods are provided for a first node to perform identifier (ID) allocation in a virtualized computing environment that includes a cluster formed by the first node and at least one second node. The method may comprise retrieving, from a pool of IDs associated with the cluster, a batch of IDs to a cache associated with the first node. The pool of IDs may be shared within the cluster and the batch of IDs retrieved for subsequent ID allocation by the first node. The method may also comprise, in response to receiving a request for ID allocation from an ID consumer, allocating one or more IDs from the batch of IDs in the cache to respective one or more objects for unique identification of the one or more objects across the cluster; and sending, to the ID consumer, a response that includes the allocated one or more IDs.Type: ApplicationFiled: October 19, 2016Publication date: December 28, 2017Inventors: BHAGYASHREE GUJAR, PRASHANT AMBARDEKAR, PRAYAS GAURAV, JAMES JOSEPH STABILE
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Publication number: 20170371717Abstract: A method for waking up one or more sleeping small cell base stations in a wireless communication system for serving a user equipment is described. The wireless communication system includes a plurality of small cell base stations and one or more macro base stations. A wake up signal configuration is received at a user equipment, and a wake up signal configured in accordance with the received wake up signal configuration is transmitted by the user equipment.Type: ApplicationFiled: December 29, 2015Publication date: December 28, 2017Inventors: Wolfgang KIESS, Joan TRIAY MARQUES, Xueli AN-DE LUCA, David PEREZ CAPARROS, Ashiq KHAN
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Publication number: 20170371718Abstract: Methods are provided. A method includes announcing to a network meta information describing each of a plurality of distributed data sources. The method further includes propagating the meta information amongst routing elements in the network. The method also includes inserting into the network a description of distributed datasets that match a set of requirements of the analytics task. The method additionally includes delivering, by the routing elements, a copy of the analytics task to locations of respective ones of the plurality of distributed data sources that include the distributed datasets that match the set of requirements of the analytics task.Type: ApplicationFiled: June 22, 2016Publication date: December 28, 2017Inventors: Bong Jun Ko, Theodoros Salonidis, Rahul Urgaonkar, Dinesh C. Verma
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Publication number: 20170371719Abstract: Systems, apparatuses, and methods for performing temperature-aware task scheduling and proactive power management. A SoC includes a plurality of processing units and a task queue storing pending tasks. The SoC calculates a thermal metric for each pending task to predict an amount of heat the pending task will generate. The SoC also determines a thermal gradient for each processing unit to predict a rate at which the processing unit's temperature will change when executing a task. The SoC also monitors a thermal margin of how far each processing unit is from reaching its thermal limit. The SoC minimizes non-uniform heat generation on the SoC by scheduling pending tasks from the task queue to the processing units based on the thermal metrics for the pending tasks, the thermal gradients of each processing unit, and the thermal margin available on each processing unit.Type: ApplicationFiled: June 24, 2016Publication date: December 28, 2017Inventors: Abhinandan Majumdar, Brian J. Kocoloski, Leonardo Piga, Wei Huang, Yasuko Eckert
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Publication number: 20170371720Abstract: A method and processing apparatus for accelerating program processing is provided that includes a plurality of processors configured to process a plurality of tasks of a program and a controller. The controller is configured to determine, from the plurality of tasks being processed by the plurality of processors, a task being processed on a first processor to be a lagging task causing a delay in execution of one or more other tasks of the plurality of tasks. The controller is further configured to provide the determined lagging task to a second processor to be executed by the second processor to accelerate execution of the lagging task.Type: ApplicationFiled: June 23, 2016Publication date: December 28, 2017Applicant: Advanced Micro Devices, Inc.Inventors: Arkaprava Basu, Dmitri Yudanov, David A. Roberts, Mitesh R. Meswani, Sergey Blagodurov
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Publication number: 20170371721Abstract: General-purpose distributed data-parallel computing using a high-level language is disclosed. Data parallel portions of a sequential program that is written by a developer in a high-level language are automatically translated into a distributed execution plan. The distributed execution plan is then executed on large compute clusters. Thus, the developer is allowed to write the program using familiar programming constructs in the high level language. Moreover, developers without experience with distributed compute systems are able to take advantage of such systems.Type: ApplicationFiled: July 10, 2017Publication date: December 28, 2017Applicant: Microsoft Technology Licensing, LLCInventors: Yuan Yu, Dennis Fetterly, Michael Isard, Ulfar Erlingsson, Mihai Budiu
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Publication number: 20170371722Abstract: Example systems and methods to mediate messages in a product integration platform are disclosed and described. An example method includes receiving a request message from an integration platform, the request message being received in a canonical data format. The example method includes denormalizing the request message into an interface request message format, the interface request message format corresponding to a message format implemented by an interface. The example method includes translating the request message from the interface request message format into a target healthcare system format, the target healthcare system format corresponding to a message format implemented by a target healthcare system, wherein the interface is associated with the target healthcare system. The example method includes sending the request message to the target healthcare system.Type: ApplicationFiled: August 16, 2017Publication date: December 28, 2017Inventors: Rizwan Ahmed, Vishal Vijayan
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Publication number: 20170371723Abstract: A method of providing notifications in a control plane of a computer system includes executing a service host process of the control plane on a software platform of the computer system, the service host process managing services of the control plane and a persistent document store that stores service states for the services. The method may include creating a query task service of the control plane, a service state of the query task service including a query filter; evaluating each of the service states against the query filter as each of the service states is added to the persistent document store; updating the service state of the query task service for each of the service states that satisfies the query filter; and sending a notification to a plurality of subscribers of the query task service in response to each update to the service state of the query task service.Type: ApplicationFiled: June 28, 2016Publication date: December 28, 2017Inventors: Georgios CHRYSANTHAKOPOULOS, Pieter NOORDHUIS
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Publication number: 20170371724Abstract: A service manages a plurality of virtual machine instances for low latency execution of user codes. The service can provide the capability to execute user code in response to events triggered on various event sources and initiate execution of other control functions to improve the code execution environment in response to detecting errors or unexpected execution results. The service may maintain or communicate with a separate storage area for storing code execution requests that were not successfully processed by the service. Requests stored in such a storage area may subsequently be re-processed by the service.Type: ApplicationFiled: May 15, 2017Publication date: December 28, 2017Inventors: Timothy Allen Wagner, Ajay Nair, Marc John Brooker, Scott Daniel Wisniewski
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Publication number: 20170371725Abstract: A method, information processing system, and computer program product are provided for managing operating system interference on applications in a parallel processing system. A mapping of hardware multi-threading threads to at least one processing core is determined, and first and second sets of logical processors of the at least one processing core are determined. The first set includes at least one of the logical processors of the at least one processing core, and the second set includes at least one of a remainder of the logical processors of the at least one processing core. A processor schedules application tasks only on the logical processors of the first set of logical processors of the at least one processing core. Operating system interference events are scheduled only on the logical processors of the second set of logical processors of the at least one processing core.Type: ApplicationFiled: August 24, 2017Publication date: December 28, 2017Applicant: International Business Machines CorporationInventors: John DIVIRGILIO, Liana L. FONG, John LEWARS, Seetharami R. SEELAM, Brian F. VEALE
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Publication number: 20170371726Abstract: A system for predictive analysis of very large data sets using an actor-driven distributed computational graph, wherein a pipeline orchestrator creates and manages individual data pipelines while providing data caching to enable interactions between specific activity actors within pipelines. Each pipeline then comprises a pipeline manager that creates and manages individual activity actors and directs operations within the pipeline while reporting back to the pipeline orchestrator.Type: ApplicationFiled: June 7, 2017Publication date: December 28, 2017Inventors: Jason Crabtree, Andrew Sellers, John Uchiyama, Ian MacLeod
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Publication number: 20170371727Abstract: Examples relate to execution of interaction flows. The examples disclosed herein enable obtaining, via a user interface of a local client computing device, an interaction flow that defines an order of execution of a plurality of interaction points and values exchanged among the plurality of interaction points, the plurality of interaction points comprising a first interaction point that indicates an event executed by an application; triggering the execution of the interaction flow; determining whether any of remote client computing devices that are in communication with the local client computing device includes the application; and causing the first interaction point to be executed by the application in at least one of the remote client computing devices that are determined to include the application.Type: ApplicationFiled: December 22, 2014Publication date: December 28, 2017Inventors: Inbar Shani, Olga Kogan, Amichai Nitsan
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Publication number: 20170371728Abstract: Systems and methods for generating a programmatic implementation based on a set of recorded API calls. One example includes determining an interval of time during which actions made on an interface associated with a session user account are made, obtaining a set of records from an API call log that indicates a set of API calls made during the interval of time, and generating a programmatic implementation that is usable to submit the set of API calls.Type: ApplicationFiled: September 11, 2017Publication date: December 28, 2017Inventor: Nicholas Alexander Allen
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Publication number: 20170371729Abstract: An information processing device includes: an acquisition unit configured to acquire a determination result of a state of a user, who has given a transmission job execution instruction, determined based on biological information of the user; and a job control unit configured to control an execution of the transmission job according to the user state determination result, wherein when it is determined that the user is in an off-normal state, the job control unit executes a confirmation request process to request the user to make a confirmation related to the transmission job.Type: ApplicationFiled: June 23, 2017Publication date: December 28, 2017Applicant: KONICA MINOLTA, INC.Inventors: Takeshi MINAMI, Junichi Hase, Nobuhiro Mishima, Akihiro Torigoshi, Tomoaki Nakajima, Daisuke Nakano, Yuji Tanaka
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Publication number: 20170371730Abstract: An actuator to execute on a server may be automatically selected based on risk of failure and damage to the server. Requirement specification and environment parameters may be received. A subset of actuators may be selected based on a risk threshold from an actuator catalog database storing actuator information and actuator risk metadata associated with a plurality of actuators. The actuator risk metadata may be augmented with risk information. A ranked list of the subset of actuators may be generated based on the actuator risk metadata associated with each actuator in the subset. An actuator in the ranked list may be executed on the server.Type: ApplicationFiled: June 22, 2016Publication date: December 28, 2017Inventors: Constantin M. Adam, Anuradha Bhamidipaty, Jayan Nallacherry, Debasisha K. Padhi, Yaoping Ruan, Frederick Y.-F. Wu
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Publication number: 20170371731Abstract: In a crash analysis system, a method for analyzing a core dump corresponding to a crash of a computer system is disclosed. A core dump is received wherein the core dump corresponds to a crash of a computer system. A culprit module responsible for the crash of the computer system is determined. A signature back trace, which pertains to a symptom of the crash of the computer system is generated.Type: ApplicationFiled: January 25, 2017Publication date: December 28, 2017Applicant: VMware, Inc.Inventors: Ayoob KHAN, Sowgandh Sunil GADI
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Publication number: 20170371732Abstract: An indication is received. The indication is of an address in a first page in virtual memory used by an application with a static memory corruption. A loadable kernel module will monitor the address. Access to the first page in virtual memory is changed from read/write access to read only access. A second page in virtual memory is created with read/write access. Whether a page fault occurs on the first page in virtual memory during the execution of the application with the static memory corruption is determined.Type: ApplicationFiled: September 14, 2017Publication date: December 28, 2017Inventors: Jia He, Zhong Li
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Publication number: 20170371733Abstract: Guest memory data structures are read by one or more read operations which are set up to handle page faults and general protection faults generated during the read in various ways. If such a fault occurs while performing the one or more read operations, the fault is handled and the one or more read operation is terminated. The fault is handled by either dropping the fault and reporting an error instead of the fault, by dropping the fault and invoking an error handler that is set up prior to performing the read operations, or by forwarding the fault to a fault handler that is setup prior to performing the read operations. If no fault occurs, the read operations complete successfully. Thus, under normal circumstances, no fault is incurred in a read operation on guest memory data structures.Type: ApplicationFiled: June 24, 2016Publication date: December 28, 2017Inventors: Radu RUGINA, Jeffrey W. SHELDON, James S. MATTSON, JR., David DUNN
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Publication number: 20170371734Abstract: A computer-implemented method for monitoring a crash analysis system is disclosed. Log messages are accessed pertaining to the operation of a crash analysis system for analyzing a core dump. The log messages are analyzed, at a processor, in order to generate operation results data. A graphic user interface for display on a computer is generated. The graphic user interface includes a graphical representation of the operation results data.Type: ApplicationFiled: January 25, 2017Publication date: December 28, 2017Applicant: VMware, Inc.Inventors: Sowgandh Sunil GADI, Naveen Prakash RAO
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Publication number: 20170371735Abstract: A computer-implemented method for providing crash results for a computer system on a graphical user interface is disclosed. A component access control feature is displayed on a graphic user interface. The component access control feature enables a user to select a component and view crash results pertaining to the component. A graphical representation for display on the graphic user interface is generated. The graphical representation includes at least a portion of a signature back trace corresponding to a crash associated with the component.Type: ApplicationFiled: January 25, 2017Publication date: December 28, 2017Applicant: VMware, Inc.Inventors: Sowgandh Sunil GADI, Ayoob KHAN, Travis FINCH, Kali GADDAM
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Publication number: 20170371736Abstract: A computer-implemented method assessing the risk of a future crash occurring on a computer system is disclosed. Crash results are received from a crash analysis system. The crash results are analyzed, at a processor, to determine the likelihood of the future crash occurring on the computer system. Information regarding the likelihood of the future crash occurring on the computer system is provided to a user of the computer system.Type: ApplicationFiled: January 25, 2017Publication date: December 28, 2017Applicant: VMware, Inc.Inventors: Sowgandh Sunil GADI, Ayoob KHAN, Vihang KARAJGAONKAR
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Publication number: 20170371737Abstract: A first processor enters a control record in a database and then selects the control record and locks it with a pessimistic lock. If the first processor finishes its operations, it deletes the control record. A subsequent processor searches for the control record and attempts to lock it with a pessimistic lock. If the subsequent processor is successful in locking the control record, it determines that the first processor has failed in performing its process, and takes desired action.Type: ApplicationFiled: June 22, 2016Publication date: December 28, 2017Inventors: Lennart Conrad, Per Lykke Lynnerup, Philip Raymond Winstead
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Publication number: 20170371738Abstract: A power delivery system of a computing system that is on alternating current (AC) power limits software administrative tasks to a system-controlled and tunable broadcast window. This window limitation allows a computing system to enter and stay in low-power states without variable disturbances from administrative functions that can be relegated to the window. For example, maintenance is restricted until the computing system broadcasts a notification. Legacy software and devices that do not understand these notifications can be told the AC power is not present nominally, and then be notified of AC power presence during maintenance intervals.Type: ApplicationFiled: June 23, 2016Publication date: December 28, 2017Applicant: INTEL CORPORATIONInventor: Barnes Cooper
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Publication number: 20170371739Abstract: Systems and method of error checking for instructions method of error checking for instructions include an assembler for creating an instruction packet with one or more instructions, determining if a parity of the instruction packet matches a predesignated parity, and if the parity of the instruction packet does not match the predesignated parity, using a bit of the instruction packet to change parity of the instruction packet to match the predesignated parity. The instruction packet with the predesignated parity is stored in a memory, and may eventually be retrieved by a processor for execution. If there is an error in the instruction packet retrieved from the memory, the error is detected based on comparing the parity of the instruction packet to the predesignated parity.Type: ApplicationFiled: June 24, 2016Publication date: December 28, 2017Inventor: Erich James PLONDKE
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Publication number: 20170371740Abstract: A memory device is disclosed that includes a row of storage locations that form plural columns. The plural columns include data columns to store data and a tag column to store tag information associated with error locations in the data columns. Each data column is associated with an error correction location including an error code bit location. Logic retrieves and stores the tag information associated with the row in response to activation of the row. A bit error in an accessed data column is repaired by a spare bit location based on the tag information.Type: ApplicationFiled: July 10, 2017Publication date: December 28, 2017Inventors: Frederick A. Ware, Brent Haukness
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Publication number: 20170371741Abstract: Technologies for providing file-based data resiliency include an apparatus having a memory to store file data and a processor to manage encode or decode operations on the file data. The processor is to determine an increase in file size to be allocated for a reserved portion of a file to be stored in the memory, generate an erasure code based on content of the file and the determined increase in file size, wherein the erasure code is to facilitate decorruption of the file, and write the erasure code to the reserved portion of the file.Type: ApplicationFiled: June 27, 2016Publication date: December 28, 2017Inventor: Vinodh Gopal
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Publication number: 20170371742Abstract: A storage device includes a nonvolatile memory device and a controller. A nonvolatile memory device includes a plurality of memory blocks. Each of the plurality of memory blocks is divided into a plurality of zones and is formed on a substrate. Each of the plurality of zones comprises one or more word lines. A controller performs a reliability verification read operation on a first zone of the plurality of zones of a memory block selected from the plurality of memory blocks if a number of read operations performed on the first zone reaches a first threshold value and performs the reliability verification read operation on a second zone of the plurality of zones of the selected memory block if a number of read operations performed on the second zone reaches a second threshold value.Type: ApplicationFiled: April 21, 2017Publication date: December 28, 2017Inventors: YOUNG-SEOP SHIM, JAEHONG KIM
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Publication number: 20170371743Abstract: A system and method for protecting memory instructions against faults are described. The system and method include converting the slave instructions to dummy operations, modifying memory arbiter to issue up to N master and N slave global/shared memory instructions per cycle, sending master memory requests to memory system, using slave requests for error checking, entering master requests to the GM/LM FIFO, storing slave requests in a register, and comparing the entered master requests with the stored slave requests.Type: ApplicationFiled: June 22, 2016Publication date: December 28, 2017Applicant: Advanced Micro Devices, Inc.Inventors: John Kalamatianos, Michael Mantor, Sudhanva Gurumurthi
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Publication number: 20170371744Abstract: A first phase of a programming process is performed to program data into a set of non-volatile memory cells using a set of verify references and allowing for a first number of programming errors. After completing the first phase of programming, an acknowledgement is provided to the host that the programming was successful. The memory system reads the data from the set of non-volatile memory cells and uses an error correction process to identify and correct error bits in the data read. When the memory system is idle and after the acknowledgement is provided to the host, the memory system performs a second phase of the programming process to program the corrected error bits into the set of the non-volatile memory cells using the same set of verify references and allowing for a second number of programming errors.Type: ApplicationFiled: June 24, 2016Publication date: December 28, 2017Applicant: SANDISK TECHNOLOGIES LLCInventors: Rohit Sehgal, Nian Niles Yang
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Publication number: 20170371745Abstract: A semiconductor device may include an operation control circuit configured to generate a detection signal based on an internal temperature of the semiconductor device. The semiconductor device may include an error correction circuit configured to output read data as output data with or without performing an error correction operation and with or without performing a scrub operation based on the detection signal.Type: ApplicationFiled: September 6, 2016Publication date: December 28, 2017Inventors: Do Yun LEE, Chang Hyun KIM
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Publication number: 20170371746Abstract: A semiconductor device correcting data errors using a hamming code is provided. The hamming code is realized by an error check matrix, and the error check matrix includes a first sub- matrix and a second sub-matrix. The first sub-matrix includes column vectors having an odd weight. The second sub-matrix includes an up matrix and a down matrix. Each of the up matrix and the down matrix includes column vectors having an odd weight.Type: ApplicationFiled: December 8, 2016Publication date: December 28, 2017Inventor: Chang Hyun KIM
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Publication number: 20170371747Abstract: A computer determines whether it has received user input or a node within a replica set has reached a capacity threshold. Based on receiving user input or determining that a node within a replica set has reached a capacity threshold, creating a snapshot of the data stored in the replica set and partitioning the data based on the created snapshot. The computer then initializing nodes within a new replica set and moves a partition from the original replica set to the new replica set before deleting the other partition from the old replica set.Type: ApplicationFiled: June 28, 2016Publication date: December 28, 2017Inventors: VITA BORTNIKOV, SHLOMIT I. SHACHOR, ILYA SHNAYDERMAN