Patents Issued in August 14, 2018
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Patent number: 10048957Abstract: A technique for deploying an application in a cloud computing environment includes: collecting, when a user is deploying an application, metadata and instructions on deploying the application, the metadata comprising service metadata, application metadata and topology metadata, wherein the service metadata comprise metadata on a service required for deploying the application, the application metadata comprise metadata on the application, and the topology metadata comprise metadata indicative of a relationship between the service and the application; and storing the collected metadata and instructions as a model for re-deploying the application.Type: GrantFiled: April 27, 2016Date of Patent: August 14, 2018Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Tong Li, Xin Sheng Mao, Jia Tan, Bo Yang
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Patent number: 10048958Abstract: Techniques for live data management are described. Some embodiments provide a Live Data Management System (“LDMS”) that provides a facility for managing live data objects and for efficiently developing client-server applications that utilize such live data objects. Live data objects are modules of computation that exist on both a client side and server side portion of a client-server application. Live data objects are configured to monitor changes to data hosted on or accessible via the server side, and to automatically update the client side without the need for polling or other requests made by the client side. The described techniques facilitate efficient software development of Web-based client server applications.Type: GrantFiled: May 31, 2017Date of Patent: August 14, 2018Inventor: Marck R. Robinson
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Patent number: 10048959Abstract: Disclosed is a method and an apparatus for incremental upgrade. When a server generates an incremental file, it acquires sub-files of different types in an old version compressed file and a new version compressed file, and performs different difference comparison steps on the sub-files of different types, to obtain difference data files for corresponding types: for sub-files that satisfy a preset decompression condition, a decompression comparison method is used to perform difference comparison, and for sub-files that do not satisfy the preset decompression condition, a direct comparison method is used to perform difference comparison; subsequently, a client acquires the difference data files from the server, and according to the type of a difference data file, carries out a merge operation on the difference data file and the old version compressed file to obtain the new version compressed file.Type: GrantFiled: September 18, 2014Date of Patent: August 14, 2018Assignee: Guangzhou UCWEB Computer Technology Co., Ltd.Inventor: Xiaozhi Sun
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Patent number: 10048960Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for identifying source code used to build executable. One of the methods includes determining that a first newly created process is a compiler, the compiler being invoked to compile a source code file; after the compiler exits, generating a first hash value of an object file generated by the compiler; generating an object artifact that identifies the source code file and includes the first hash value of contents of the object file generated by the compiler; determining that the second newly created process is a linker, the linker being invoked to generate an executable file from one or more object files; generating a link artifact that includes respective hash values of each of the one or more object files used to generate the executable file; and providing the link artifact and object artifact to a static analysis system.Type: GrantFiled: December 17, 2014Date of Patent: August 14, 2018Assignee: Semmle LimitedInventor: Peter Cawley
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Patent number: 10048961Abstract: This document describes, among other things, systems and methods for managing distributed parallel builds. A computer-implemented method to manage parallel builds, comprises identifying one or more software components in a software project, wherein each software component includes an executable binary file; determining a build configuration for each software component, wherein the build configuration includes a mapping from each software component to one or more build servers; and building each software component using the mapped one or more build servers in the corresponding build configuration, wherein the building includes compiling one or more source files associated with each software component to one or more object files, by distributing the one or more source files to one or more compilation machines.Type: GrantFiled: December 14, 2016Date of Patent: August 14, 2018Assignee: eBay Inc.Inventor: Kevin Gu
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Patent number: 10048962Abstract: A computer memory device and a method of storing data are provided. The computer memory device includes a parallel memory interface configured to be operatively coupled to a system memory controller, to receive data and commands including logical addresses from the system memory controller, and to transmit data to the system memory controller. The parallel memory interface is configured to respond to the commands from the storage device driver of a computer processing unit. The computer memory device further includes an address translation circuit configured to receive the logical addresses from the parallel memory interface and to translate the received logical addresses to corresponding physical addresses. The computer memory device further includes a non-volatile memory operatively coupled to the parallel memory interface and the address translation circuit.Type: GrantFiled: February 7, 2017Date of Patent: August 14, 2018Assignee: XITORE, INC.Inventors: Mike Hossein Amidi, Hossein Hashemi, Douglas Lane Finke
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Patent number: 10048963Abstract: Executing system call vectored (SCV) instructions in a multi-slice processor including receiving, by an instruction fetch unit, a SCV instruction, wherein the SCV instruction is a system call from an operating system; sending the SCV instruction to a branch issue queue; determining, by the branch issue queue, that the SCV instruction is next-to-complete; issuing the SCV instruction to a branch resolution unit; and executing the SCV instruction by the branch resolution unit.Type: GrantFiled: May 23, 2016Date of Patent: August 14, 2018Assignee: International Business Machines CorporationInventors: Susan E. Eisen, Nicholas R. Orzol, Mehul Patel, Eula A. Tolentino
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Patent number: 10048964Abstract: In a processor, a disambiguation-free out of order load store queue method. The method includes implementing a memory resource that can be accessed by a plurality of asynchronous cores; implementing a store retirement buffer, wherein stores from a store queue have entries in the store retirement buffer in original program order; and upon dispatch of a subsequent load from a load queue, searching the store retirement buffer for address matching. The method further includes in cases where there are a plurality of address matches, locating a correct forwarding entry by scanning for the store retirement buffer for a first match; and forwarding data from the first match to the subsequent load.Type: GrantFiled: December 12, 2014Date of Patent: August 14, 2018Assignee: Intel CorporationInventor: Mohammad A. Abdallah
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Patent number: 10048965Abstract: A processor includes a front end, an execution pipeline, and a binary translator. The front end includes logic to receive an instruction and to dispatch the instruction to a binary translator. The binary translator includes logic to determine whether the instruction includes a control-flow instruction, identify a source address of the instruction, identify a target address of the instruction, determine whether the target address is a known destination based upon the source address, and determine whether to route the instruction to the execution pipeline based upon the determination whether the target address is a known destination based upon the source address. The target address includes an address to which execution would indirectly branch upon execution of the instruction.Type: GrantFiled: March 10, 2017Date of Patent: August 14, 2018Assignee: Intel CorporationInventors: Petros Maniatis, Shantanu Gupta, Naveen Kumar
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Patent number: 10048966Abstract: A processor includes an instruction decoder to receive an instruction having a first operand, a second operand, and a third operand, and an execution unit coupled to the instruction decoder to execute the instruction, the execution unit to individually perform a shift operation by at least one bit for each of a plurality of data elements stored in a storage location indicated by the second operand, for each of the data elements that has an overflow in response to the shift-left operation, to carry over the overflow into an adjacent data element based on a first bitmask obtained from the third operand, generating a final result, and to store the final result in a storage location indicated by the first operand.Type: GrantFiled: January 10, 2017Date of Patent: August 14, 2018Assignee: Intel CorporationInventors: Hariharan L. Thantry, Mani Azimi
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Patent number: 10048967Abstract: Methods of running a 32-bit operating system on a 64-bit processor are described. In an embodiment, the processor comprises 64-bit hardware and when running a 64-bit operating system operates as a single-threaded processor. However, when running a 32-bit operating system (which may be a guest operating system running on a virtual machine), the processor operates as a two-threaded core. The register file is logically divided into two portions, one for each thread, and logic within a functional unit may be split between threads, shared between threads or duplicated to provide an instance of the logic for each thread. Configuration bits may be set to indicate whether the processor should operate as a single-threaded or multi-threaded device.Type: GrantFiled: July 14, 2015Date of Patent: August 14, 2018Assignee: MIPS Tech, LLCInventor: Hugh Jackson
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Patent number: 10048969Abstract: A processor includes: an instruction execution unit that executes an instruction; and a branch prediction unit that stores history information indicating every instruction fetches performed a certain number of times before an instruction fetch of a branch prediction target instruction whether the instruction predicted as branch-taken is included and weight tables including weights corresponding to instructions and predicts the branch prediction target instruction to be taken or not-taken. The branch prediction unit, before the instruction fetch of the branch prediction target instruction, obtains the history information and the weights related to the instruction fetches performed the certain number of times to perform a product-sum operation, and at the time of the instruction fetch of the branch prediction target instruction, performs an operation of a result of the product-sum operation and a weight of the branch prediction target instruction to perform branch prediction.Type: GrantFiled: June 7, 2016Date of Patent: August 14, 2018Assignee: FUJITSU LIMITEDInventors: Ryohei Okazaki, Takashi Suzuki
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Patent number: 10048970Abstract: Certain aspects direct to systems and methods for performing boot configuration of a thin client device with a portable storage device, such as a universal serial bus (USB) storage device. The system includes a computing device functioning as a thin client device, which has an interface under a protocol, such as the USB interface, allowing the portable storage device to be connected to the computing device via the interface. The portable storage device stores configuration data for configuring the computing device. Before booting, the computing device checks if the configuration data exists in a local storage device. If not, the computing device attempts to access the portable storage device, in order to automatically retrieve the configuration data from the portable storage device. Once the configuration data is obtained, the computing device may proceed with booting, and configure the computing device based on information of the configuration data without manual intervention.Type: GrantFiled: August 26, 2016Date of Patent: August 14, 2018Assignee: AMERICAN MEGATRENDS, INC.Inventors: Varadachari Sudan Ayanam, Samvinesh Christopher, Veerajothi Ramasamy, Muthukkumaran Ramalingam, Indira Valmiki, Manikandan Ganesan Malliga
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Patent number: 10048971Abstract: Determining a characteristic of a configuration file that is used to discover configuration files in a target machine, a computer identifies, using information associated with a configuration item of a machine, a candidate configuration file related to the configuration item of the machine, from among a plurality of files from the machine. The computer extracts a value of a feature of the candidate configuration file and aggregates the candidate configuration file with a second candidate configuration file related to the same configuration item identified from among a plurality of files from a second machine, based on the extracted value. The computer then determines a configuration file related to the configuration item from among the aggregated candidate configuration files based on a result of the aggregation, and determines a characteristic of the configuration file related to the configuration item.Type: GrantFiled: June 10, 2015Date of Patent: August 14, 2018Assignee: International Business Machines CorporationInventors: Ajay A. Apte, Chang Sheng Li, Fan Jing Meng, Joseph P. Wigglesworth, Jing Min Xu, Bo Yang, Xue Jun Zhuo
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Patent number: 10048972Abstract: A method for model-based generation of startup configurations of embedded systems that includes importing into a modeling module a first startup configuration in textual representation by a system synchronization module, generating a graphical representation of the startup configuration by the modeling module, and modifying the graphical representation of the first startup configuration generating from the modified graphical representation a second, modified startup configuration in textual representation by the modeling module, and exporting the second modified startup configuration into the system synchronization module, which can simplify generation of startup configurations of an embedded system.Type: GrantFiled: June 16, 2015Date of Patent: August 14, 2018Assignee: Continental Automotive GmbHInventors: Marc Heinlein, Joachim Schott
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Patent number: 10048973Abstract: A non-transitory storage maintains a project script including a sequence of steps, each step including a description of the step and a sound signature indicative of ambient sounds that occur during performance of the step. An audio processor is programmed to receive ambient audio input and perform a time frequency analysis of the ambient audio input. A controller is programmed to provide a description of a next step of the project script upon completion of a current step identified responsive to the time frequency analysis of the ambient audio input matching a sound signature corresponding to the next step of the project script.Type: GrantFiled: September 22, 2017Date of Patent: August 14, 2018Assignee: Harman International Industries, IncorporatedInventors: Meenakshi Barjatia, James M. Kirsch
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Patent number: 10048974Abstract: A system for routing requests to execute user code based on how frequently the user code is executed is provided. The system may be configured to receive a request to execute user code on a virtual compute system, where the virtual compute system comprises multiple fleets of virtual machine instances. The system may be further configured to determine whether the user code associated with the request satisfies one or more usage criteria, and based on the determination, route the request to the appropriate fleet of virtual machine instances.Type: GrantFiled: September 30, 2014Date of Patent: August 14, 2018Assignee: Amazon Technologies, Inc.Inventors: Timothy Allen Wagner, Derek Steven Manwarin, Sean Philip Reque, Dylan Chandler Thomas
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Patent number: 10048975Abstract: A method includes validating, by a switch, a message including virtual machine (VM) information using a value of a virtual station interface (VSI) type identification (ID) to perform a lookup of a fetched VSI database. The VM information for the VM comprises VSI type ID and virtual local area network (VLAN) ID. The switch retrieves an address of the VM from a first table for multiple different VM types based on using VSI type ID and network ID. The switch retrieves rules associated with the retrieved address of the VM and the VSI type ID from a second table including VM information. The switch applies the associated rules for the VM.Type: GrantFiled: August 17, 2016Date of Patent: August 14, 2018Assignee: International Business Machines CorporationInventors: Vasmi M. Abidi, Chandramouli Radhakrishnan
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Patent number: 10048976Abstract: Technologies are generally described to allocation of virtual machines to physical machines through dominant resource assisted heuristics. According to some examples, multiple virtual machines (VMs) may be clustered to two or more unallocated VM clusters according to a dominant resource requirement associated with each of the VMs. The VMs may be sorted according to a size attribute associated with the dominant resource requirement. Multiple physical machines (PMs) may be sorted according to a power efficiency attribute associated with each of the PMs. One of the PMs may be selected from an ordered list of PMs based on the power efficiency attribute. One of the VMs may be selected from another ordered list of PMs based on the size attribute. The selected VM may then be allocated to the selected PM.Type: GrantFiled: November 29, 2013Date of Patent: August 14, 2018Assignee: NEW JERSEY INSTITUTE OF TECHNOLOGYInventors: Nirwan Ansari, Yan Zhang
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Patent number: 10048977Abstract: Methods and Apparatus for Multi-Stage VM Virtual Network Function and Virtual Service Function Chain Acceleration for NFV and needs-based hardware acceleration. Compute platform hosting virtualized environments including virtual machines (VMs) running service applications performing network function virtualization (NFV) employ Field Programmable Gate Array (FPGA) to provide a hardware-based fast path for performing VM-to-VM and NFV-to-NFV transfers. The FPGAs, along with associated configuration data are also configured to support dynamic assignment and performance of hardware-acceleration to offload processing tasks from processors in virtualized environments, such as cloud data centers and the like.Type: GrantFiled: December 22, 2015Date of Patent: August 14, 2018Assignee: Intel CorporationInventors: Stephen T. Palermo, Thomas E. Willis, Kapil Sood, Ilango S. Ganga, Scott P. Dubal, Pradeepsunder Ganesh, Jesse C. Brandeburg
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Patent number: 10048978Abstract: At a first time of detecting, from among a plurality of virtual machines as management targets, a first virtual machine that has not stored therein identification information generated based on an internal time of the computer, an apparatus causes the first virtual machine to store first identification information generated based on a first internal time of the computer corresponding to the first time, and at a second time of detecting a second virtual machine which has stored the first identification information and whose setting regarding network connection has been changed after storing the first identification information, the apparatus cause the second virtual machine to store second identification information generated based on a second internal time of the computer corresponding to the second time.Type: GrantFiled: January 26, 2016Date of Patent: August 14, 2018Assignee: FUJITSU LIMITEDInventor: Hiroshi Iyobe
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Patent number: 10048979Abstract: Systems and method for the management of migrations of virtual machine instances are provided. A migration manager monitors the resource usage of a virtual machine instance over time in order to create a migration profile. When migration of a virtual machine instance is desired, the migration manager schedules the migration to occur such that the migration conforms to the migration profile.Type: GrantFiled: February 1, 2016Date of Patent: August 14, 2018Assignee: Amazon Technologies, Inc.Inventors: Pradeep Vincent, Nathan Thomas
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Patent number: 10048980Abstract: One embodiment includes obtaining virtual machine (VM) information for at least one VM. The VM information includes a VSI type identification (ID) associated with each VM. A policy discriminator (PD) is associated for each VSI type ID, where the PD represents scalable policy assignment. At least one rule and bandwidth filter information associated with a VSI type ID is retrieved from virtual station interface (VSI) database (DB) information and PD for each VSI type ID. The associated at least one rule and filter information is applied based on one of multiple PD types. The multiple PD types comprise a VM type and a virtual local area network (vLAN) type.Type: GrantFiled: October 28, 2016Date of Patent: August 14, 2018Assignee: International Business Machines CorporationInventors: Vasmi M. Abidi, Chandramouli Radhakrishnan
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Patent number: 10048981Abstract: An estimated time to migrate a VM from a source hypervisor to a target hypervisor is calculated. The estimated time is compared to a threshold time and based on the estimated time meeting the threshold time, a migration of the VM from the source hypervisor to the target hypervisor via the network is initiated. Based on the estimated time not meeting the threshold time, it is determined whether an additional path can be added to the network between the source hypervisor and the target hypervisor. If an additional path cannot be added to the network, a migration of the VM from the source hypervisor to the target hypervisor via the network is initiated. If an additional path can be added to the network, the additional path is added and the migration via the network is initiated.Type: GrantFiled: November 21, 2017Date of Patent: August 14, 2018Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Robert J. Brenneman, Eli M. Dow, Thomas D. Fitzsimmons, Jessie Yu
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Patent number: 10048982Abstract: A virtual-machine-based system that identifies an application or process in a virtual machine in order to locate resources associated with the identified application. Access to the located resources is then controlled based on a context of the identified application. Those applications without the necessary context will have a different view of the resource.Type: GrantFiled: April 25, 2016Date of Patent: August 14, 2018Assignee: VMware, Inc.Inventors: Xiaoxin Chen, Carl A. Waldspurger, Pratap Subrahmanyam
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Patent number: 10048983Abstract: Systems and methods are provided for enlisting single phase commit resources in a two phase commit transaction. An exemplary method includes accessing a global transaction having a plurality of processes requiring single phase commit (1PC) resource and a two phase commit (2PC) resource, initializing a 1PC resource manager for the 1PC resource with a first process of the plurality of processes, wherein the first process requires the 1PC resource, preparing a 2PC resource manager for the 2PC resource with a second process of the plurality of processes, wherein the second process requires the 2PC resource, generating a unique identifier for the 1PC resource, transmitting the unique identifier to the 1PC resource manager, and instructing the 1PC resource manager to commit the first process to the 1PC resource, wherein committing the first process to the 1PC resource comprises recording the unique identifier to the 1PC resource.Type: GrantFiled: April 2, 2014Date of Patent: August 14, 2018Assignee: RED HAT, INC.Inventors: Tom Jenkinson, Michael Musgrove, Paul Robinson, Jonathan Halliday, Jesper Pedersen, Mark Little
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Patent number: 10048984Abstract: Computer implemented techniques comprise instructions configured to cause a processor to obtain routines, receive a user defined set of obtained routines to form a chain of at least two routines, produce the chain of the at least two routines according to the user defined set of routines, receive a user defined designation of the chain as a workflow, and produce by the computing system the designated workflow.Type: GrantFiled: May 27, 2015Date of Patent: August 14, 2018Assignee: Kaseya International LimitedInventors: Prakash Khot, Pradeep Reddy, Jogeshwar Karthik Akundi, Samit Sasan, Pushkar Priyadarshi
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Patent number: 10048985Abstract: Techniques for estimating time remaining for an operation are described. Examples operations include file operations, such as file move operations, file copy operations, and so on. A wide variety of different operations may be considered in accordance with the claimed embodiments, further examples of which are discussed below. In at least some embodiments, estimating a time remaining for an operation can be based on a state of the operation. A state of an operation, for example, can be based on events related to the operation itself, such as the operation being initiated, paused, resumed, and so on. A state of an operation can also be based on events related to other operations.Type: GrantFiled: January 21, 2015Date of Patent: August 14, 2018Assignee: Microsoft Technology Licensing, LLCInventors: Francisco Alvarez Cavazos, Jordi Mola
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Patent number: 10048986Abstract: The present invention relates to a method and device for allocating a browser process. The method comprises: first, obtaining data related to a current system operating environment, and then allocating a browser process based on the data. The present invention allocates the browser process intelligently according to the current system operating environment, maximally improving the performance in use of the browser, and can be applied in any kind of electronic devices.Type: GrantFiled: February 6, 2012Date of Patent: August 14, 2018Assignee: BEIJING QIHOO TECHNOLOGY COMPANY LIMITEDInventors: Hongwei Liu, Chenxi Zhao, Zhenyu Xie
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Patent number: 10048987Abstract: Methods and apparatus for providing resource quality estimation in a resource sharing platform having a master and resources on slaves. Embodiments include storing resource performance data for the resources and estimating resource performance using the stored performance data. A framework can use the estimated resource performance data to select between a first resource offer and a second resource offer, which can be equivalent.Type: GrantFiled: December 21, 2015Date of Patent: August 14, 2018Assignee: EMC IP HOLDING COMPANY LLCInventors: Stephen G. Graham, Eric Gelinas, Frederic Meunier, Alexandre Lemay, Raphaël Aubert, Salvatore DeSimone, Dominique Prunier
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Patent number: 10048988Abstract: A method of operating an electronic device includes segmenting a second message in a first message, allocating the segmented second message to at least two queues, and performing a parallel-processing of the first message based on the allocated second message.Type: GrantFiled: November 18, 2015Date of Patent: August 14, 2018Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Young-Joo Hong, Kyoung-Joong Shin, Dong-Gyu Ahn, Hak-Ryoul Kim, Hyo-Jong Kim, Ji-Ho Ma, Surng-Kyo Oh
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Patent number: 10048989Abstract: This disclosure sets forth systems and methods for recommending candidate computing platforms for migration of data and data-related workload from an original computing platform. The systems and methods further describe determining recommendations of candidate computing platforms based on a comparison of key performance and utilization statistics of the original computing platform under a user-generated workload with candidate computing platforms under a synthetic workload. Key performance and utilization statistics may relate to CPU, memory, file I/O, network I/O, and database I/O operations on the respective computing platforms. The synthetic workload may be defined by parameters that simulate the key performance and utilization statistics of the original computing platform under the user-generated workload. Further, the synthetic workloads may be executed on individual candidate computing platforms to determine service level capabilities that are ultimately used to form the recommendation.Type: GrantFiled: May 18, 2016Date of Patent: August 14, 2018Assignee: Krystallize Technologies, Inc.Inventors: Roger Richter, Matthew Gueller, James Richard Nolan
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Patent number: 10048990Abstract: A high availability environment of resource adapters implements processes to manage and to distribute work among the adapters or adapter instances. An input resource, such as a file, is received and tasks are created to distribute the content to the different instances of the adapters that are configured in the cluster. A resource adapter instance switches to manage the creation of the task based on task-definitions of the adapter. The task-definitions are rules specified in the adapter on chunks of data. The tasks are created such that chunks of data are independently locked and processed without duplication. In order to distribute the work, the tasks are persisted into a table/xml on a persistent disk. The remaining instances interact with the table to access the tasks specified by the entries in the table, thus executing the tasks.Type: GrantFiled: November 19, 2011Date of Patent: August 14, 2018Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Anket Jain, Ramkumar Ramalingam, Lohith Ravi, S. VenkataKrishnan
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Patent number: 10048991Abstract: A series data distributed processing system including a parallel processing system and a distributed series data management unit managing distributed series data, wherein: the parallel processing system includes, on each computing device, a data block, a data block processing server for processing the data block, and a block processing integration server for processing a result from the data block processing server, the data block being formed from a plurality of values each associated with one of a plurality of sequential labels in the series data; and the distributed series data management unit includes a distributed information management database for managing data blocks, which retains management data, including sequential label ranges, which refer to ranges of sequential labels in the data blocks, series IDs corresponding to value names in the data blocks, and meta-information identifying computing devices retaining the data blocks.Type: GrantFiled: July 1, 2013Date of Patent: August 14, 2018Assignee: HITACHI, LTD.Inventors: Hiroaki Ozaki, Keiro Muro
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Patent number: 10048992Abstract: An application using one version of a schematized XML protocol communicates with another application using a different version of the schematized XML protocol. The different versions may correspond to different deployments or releases of the protocol. Each application generates messages to be sent using two data sets. A first data set is incorporated into the message using elements available in a standard XML protocol schema. A second data set is incorporated into the message using XML annotation elements. The receiving application processes the message using the schematized XML protocol to parse out the first data set. The receiving application further parses the message to identify the second data set that is carried by enhanced XML annotation elements. Extension or annotations are flexibly added to the XML protocol without requiring the client application to request—or the server application to respond to—a pre-negotiated number or type of annotations.Type: GrantFiled: April 13, 2011Date of Patent: August 14, 2018Assignee: Microsoft Technology Licensing, LLCInventors: Ashutosh Tewari, Adrian Dragomir
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Patent number: 10048993Abstract: The present invention is directed to a method, medium and system for use in a computing environment for managing input information. The system for facilitating input management in a computerized environment may include an input manager for processing events received from an input provider. The system may additionally include a staging area including a stack of events created by the input manager. The staging area allows access by external components. The external components may include a set of filters capable of accessing and manipulating the stack of input events and a set of monitors capable of monitoring manipulation of the stack of events.Type: GrantFiled: August 18, 2014Date of Patent: August 14, 2018Assignee: Microsoft Technology Licensing, LLCInventor: Dwayne Need
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Patent number: 10048994Abstract: Systems and methods for identifying failed customer experience in distributed computer systems. An example method may comprise: receiving, by a processing device of a distributed computer system, a first application layer message associated with a request originated by a client computer system responsive to an action by a user, wherein the first application layer message comprises a transaction identifier identifying a sequence of messages originated by one or more components of the distributed computer system and associated with the request; identifying a pre-defined byte pattern comprised by the first application layer message; and identifying, based on the pre-defined byte pattern, at least one of: a system error associated with the transaction or an application error associated with the transaction.Type: GrantFiled: October 20, 2014Date of Patent: August 14, 2018
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Patent number: 10048995Abstract: A method includes receiving a signal indicative of a value of a data point associated with a compute device at a first time. The value of the data point includes a data point category that is correlated with a fault category. The compute device is operatively coupled to a record module having a protected mode and an unprotected mode. A signal is received indicative of a value of the data point at a second time, after the first time. When a characteristic of a change in the value of the data point at the first time to value of the data point at the second time crosses a threshold in a first direction, a signal is sent to the record module indicative of an instruction to record data associated with the compute device in the protected mode to define a protected data set.Type: GrantFiled: February 28, 2017Date of Patent: August 14, 2018Assignee: Juniper Networks, Inc.Inventors: Aniruddh S. Dikhit, Joseph L. White
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Patent number: 10048996Abstract: A data center may predict infrastructure failures in order to perform mitigation actions at services hosted at the data center. Operational metrics for different infrastructure systems of a data center may be collected and analyzed to generate failure models. The failure models may be evaluated to predict infrastructure failure events. The predicted infrastructure failure events may be programmatically provided to the services. The services may evaluate the prediction and select mitigation actions to perform. For data centers implemented as part of a provider network with services hosted across multiple data centers, mitigation actions may be performed at multiple data centers for a service in response to a predicted failure event at one data center.Type: GrantFiled: September 29, 2015Date of Patent: August 14, 2018Assignee: Amazon Technologies, Inc.Inventors: Charles H. Bell, Joseph Thomas Minarik
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Patent number: 10048997Abstract: A system for mitigating a solid state power controller (SSPC) open fault caused by single event latchup (SEL) on a power module includes a microprocessor in a control communication and power supply module (CCP) configured to determine whether communication with a microcontroller in at least one of a solid state power controller (SSPC) and a second SSPC in the power module is lost. The microprocessor in the CCP is operatively connected to the power module and configured to notify, via a backplane communication bus, the microcontroller on the power module that the communication with the SSPC in the power module is lost. The microcontroller in the SSPC is configured to set a low power operation of a second SSPC in the power module not affected by SEL in response to loss of reception of command messages from the microprocessor in the CCP.Type: GrantFiled: May 4, 2016Date of Patent: August 14, 2018Assignee: HAMILTON SUNDSTRAND CORPORATIONInventors: Milorad Manojlovic, Christian Miller
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Patent number: 10048998Abstract: There is provided a transmission apparatus including: a memory in which history data of a rewrite process on which an in-device header referred in a device is rewritten is stored, the history data including data before and after the rewrite process is stored, and the device of one or more devices included in the transmission apparatus receiving a first frame including the in-device header, performing a specific process and the rewrite process, and outputting a second frame including a rewritten in-device header; and a processor configured to detect a failure of the device, based on data on the in-device header of the first frame, data on the rewritten in-device header of the second frame, and the history data stored in the memory.Type: GrantFiled: December 14, 2016Date of Patent: August 14, 2018Assignee: FUJITSU LIMITEDInventor: Masayuki Tsuda
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Patent number: 10048999Abstract: The present invention discloses a method for optimizing recovery of a single-disk failure, including the following steps: obtaining, according to current load information, an amount of data expected to be read and an allowed number of iterations; obtaining a recovery optimization policy for failed data in each single stripe, and combining an initial recovery policy for multiple stripes; and further optimizing the initial recovery policy by using a greedy algorithm based on tabu search, subject to the amount of data expected to be read and the allowed number of iterations, to finally obtain an optimal recovery policy with a smallest quantity of seeks. The optimization method of the present invention reduces the amount of data to be read and the quantity of seek operations, and improves the efficiency of recovering a single-disk failure. The present invention further discloses an apparatus for optimizing recovery of a single-disk failure.Type: GrantFiled: December 28, 2015Date of Patent: August 14, 2018Inventors: Jiwu Shu, Zhirong Shen
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Patent number: 10049000Abstract: Methods and apparatuses are provided for recovering data transmitted to a terminal. A processor of the terminal selects a plurality of candidate frames expected to include the data from a memory of the terminal. Each of the plurality of candidate frames is received by the terminal and includes one or more errors. The processor compares corresponding values, for each of a plurality of bit sets, in the plurality of candidate frames. Specified fields of the plurality of candidate frames are excluded from comparison. The processor recovers the data based on the comparison.Type: GrantFiled: December 28, 2015Date of Patent: August 14, 2018Assignee: Samsung Electronics Co., LtdInventors: Alexander Thoukydides, Clive Douglas Woon Feather
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Patent number: 10049001Abstract: Server computers often include one or more input/output (I/O) devices for communicating with a network or direct attached storage device. Data written to or read from storage devices may acquire errors in transit. The I/O adapter device may implement processes to generate or check error correction values, where the error correction values are provided to verify the correctness of the written or read value. The I/O adapter device may determine the portion of the data to be used in calculating the error correction value in a flexible and configurable manner.Type: GrantFiled: March 27, 2015Date of Patent: August 14, 2018Assignee: Amazon Technologies, Inc.Inventors: Robert Michael Johnson, Thomas A. Volpe
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Patent number: 10049002Abstract: Bandwidth modulation may enable most of the display data-path to operate at a lower performance level to reduce power consumption by using compression as part of the display engine capability. Use of compression may afford a bit rate reduction and/or lane width reduction on the display interface to support high resolution display. With the bit rate and/or lane reduction and selective use of a refresh rate reduction, this technique can be used to lower the power consumption of the display data-path.Type: GrantFiled: June 26, 2014Date of Patent: August 14, 2018Assignee: Intel CorporationInventors: Seh W. Kwa, Taesung Kim
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Patent number: 10049003Abstract: The ability to accurately and efficiently calculate and report communication errors is becoming more important than ever in today's communications environment. More specifically calculating and reporting CRC anomalies in a consistent manner across a plurality of communications connections in a network is crucial to accurate error reporting. Through a normalization technique applied to a CRC computation period (e.g., the PERp value), accurate error identification and reporting for each individual connection can be achieved.Type: GrantFiled: March 7, 2016Date of Patent: August 14, 2018Assignee: TQ DELTA, LLCInventor: Marcos C. Tzannes
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Patent number: 10049004Abstract: An electronic system includes: a host processor; a system memory, coupled to the host processor, includes data persistence regions identified by the host processor; a non-volatile storage device, including a fast path write (FPW) reserved area, configured to store user data from the system memory in a non-volatile media; and a power monitor unit, coupled to the host processor, configured to detect a power loss by a primary power failure detector and assert a power-loss detection control; and wherein the host processor is configured to engage a RAM flush driver for moving the content of the data persistence regions to a fast path write (FPW) reserved area in the non-volatile media when the power-loss detection control is asserted.Type: GrantFiled: March 7, 2016Date of Patent: August 14, 2018Assignee: Samsung Electronics Co., Ltd.Inventors: Gunneswara Marripudi, Harry Rogers, Fred Worley
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Patent number: 10049005Abstract: A flash memory control apparatus includes a data read/write interface and a controller. The data read/write interface is arranged for coupling a first flash memory and a second flash memory, wherein the first flash memory includes a first storage plane and a first buffer, and the second flash memory includes a second storage plane and a second buffer. The controller is coupled to the data read/write interface, and is arranged for transmitting a plurality of valid data sets stored in the first storage plane to the second buffer through the data read/write interface. After an erase cycle is performed on the first storage plane, the controller further programs the plurality of valid data sets transmitted to the second buffer into the first storage plane.Type: GrantFiled: August 2, 2017Date of Patent: August 14, 2018Assignee: Silicon Motion Inc.Inventor: Tsung-Chieh Yang
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Patent number: 10049006Abstract: A method for updating a DRAM memory array is disclosed. The method comprises: a) transitioning the DRAM memory array from an idle state to a refresh state in accordance with a command from a memory controller; b) initiating a refresh on the DRAM memory array using DRAM internal control circuitry by activating a row of data into an associated sense amplifier buffer; and c) during the refresh, performing an ERR Correction Code (ECC) scrub operation of selected bits in the activated row of the DRAM memory array.Type: GrantFiled: December 8, 2015Date of Patent: August 14, 2018Assignee: Nvidia CorporationInventors: David Reed, Alok Gupta
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Patent number: 10049007Abstract: A non-volatile memory device including a non-volatile memory and a controller is provided. The controller establishes a standard table and at least one priority table according to a read table stored in the non-volatile memory. The probability that the controller utilizes the read voltages corresponding to the indexes recorded in the priority table to read and successfully decode the codewords stored in non-volatile memory is high. When the controller utilizes the read voltages corresponding to the indexes recorded in the priority table to read and unsuccessfully decode the codewords, the controller utilizes the read voltages corresponding to the indexes recorded in the standard table to read and decode the codewords stored in non-volatile memory.Type: GrantFiled: August 22, 2016Date of Patent: August 14, 2018Assignee: VIA TECHNOLOGIES, INC.Inventors: Jiangli Zhu, Ying Yu Tai