Abstract: A loop alignment instruction indicates a base address of an array as a first operand, an iteration limit of a loop as a second operand, and a destination. The loop contains iterations and each iteration includes a data element of the array. A processor receives the loop alignment instruction, decodes the instruction for execution, and stores a result of the execution in the destination. The result indicates the number of data elements at a beginning of the array that are to be handled separately from a remaining portion of the array, such that the base address of the remaining portion of the array aligns with an alignment width.

Abstract: A method and apparatus are described for efficient register reclamation. For example, one embodiment of an apparatus comprises: single usage detection and tagging logic to examine a sequence of instructions to detect logical registers used by the sequence of instructions that have a single use and to tag an instruction as a single usage instruction if the instruction is a consumer of a logical register that has a single use; an allocator to allocate processor resources to execute the sequence of instructions, the processor resources including physical registers mapped to logical registers to execute the sequence of instructions; and register reclamation logic to free up a logical to physical mapping of a single use register in response to detecting the tag provided by the instruction tagging logic.

Abstract: In one embodiment, an apparatus comprises a memory, a processor and a prefix decoder engine to access a plurality of code lengths of a header associated with a compressed data block; determine a number of instances of each code length of at least some of the plurality of code lengths; and operate a plurality of decode streams in parallel, a first decode stream of the plurality of decode streams to iterate through a first portion of the plurality of code lengths and determine codes corresponding to the first portion of the plurality of code lengths, a second decode stream of the plurality of decode streams to iterate through a second portion of the plurality of code lengths and determine codes corresponding to the second portion of the plurality of code lengths.

Abstract: A streaming engine employed in a digital data processor specifies fixed first and second read only data streams. Corresponding stream address generator produces address of data elements of the two streams. Corresponding steam head registers stores data elements next to be supplied to functional units for use as operands. The two streams share two memory ports. A toggling preference of stream to port ensures fair allocation. The arbiters permit one stream to borrow the other's interface when the other interface is idle. Thus one stream may issue two memory requests, one from each memory port, if the other stream is idle. This spreads the bandwidth demand for each stream across both interfaces, ensuring neither interface becomes a bottleneck.

Abstract: One embodiment of the present invention sets forth a technique for managing graphics processing resources in a tile-based architecture. The technique includes storing a release packet associated with a graphics processing resource in a buffer and initiating a replay of graphics primitives stored in the buffer and associated with the graphics processing resource. The technique further includes, for each tile included in a plurality of tiles and processed during the replay, reading the release packet and determining whether the tile is a last tile processed during the replay. The technique further includes determining not to transmit the release packet to a screen-space pipeline and continuing to read graphics data stored in the buffer if the tile is not the last tile to be processed during the replay, or transmitting the release packet to the screen-space pipeline if the tile is the last tile to be processed during the replay.

Abstract: An apparatus and method are described for providing low-latency invocation of accelerators. For example, a processor according to one embodiment comprises: a plurality of simultaneous multithreading (SMT) cores, at least one shared cache circuit to be shared among the SMT cores, and at least one L2 cache circuit to store both instructions and data. The processor further comprises a communication interconnect circuit including a PCIe circuit to communicatively couple one or more of the SMT cores to an accelerator device, the PCIe circuit to provide the accelerator device access to resources of the processor including the at least one shared cache circuit. The processor further comprises a memory access circuit to identify an accelerator context save/restore region in a memory determined by an accelerator context save/restore value, the accelerator context save/restore region to store an accelerator context state.

Abstract: An apparatus including first and second reservation stations. The first reservation station dispatches a load micro instruction, and indicates on a hold bus if the load micro instruction is a specified load micro instruction directed to retrieve an operand from a prescribed resource other than on-core cache memory. The second reservation station is coupled to the hold bus, and dispatches one or more younger micro instructions therein that depend on the load micro instruction for execution after a number of clock cycles following dispatch of the first load micro instruction, and if it is indicated on the hold bus that the load micro instruction is the specified load micro instruction, the second reservation station is configured to stall dispatch of the one or more younger micro instructions until the load micro instruction has retrieved the operand.

Abstract: A processor core having multiple parallel instruction execution slices and coupled to multiple dispatch queues by a dispatch routing network provides flexible and efficient use of internal resources. The configuration of the execution slices is selectable so that capabilities of the processor core can be adjusted according to execution requirements for the instruction streams. Two or more execution slices can be combined as super-slices to handle wider data, wider operands and/or vector operations, according to one or more mode control signal that also serves as a configuration control signal. The mode control signal is also used to partition clusters of the execution slices within the processor core according to whether single-threaded or multi-threaded operation is selected, and additionally according to a number of hardware threads that are active.

Abstract: Processing circuitry can operate in a secure domain and a less secure domain. In response to an initial exception from background processing performed by the processing circuitry, state saving of data from a first subset of registers is performed by exception control circuitry before triggering an exception handling routine, while the exception handling routine has responsibility for performing state saving of data from a second subset of registers. In response to a first exception causing a transition from the secure domain from a less secure domain, where the background processing was in the less secure domain, the exception control circuitry performs additional state saving of data from the second set of registers before triggering the exception handling routine. In response to a tail-chained exception causing a transition from the secure domain to the less secure domain, the exception handling routine is triggered without performing an additional state saving.

Abstract: A method for outputting alternative instruction sequences. The method includes tracking repetitive hits to determine a set of frequently hit instruction sequences for a microprocessor. A frequently miss-predicted branch instruction is identified, wherein the predicted outcome of the branch instruction is frequently wrong. An alternative instruction sequence for the branch instruction target is stored into a buffer. On a subsequent hit to the branch instruction where the predicted outcome of the branch instruction was wrong, the alternative instruction sequence is output from the buffer.

Abstract: A mobile terminal and a method for controlling the mobile terminal are disclosed. A mobile terminal according to one embodiment of the present invention comprises at least one sensor; a first processor for controlling operation of the at least one sensor; a second processor for controlling an application; and a vibration unit detecting a force applied by the user, where the vibration unit is woken up when a force applied by the user exceeds a predetermined magnitude while the at least one sensor, the first processor, the second processor, and the vibration unit are all in a sleep state; and if the first processor is woken up by the vibration unit, the first processor wakes up the second processor based on sensing data collected by the at least one sensor.

Abstract: A method for accessing a signal value of an FPGA at runtime, including the steps of loading an FPGA hardware configuration into the FPGA, executing the FPGA hardware configuration in the FPGA, requesting a signal value of the FPGA, sending status data from a functional level of the FPGA to a configuration memory in its configuration level, reading the status data from the configuration memory as readback data, and determining the signal value of the readback data. A method is also provided for making an FPGA build, based on an FPGA model, using a hardware description language, including the steps of creating an FPGA hardware configuration, identifying memory locations of a configuration memory for status data of at least one signal value based on the FPGA hardware configuration, and creating a list with signal values accessible at runtime and the memory locations corresponding thereto.

Abstract: An electronic apparatus and a booting method thereof are provided. Control a sensing unit to sense a barcode before an operation system is executed by the electronic apparatus. Determine whether the barcode meets a preset barcode. Continue a booting operation of the electronic apparatus if the barcode meets the preset barcode.

Abstract: In an approach to allowing a computer to boot from a user trusted device (UTD), the computer comprises a data storage device storing operating system (OS) services, and a version of an OS loader. The UTD is connectable to the computer and stores a boot loader, detectable by a firmware executing at the computer, and an OS loader, and wherein the UTD prevents an unauthenticated user to modify the boot loader and the OS loader stored thereon. The computer then, upon connection, lets the boot loader be detected by the firmware for execution of the boot loader at least partly at the computer, to cause to transfer the OS loader from the UTD to the computer, and executes the transferred OS loader at least partly from the computer, to execute at least one crypto driver for the OS, to start the OS services and complete booting of the computer.

Abstract: Aspects of an application program's execution which might be subject to non-determinism are performed in a deterministic manner while the application program's execution is being recorded in a virtual machine environment so that the application program's behavior, when played back in that virtual machine environment, will duplicate the behavior that the application program exhibited when originally executed and recorded. Techniques disclosed herein take advantage of the recognition that only minimal data needs to be recorded in relation to the execution of deterministic operations, which actually can be repeated “verbatim” during replay, and that more highly detailed data should be recorded only in relation to non-deterministic operations, so that those non-deterministic operations can be deterministically simulated (rather than attempting to re-execute those operations under circumstances where the outcome of the re-execution might differ) based on the detailed data during replay.

Abstract: A multitasking system and method are provided. The system and method allows a mobile device with a limited amount of resources to execute applications in full and mini modes, thereby using a relatively small amount of resources and efficiently using the execution screens. The method includes detecting a first event for executing a first application, identifying the type of first execution event, executing the first application in at least one of a full mode and a mini mode according to the type of first execution event, and displaying an execution screen of the first application executed in the at least one mode.

Abstract: Provided are systems, methods, and architectures for a neutral input/output (NIO) platform that includes a core that supports one or more services. The core may be thought of as an application engine that runs task specific applications called services. The services are constructed using defined templates that are recognized by the core, although the templates can be customized. The core is designed to manage and support the services, and the services in turn manage blocks that provide processing functionality to their respective service. Due to the structure and flexibility provided by the NIO platform's core, services, and blocks, the platform can be configured to a synchronously process any input signals from one or more sources and produce output signals in real time.

Abstract: An information processing device includes first and second detectors and a controller. The first detector detects a shipping situation of an apparatus. The second detector detects that a predetermined operation has been performed. The controller performs control so that a detection result indicating the shipping situation of the apparatus will be stored in a first memory until the second detector detects that the predetermined operation has been performed. After the second detector detects that the predetermined operation has been performed, the first detector is switched to be able to detect an operating condition of the apparatus.

Abstract: A method of simulating end user interaction with a user interface that comprises identifying a user interaction session during which an end user interacts with an application hosted by a client terminal via a user interface which is displayed by the application on a display of the client terminal, iteratively documenting user interface states of the user interface during the user interaction session, the user interface states are tagged to indicate a runtime presentation timing, and iteratively documenting user inputs inputted by the user during the user interaction session, the user inputs are documented with reference to display areas of the user interface at a respective of the user interface states during the user interaction session. The user interface states and the user inputs are time synchronized to generate a simulation of the user inputs during the interaction session with reference to the user interface states in a sequential manner.

Abstract: An operations management system includes a processing system and a memory for storing an operations management application, which is executed by the processing system to collect resource information associated with hardware resources and virtual objects of a virtual computing environment. The system identifies, for one or more services provided by the virtual computing environment, the hardware resources and the virtual objects that execute the services, generates a tag for each resource indicating which services are executed by that resource, and stores the collected resource information for each resource and its respective tag in the memory.

Abstract: Initial configuration of access for a client device to a streamed application may be initiated in response to receiving a request to enable access. The application may not, in some cases, have been configured for streaming. The application may execute on a virtual computing node assigned to run the application in the context of a user account created to run the application. A link for initiating the application stream may be sent to the client. A capture process detects resources accessed by the application and streams them to the client. Input from the client is inserted into the application's input/output streams by the capture process.

Abstract: A system for virtual machine live migration includes a management node, a source server, a destination server, a peripheral component interconnect express (PCIe) switch, and an single root input/output virtualization (SR-IOV) network adapter, where the source server includes a virtual machine (VM) before live migration; the destination server includes a VM after live migration; the management node is adapted to configure, using the PCIe switch, a connection relationship between a virtual function (VF) module used by the VM before live migration and the source server as a connection relationship between the VF module and the destination server; and the destination server, using the PCIe switch and according to the connection relationship with the VF module configured by the management node, uses the VF module to complete virtual machine live migration. By switching the connection relationships, the system ensures that a data packet receiving and sending service is not uninterrupted.

Abstract: Computing resources are provided to a user by identifying applications used by the user, and provisioning virtual computing resources that are adapted to the resource requirements of the identified applications. The resource requirements of the identified applications can be combined into a single set of resource requirements and used to acquire a virtual machine that is able to host the identified applications. In other examples, virtual machines may be acquired for each identified application. Each virtual machine generates a display stream via a streaming agent. The display stream is received by an application streaming client on the user's client computer system, and is displayed to the user on a client display. Multiple virtual machines may generate multiple display streams which can be combined by the application streaming client and presented to the user on the single client display.

Abstract: Specialized, service optimized virtual machines are assigned to handle specific types of Internet of Things (IoT) devices. An IoT context mapping policy engine within the context of a virtualized network function manages IoT context mapping policy functions in load balancers. The IoT context mapping policy functions select service optimized virtual machines based on IoT device IDs, and assign those virtual machines to handle the devices. The IoT context mapping policy functions provide load data to the IoT context mapping policy engine. Based on the load data, the IoT context mapping policy engine maintains appropriate scaling by creating or tearing down instances of the virtual machines.

Abstract: Systems and method for providing for suspension and transfer of remote access sessions. In accordance with the methods, a request to suspend a session may be received at a server tier. The server tier prepares a URL that may be used at a later time by a client to resume the session. The URL is communicated to a client tier from which the request was received and, thereafter, a connection between the client tier and the server tier is closed. At a subsequent time, a request may be received to resume the session at the URL. After receipt of the request to resume the session, a connection with the requesting client tier is established by the server tier, and the session is resumed.

Abstract: A method of providing migration of active virtual machines by performing data migrations between data centers using distributed volume and stretched cluster mechanisms to migrate the data synchronously within the distance and time latency limits defined by the distributed volume protocol, then performing data migrations within data centers using local live migration, and for long distance data migrations on a scale or distance that may exceed synchronous limits of the distributed volume protocol, combining appropriate inter- and intra-site data migrations so that data migrations can be performed exclusively using synchronous transmission.

Abstract: Systems and methods for batching memory page hints that may enable a hypervisor to reuse a particular memory page without copying the particular memory page to and from swap space. An example method may comprise: releasing, by a processing device executing a virtual machine, memory pages in use by the virtual machine; adding the memory pages to a set of memory pages; determining, by the virtual machine, that the set of memory pages satisfies a threshold quantity; and responsive to the determining, notifying a hypervisor that the memory pages released by the virtual machine are available for reuse by the hypervisor without being copied to persistent storage.

Abstract: Embodiments disclosed herein generally relate to a method and system for automatically updating a virtual machine image of one or more virtual machines of an auto-scaling group. A computing system receives an indication to update a virtual machine image of a plurality of virtual machines in a plurality of auto-scaling groups. Computing system identifies a subset of the plurality of auto-scaling groups that contains a hydration tag. Computing system locates a version of the virtual machine image different from a current version of the virtual machine image. For each auto-scaling group in the subset of auto-scaling groups, computing system clones a launch configuration for the virtual machines in the auto-scaling group. Computing system stores data associated with each auto-scaling group in a remote location. Computing system updates the virtual machine image of the virtual machines in each auto-scaling group with the new version of the virtual machine image.

Abstract: A system for processing a batch job comprises a processor and a memory. The processor is configured to receive a batch job comprising a sequential or parallel flow of operations, wherein each operation has a defined input type and a defined output type. The processor is further configured to verify that the batch job can run successfully, wherein verifying includes checking that a first operation output defined type is compatible with a second operation input defined type when a first operation output is connected to a second operation input, and wherein verifying includes checking that a parameter used by a calculation in an operation is input to the operation. The memory is coupled to the processor and configured to provide the processor with instructions.

Abstract: A process owner platform may be associated with a cloud embedded big data application and may exchange information with a tenant service executor platform. The process owner platform may establish a process using a process tenant template, the process being associated with public and private data and transmit, to the remote tenant service executor platform, information including the public data (without including the private data). The process owner platform may then receive result data and a process state identifier and establish a virtual process such that it is associated with the public data, the private data, and the result data. The process owner platform may also execute control logic in accordance with the process state identifier to materialize the virtual process into a process or a process tenant template, and the materialized process or process tenant template may associated with the public data, the private data, and the result data.

Abstract: The subject technology addresses the need in the art for improving intra-cloud migration of virtual machines in a cloud computing environment. A hash database may be prepopulated with key-value pairs corresponding to hash IDs and associated data chunks of a virtual machine image. In this regard, the virtual machine image may be divided into chunks using boundaries chosen by a Rabin fingerprinting technique. A hash (e.g., MD5 or SHA-1) may be computed over each chunk and act as a unique identifier for the data contained in each chunk. At appropriate times, one or more hash IDs are sent instead of the actual data chunks between clouds when performing the inter-cloud migration of a virtual machine.

Abstract: The invention relates to bioinformatics pipelines and wrapper scripts that call executables in those pipelines and that also identify beneficial changes to the pipelines. A tool in a pipeline has a smart wrapper that can cause the tool to analyze the sequence data it receives but that can also select a change to the pipeline when circumstances warrant. In certain aspects, the invention provides a system for genomic analysis. The system includes a processor coupled to a non-transitory memory. The system is operable to present to a user a plurality of genomic tools organized into a pipeline. At least a first one of the tools comprises an executable and a wrapper script. The system can receive instructions from the user and sequence data—instructions that call for the sequence data to be analyzed by the pipeline—and select, using the wrapper script, a change to the pipeline.

Abstract: An exemplary system may allow concurrent access to a device by different virtual machines. In one embodiment, the system receives a request to add a virtual machine (VM) of a plurality of virtual machines to a host, the request identifying a device that is shared by the plurality of virtual machines. The system creates a VM-specific rule for the device based on the VM. The system stores the VM-specific rule for the device in association with the VM.

Abstract: A computer implemented method and system for data processing. An example method includes setting at least one SMT preliminary value for at least one operating node; monitoring performance metrics for the at least one operating node set to the at least one SMT preliminary value; and determining a SMT revised value based on performance metrics. An example system includes a memory; a processor communicatively coupled to the memory; and a feature selection module communicatively coupled to the memory and processor. The feature selection module performs a method that includes setting, using a setting device, at least one SMT preliminary value for at least one operating node; monitoring, using a monitoring device, performance metrics for the at least one operating node set to the at least one SMT preliminary value; and determining, using a determining device, a SMT revised value based on performance metrics.

Abstract: Described embodiments provide systems and methods for operating a storage system. The storage system may generate one or more input/output (I/O) caller threads. For each of the I/O caller threads, one or more background provider threads may be generated that may be associated with the I/O caller thread. Instructions associated with the I/O caller threads and the background provider threads may be performed. Each of the one or more background provider threads may be synchronized with the associated I/O caller thread. Each thread may check a state of the associated threads, and based upon the state of the associated threads, each thread may post a state indicator to a mailbox field in a context of the associated threads.

Abstract: Techniques and systems for prescheduling an alternative CPU as soon as a need for a task is detected by a primary CPU are disclosed. A process includes detecting, by a producer thread running on a first CPU, an external interrupt, acquiring, by the producer thread, a spinlock, and in response to acquiring the spinlock, sending, by the producer thread, an event to a consumer thread that is to run on a second CPU. Upon receiving the event by the consumer thread, the consumer thread acquires the spinlock, which “stalls” the consumer thread in a loop until the spinlock is released by the producer thread. While the consumer thread is “waking up” in response to receiving the event from the producer thread, the producer thread creates a task, publishes the task, and releases the spinlock, thereby causing the consumer thread to exit the loop, retrieve the task, and execute the task.

Abstract: A data storage device includes a non-volatile memory and a controller. The non-volatile memory includes a word line coupled to a plurality of storage elements. A method includes detecting a condition associated with a defect in the word line. A first subset of the plurality of storage elements and a second subset of the plurality of storage elements are determined based on an estimated location of the defect. The method further includes determining a first read threshold for the first subset and a second read threshold for the second subset.

Abstract: Embodiments of the invention provide a method, system and computer program product for log file reduction according to problem space topology. A method for log file reduction according to problem space topology can include receiving a fault report for a fault in a solution executing in memory of one or more computers of a computer data processing system. The method further can include extracting references to at least two resources of the computer data processing system from the fault report. The method yet further can include filtering a set of all log files for the computer data processing system to only a subset of log files related to the at least two resources. Finally, the method can include displaying the subset of log files in a log file analyzer.

Abstract: An anomaly detector for a Controller Area Network (CAN) bus performs state space classification on a per-message basis of messages on the CAN bus to label messages as normal or anomalous, and performs temporal pattern analysis as a function of time to label unexpected temporal patterns as anomalous. The anomaly detector issues an alert if an alert criterion is met that is based on the outputs of the state space classification and the temporal pattern analysis. The temporal pattern analysis may compare statistics of messages having analyzed arbitration IDs with statistics for messages having those analyzed arbitration IDs in a training dataset of CAN bus messages, and a temporal pattern is anomalous if there is a statistically significant deviation from the training dataset. The anomaly detector may be implemented on a vehicle Electronic Control Unit (ECU) communicating via a vehicle CAN bus.

Abstract: A non-transitory computer readable storage medium storing therein an abnormality handling determination program that causes a computer to execute a process, the process includes, acquiring state information of appointed items regarding to a state of each of a plurality of devices in a system depending on a detection of abnormal information of a first device among the plurality of devices, judging whether the state information of the first device deviates from the distribution range of the state information calculated by the state information of the devices except the first device for every item, and determining a handling for the first device based on a result of the judgment.

Abstract: A method is disclosed that estimates causal relationships between events based on heterogeneous monitoring data. The monitoring data consists in transaction tracing data, describing the execution performance of individual transactions, resource utilization measurements of infrastructure entities like processes or operating systems and network utilization measurement data. A topology model of the monitored environment describing its entities and the communication activities of these entities is incrementally created. The location of occurred events in the topology model is determined. The topology model is used in conjunction with a domain specific causality propagation knowledge base to calculate the possibility of causal relationships between events. Different causality determination mechanisms, based on the type of involved events are used to create graphs of causal related events.

Abstract: Mechanisms for controlling access to storage volumes on the secondary storage system is provided. A determination is made as to whether a first site computing device has sent a notification of a failure condition of a first site. In response to a determination that the notification of the failure condition of the first site has not been received, secondary workloads of a second site computing device are permitted to access storage volumes on the secondary storage system. In response to a determination that the notification of the failure condition of the first site has been received, a mode of operation of the second site is modified from a normal mode of operation to a failure mode of operation. In the failure mode of operation, the storage system controller of the second site blocks at least a portion of access requests from secondary workloads of the second site computing device.

Abstract: A system, method, and computer program product are provided for automatic discard of corrupt memory segments. In use, one or more memory blocks are allocated to specific business related information. Additionally, the one or more memory blocks allocated to the specific business related information are assigned to one or more first memory regions, the one or more first memory regions being a portion of a memory that includes a plurality of memory regions in addition to the one or more first memory regions, the plurality of memory regions including a plurality of other business related information. Further, it is identified that the specific business related information is corrupt. Moreover, the specific business related information is discarded from the memory and a master memory, such that the plurality of other business related information is not discarded.

Abstract: A transactional memory system salvages a hardware lock elision (HLE) transaction. A processor of the transactional memory system, based on a detection of a pending point-of-failure in a code region during HLE transactional execution, stops HLE transactional execution prior to the pending point-of-failure in the code region. The processor, based on information about a lock elided, commits a speculative state of the stopped HLE transactional execution that is stored, at least in part, in a gathering store cache. The processor starts non-transactional execution at the point of failure in the code region.

Abstract: In response to a warning that power may be interrupted, a non-volatile data storage sub-system of a host computer system re-orders machine readable instructions that the non-volatile data storage sub-system is going to perform. This re-ordering of instructions decreases the probability that important data will be lost. The re-ordering of instructions is performed according to rules.

Abstract: Embodiments for partitioning a non-volatile memory device is described. In one embodiment a memory system includes a first addressable range of memory blocks for storing different types of data. The memory system is partitioned to include a second addressable range of memory blocks capable of storing data indicating attributes of the first addressable range of memory blocks. The second addressable range of memory blocks may also be periodically updated such that the capacities of the first addressable range of memory blocks may be dynamically adjusted depending on application needs and changes to the non-volatile memory device over time In some embodiments, one partition of a memory device may be configured for high reliability data storage while a second partition is configured for normal reliability storage.

Abstract: The invention pertains to semiconductor memories, and more particularly to enhancing the reliability of stacked memory devices. Apparatuses and methods are described for implementing RAID-style error correction to increase the reliability of the stacked memory devices.

Abstract: An apparatus including a memory array comprising a plurality of rows and a plurality of columns. A switch electrically connects to a particular row of the plurality of rows of the memory array per cycle. An energy storage unit is electrically connected to the memory array through the switch, wherein the energy storage unit is electrically connected in a series with an effective capacitance between ground and the particular row of the plurality of rows of the memory array to which the switch is connected to recycle energy from the memory array.

Abstract: A method includes detecting a storage error regarding an encoded data slice. The method further includes determining failure mode information regarding a set of storage units. The method further includes determining, based on the failure mode information, whether to use a data-based rebuilding protocol or a zero information gain rebuilding protocol for rebuilding the encoded data slice. The method further includes, when the zero information gain rebuilding protocol is to be used to rebuild the encoded data slice retrieving zero information gain partial encoded data slices from one or more storage servers of the set of storage servers; and rebuilding the encoded data slices based on the zero information gain partial encoded data slices.

Abstract: A method to efficiently checkpoint and reconstruct an in-memory index associated with a log-structured object store includes enabling asynchronous write operations to occur to a log-structured object store. The log-structured object store utilizes an in-memory index to access objects therein. The method further enables checkpoint operations to occur to the log-structured object store without pausing the asynchronous write operations. When initiating checkpoint operations, the method establishes a “begin checkpoint” marker on the log-structured object store. This “begin checkpoint” marker is configured to point to an oldest known log location recorded in the in-memory index. In the event the in-memory index is lost, the method reconstructs the in-memory index by analyzing the log-structured object store starting from the oldest known log location. A corresponding system and computer program product are also disclosed and claimed herein.