Abstract: Described is a system and method for efficient pointer chasing in systems having a single memory node or a network of memory nodes. In particular, a pointer chasing command is sent along with a memory request by an issuing node to a memory node. The pointer chasing command indicates the number of interdependent memory accesses and information needed for the identified interdependent memory accesses. An address computing unit associated with the memory node determines the relevant memory address for an interdependent memory access absent further interaction with the issuing node or without having to return to the issuing node.

Abstract: The embodiments implement file size variance caching optimizations. The optimizations are based on a differentiated caching implementation involving a small size content optimized first cache and a large size content optimized second cache optimized. The first cache reads and writes data using a first block size. The second cache reads and writes data using a different second block size that is larger than the first block size. A request management server controls request distribution across the first and second caches. The request management server differentiates large size content requests from small size content requests. The request management server uses a first request distribution scheme to restrict large size content request distribution across the first cache and a second request distribution scheme to restrict small size content request distribution across the second cache.

Abstract: A system and method including, in some embodiments, receiving a request for a graphics memory address for an input/output (I/O) device assigned to a virtual machine in a system that supports virtualization, and installing, in a graphics memory translation table, a physical guest graphics memory address to host physical memory address translation.

Abstract: A data processing apparatus and method are provided for performing address translation in response to a memory access request issued by processing circuitry of the data processing apparatus and specifying a virtual address for a data item. Address translation circuitry performs an address translation process with reference to at least one descriptor provided by at least one page table, in order to produce a modified memory access request specifying a physical address for the data item. The address translation circuitry includes page table walk circuitry configured to generate at least one page table walk request in order to retrieve the at least one descriptor required for the address translation process. In addition, walk ahead circuitry is located in a path between the address translation circuitry and a memory device containing the at least one page table.

Abstract: Embodiments related to a cache memory that supports tagless addressing are disclosed. Some embodiments receive a request to perform a memory access, wherein the request includes a virtual address. In response, the system performs an address-translation operation, which translates the virtual address into both a physical address and a cache address. Next, the system uses the physical address to access one or more levels of physically addressed cache memory, wherein accessing a given level of physically addressed cache memory involves performing a tag-checking operation based on the physical address. If the access to the one or more levels of physically addressed cache memory fails to hit on a cache line for the memory access, the system uses the cache address to directly index a cache memory, wherein directly indexing the cache memory does not involve performing a tag-checking operation and eliminates the tag storage overhead.

Abstract: Techniques are disclosed for transitioning a memory page between memories in a virtual memory subsystem. A unified virtual memory (UVM) driver detects a page fault in response to a memory access request associated with a first memory page, where a local page table does not include an entry corresponding to a virtual memory address included in the memory access request. The UVM driver, in response to the page fault, executes a page fault sequence. The page fault sequence includes modifying the ownership state associated with the first memory page to be central-processing-unit-shared. The page fault sequence further includes scheduling the first memory page for migration from a system memory associated with a central processing unit (CPU) to a local memory associated with a parallel processing unit (PPU). One advantage of the disclosed approach is that the PPU accesses memory pages with greater efficiency.

Abstract: In some embodiments, a method of managing cache memory includes identifying a group of cache lines in a cache memory, based on a correlation between the cache lines. The method also includes tracking evictions of cache lines in the group from the cache memory and, in response to a determination that a criterion regarding eviction of cache lines in the group from the cache memory is satisfied, selecting one or more (e.g., all) remaining cache lines in the group for eviction.

Abstract: A read cache management method and apparatus based on a solid state drive, and the method includes: determining whether a read request hits a first queue and a second queue (S101); if both the first queue and the second queue are missed, selecting and deleting an eliminated data block from the first queue (S102); if the eliminated data block is in a stored state, inserting the eliminated data block into the second queue (S103); and determining a target data block in a lower-level storage medium, and inserting the target data block into the first queue, (S104). According to the foregoing read cache management method and apparatus based on the solid state drive, a hit ratio of the solid state drive can be increased, a data write count of the solid state drive can be reduced, and service life of the solid state drive can be extended.

Abstract: In one embodiment, the data storage apparatus includes a control unit configured to decode at least one input command and configured to generate at least one of a read signal and a start signal in response to the input command. The start signal indicates to start an internal mode determination process. The data storage apparatus also includes a memory unit configured to output data in response to the read signal, and a coding unit configured to start and perform the internal mode determination process in response to the start signal. The internal mode determination process includes autonomously determining a coding mode, and the coding unit is configured to code the output data based on the determined coding mode to produce coded data.

Abstract: Systems and methods for using encryption keys to manage data retention are described. In one embodiment, the systems and methods may include receiving data such as user data from a host of the storage drive, encrypting the data using an encryption key, writing the encrypted data to the storage drive, and retaining the encrypted data on the storage drive based at least in part on a validity of the encryption key.

Abstract: Systems and methods presented here can allow a teacher to schedule the locking of one or more student devices into an asset at some time in the future. A teacher device can be used to configure lock information, including student identifying information, lock type information, asset information, and lock timing information. The lock information can be transmitted to the student devices for local storage. The lock can then initiate on the student device at the scheduled time even in instances when the student device is not connected to a communication network. After lock expiration, an updated asset can be stored at the student device in conjunction with lock confirmation information. When the student device detects a network connection, the updated asset and the lock confirmation information can be transmitted to a management server where it can be accessed and evaluated by the teacher.

Abstract: An interface, a method, and a system are provided. In one or more aspects, the interface is for data transfer between simulation software and a hardware emulator associated with an integrated circuit design and includes a data producer to push a number of elements. A data element includes variable bits of data and variable bits of control information. A first-in-first-out (FIFO) receives the elements pushed by the data producer and stores pushed elements. A data consumer requests the pushed elements from the FIFO. The FIFO includes a buffer array, memory, a first push pointer and a first pop pointer associated with the buffer array, and a second push pointer and a second pop pointer associated with the memory. The buffer array stores elements in software and the memory stores elements in hardware. The interface facilitates moving a portion of hardware emulator functionalities into the simulation software and vice-versa at runtime by utilizing the FIFO.

Abstract: An integrated circuit, preferably for controlling vehicle functions, having an analog-digital converter for converting an analog signal into digital measurement values, a DSP unit, connected downstream from the analog-digital converter, for pre-processing the digital measurement values, a central computing unit, connected to the DSP unit so as to transmit data, for further processing of the digital measurement values, the DSP unit being set up to control the analog-digital converter during operation.

Abstract: A bus interface device for requesting and receiving data from a memory controller connected to a bus includes a request buffer and a request merger. The request buffer is configured to store a first data request signal for requesting first data and a second data request signal for requesting second data. The request merger is configured to determine whether to merge the first and second data request signals, and transmit a merged request signal for requesting the first data and the second data from the memory controller to the bus upon determining that the first and second data request signals are to be merged.

Abstract: The present invention relates to a multilevel memory bus system for transferring information between at least one DMA controller and at least one solid-state semiconductor memory device, such as NAND flash memory devices or the like. This multilevel memory bus system includes at least one DMA controller coupled to an intermediate bus; a flash memory bus; and a flash buffer circuit between the intermediate bus and the flash memory bus. This multilevel memory bus system may be disposed to support: an n-bit wide bus width, such as nibble-wide or byte-wide bus widths; a selectable data sampling rate, such as a single or double sampling rate, on the intermediate bus; a configurable bus data rate, such as a single, double, quad, or octal data sampling rate; CRC protection; an exclusive busy mechanism; dedicated busy lines; or any combination of these.

Abstract: A communication apparatus comprises a general-purpose memory, and a high-speed memory that allows higher-speed access than the general-purpose memory. Protocol processing is executed to packetize transmission data using a general-purpose buffer allocated to the general-purpose memory and/or a high-speed buffer allocated to the high-speed memory as network buffers.

Abstract: The present application discloses a method and an apparatus for transmitting information. A specific implementation of the method includes: sending first information to be transmitted to a shared memory; traversing memory groups in the shared memory, and acquiring a first memory unit suitable for the amount of the first information, each of the memory groups including at least one memory unit, each of memory units in the memory group having an identical size, and the memory units in different memory groups having different sizes; and storing the first information into the acquired first memory unit, so that the first information is read from the first memory unit by a receiving node. Through this implementation, the first information that needs to be transmitted is stored into the memory unit suitable for the amount of the first information, thereby saving memory resources.

Abstract: This technology provides a method for fabricating an electronic device. A method for fabricating an electronic device including a variable resistance element, which includes a free layer having a variable magnetization direction; a pinned layer having a first non-variable magnetization direction, and including first ferromagnetic materials and a first spacer layer interposed between adjacent two first ferromagnetic materials among the first ferromagnetic materials; a tunnel barrier layer interposed between the free layer and the pinned layer; a magnetic correction layer having a second magnetization direction which is anti-parallel to the first magnetization direction; and a third spacer layer interposed between the magnetic correction layer and the pinned layer, and providing an anti-ferromagnetic exchange coupling between the magnetic correction layer and the pinned layer.

Abstract: In a method of adaptive buffering in a mobile device having a host processor and a sensor processor coupled with the host processor, the sensor processor is used to buffer data received from a sensor that is operated by the sensor processor. The data is buffered by the sensor processor into a circular data buffer. Responsive to the sensor processor detecting triggering data within the received data: a first adaptive data buffering action is initiated with respect to the data received from the sensor operated by the sensor processor; a second adaptive data buffering action is initiated with respect to second data received from a second sensor of the mobile device; and a command is sent from the sensor processor to a second processor.

Abstract: A computer-implemented method for synchronous input/output (I/O) cache line padding is described. The cache line padding occurs between a server having a processor executing an operating system and a recipient control unit. The method can include receiving, via the processor at the recipient control unit, a partial line direct memory access (DMA) write request; fetching, via the processor, a device table entry (DTE) associated with the partial line DMA write request; determining, via the processor, a cache line size for a synchronous input/output (I/O) cache line; and writing a full cache line DMA write request by padding, via the processor, the partial line DMA write request with a padded portion, where the padded portion is based on the cache line size.

Abstract: A system including: a master device configured to generate a first signal having a periodic pulse, wherein the first signal includes data; and a slave device including a pin, a delay circuit, a buffer, and a processing circuit, wherein the slave device receives the first signal at the pin, delays the first signal with the delay circuit to generate a second signal having a first delay, delays the first signal with the buffer to generate a third signal having a second delay, and reads the data from the second signal using the third signal at the processing circuit.

Abstract: A memory system includes a memory controller coupled to multiple memory devices. Each memory device includes an oscillator that generates an internal reference signal that oscillates at a frequency that is a function of physical device structures within the memory device. The frequencies of the internal reference signals are thus device specific. Each memory device develops a shared reference signal from its internal reference signal and communicates the shared reference signal to the common memory controller. The memory controller uses the shared reference signals to recover device-specific frequency information from each memory device, and then communicates with each memory device at a frequency compatible with the corresponding internal reference signal.

Abstract: Embodiments of the present disclosure use vendor defined messages (VDMs) to send high priority information (e.g., cache writebacks) on a designated channel that is separate from a channel used for other commands (e.g., normal memory write commands). By using VDMs and a designated channel to send cache writebacks, the cache writebacks will not be blocked by normal memory write commands. For example, an endpoint device may encode cache writebacks as VDMs to be sent to a root complex. The root complex may store the VDMs in a dedicated VDM buffer and send the VDMs on a dedicated VDM channel.

Abstract: A High Speed Link System providing network and data transfer capabilities, implemented via standard input/output (I/O) device controllers, protocols, cables and components, to connect one or more Host computing systems, comprising a System, Apparatus and Method is claimed; and described in one or more embodiments. An illustrative embodiment of the invention connects two or more Host systems via USB 3.0 ports and cables, establishing Network, Control, Data Exchange, and Power management required to route and transfer data at high speeds, as well as resource sharing. A Link System established using USB 3.0 operates at the full 4.8 Gbps, eliminating losses inherent when translating to, or encapsulating within, a network protocol, such as the Internet Protocol. Method claimed herein describes how two or more connected Host systems, detect one another, and establish separate communication and data exchange bridges, wherein control sequences from the Hosts' application direct the operation of the Apparatus.

Abstract: In a system and method for using a bridge, an asynchronous channel based bus, and a message broker to provide asynchronous communication, the bridge monitors at least one Galactic channel on the bus. The bridge receives every message sent on the Galactic channel, and converts each message from a channel message format used by the Galactic channel to a common message format. The bridge utilizes a socket to broadcast each converted message to, and receive messages from, a message broker. The bridge determines that a message received from the message broker is destined for the Galactic channel. The bridge converts the message into the channel message format used by the Galactic channel and distributes the converted message to the Galactic channel.

Abstract: Apparatus, systems, and/or methods may include a peripheral component interconnect express (PCIe) link to directly couple a slot with a network fabric. The slot may be defined by a surface and/or may accommodate a hardware module. A rack unit implementation may be utilized, such as a one rack unit (1U) implementation, a four rack unit (4U) implementation, and so on. The network fabric may be utilized when hardware modules communicate across the PCIe link, may be bypassed when hardware modules communicate across an additional PCIe link, and so on. The PCIe link may include a direct connect point-to-point PCIe link, a dual star PCIe link, and so on. In addition, the PCIe link may be utilized in a rack-scale architecture.

Abstract: An IO subsystem chassis includes IO modules and IO slots to receive the IO modules inserted from a frontend of a housing, a baseboard disposed within the housing, the baseboard including first connectors corresponding to the IO slots to receive and connect the IO modules. Each of the IO modules can be coupled a server via the backend panel using a cable. Each IO module includes an IO card having a peripheral device mounted thereon and a card holder having a first receiving socket to receive and hold the IO card plugged in vertically and downwardly. The card holder further includes a second connector to engage with or disengage from a corresponding one of the first connectors of the baseboard horizontally, when the IO module is inserted into or removed from a corresponding IO slot from the frontend, without having to removing the housing.

Abstract: A system and method for enabling hot-plugging of devices in virtualized systems. A hypervisor obtains respective values representing respective quantities of a resource for a plurality of virtual root buses of a virtual machine (VM). The hypervisor determines a first set of address ranges of the resource that are allocated for one or more virtual devices attached to at least one of the plurality of virtual root buses. The hypervisor determines, in view of the first set of allocated address ranges, a second set of address ranges of the resource available for attaching one or more additional virtual devices to at least one of the plurality of virtual root buses. The hypervisor assigns to the plurality of virtual root buses non-overlapping respective address ranges of the resource within the second set.

Abstract: An apparatus is provided that compensates for misalignment on a synchronous data bus, the apparatus includes a replica radial distribution element, a bit lag control element, and a synchronous lag receiver. The replica radial distribution element is configured to receive a lag pulse signal, and is configured to generate a replicated strobe signal, where the replica radial distribution network includes replicated propagation path lengths, loads, and buffering of a radial distribution network for a strobe. The bit lag control element is configured to measure the time between assertion of the lag pulse signal and assertion of the replicated strobe signal, and is configured to generate a first value on a lag bus that indicates the time.

Abstract: An apparatus is provided that compensates for misalignment on a synchronous data bus. The apparatus includes a replica radial distribution element, a Joint Test Action Group (JTAG) interface, and a bit lag control element. The replica radial distribution element is configured to receive a lag pulse signal, and is configured to generate a replicated strobe signal, where the replica radial distribution network includes replicated propagation path lengths, loads, and buffering of a radial distribution network for a strobe. The JTAG interface is configured to receive control information over a standard JTAG bus, where the control information indicates an amount to adjust a propagation time. The bit lag control element is configured to measure, when an update signal is asserted, the propagation time beginning with assertion of the first signal and ending with assertion of the second signal, and is configured to generate a first value on a lag bus that indicates an adjusted propagation time.

Abstract: Systems and techniques for determining sensing margins and/or diagnostic information associated with a sensor are presented. A statistics component generates statistical data based on sensor data associated with a sensing device. A margin component generates sensing margins for the sensing device based on the statistical data. An output component generates an indicator for a changing condition associated with the sensing device based on the sensing margins. In an aspect, a diagnostic component generates diagnostic data for the sensing device based on the statistical data.

Abstract: A method providing an analytical technique introducing label information into an anomaly detection model. Effective utilization of label information is based on introducing the degree of similarity between samples. Assuming, for example, there is a degree of similarity between normally labeled samples and no similarity between normally labeled and abnormally labeled samples. Also each sensor value is generated by the linear sum of a latent variable and a coefficient vector specific to each sensor. However, the magnitude of observation noise is formulated to vary according to the label information for the sensor values, and set so that normal label?unlabeled?anomalously labeled. A graph Laplacian is created based on the degree of similarity between samples, and determines the optimal linear transformation matrix according to a gradient method. A optimal linear transformation matrix is used to calculate an anomaly score for each sensor in the test samples.

Abstract: Content items are obtained and dynamically arranged in tiles within columns (e.g. columns of a same size) on a display. The obtained items, along with previously obtained items that have not been rendered, are sorted based on a time such as a creation time and a modified time for the item. A determination is made using the sorting as to whether any of the items are ready to render. The determination of whether an item is ready to render may be made before all of the content items are obtained. A layout within the tile(s) for the column for the ready to render items is determined. For example, the items may be placed in tiles based on their content (e.g. text content placed in smaller sized tiles as compared to rich content). The items ready to render are then sent for rendering.

Abstract: Systems and methods for presenting content that depicts one or more stories are provided. Content that depicts one or more stories is received from a first client device. The content that depicts the one or more stories is grouped into an edition being used to represent the one or more stories. A discovery page that enables selection of the edition is generated. Presentation of the discovery page is caused on a second client device.

Abstract: In an electronic book system 1 distributing electronic books to browsing devices 30A, 30B, and 30C via a communication network 50, the acquirer of a distribution server 20 acquires the context of operation by a first user who is provided with first candidate pages contained in an electronic book in a previewable manner. The designator of the distribution server 20 designates second candidate pages based on the context of operation acquired by the acquirer and the first candidate pages. The provider provides the second candidate pages designated by the designator to a second user in a previewable manner.

Abstract: A system and method that converts the digital typesetting documents used in publishing to a device-specific format for electronic publishing. A “smart file and device-specific application” approach maintains the “look and feel” (design) of the source document used for print publication while typesetting for a specific device. Although this approach requires considerably more resources to create a smart file for each device-specific format, the smart file retains the unique typesetting characteristics of the printed book, is more aesthetically pleasing, and is easier to read. Furthermore, the device-specific application can render the smart file more quickly thereby eliminating any latency.

Abstract: A method and system for processing electronic documents. A temporary computer object is created. An address of a first electronic document is obtained. A first tag, a second tag, and the address of the first electronic document are copied into a header of the created temporary computer object. Selected text from the first electronic document is obtained. The first and second tag respectively mark the beginning and the end of the header. The address of the first electronic document is disposed between the first and second tags. The selected text and a third tag are copied into the created temporary computer object. The third tag marks the end of the created temporary computer object. The selected text is disposed between the header of the created temporary computer object and the third tag. The created temporary computer object is stored in a second electronic document.

Abstract: A tag management system in a computer data network can be used to manage one or more tag configurations with templates. A template may enable efficient tag configuration by causing presentation of an improved user interface that facilitates user-specified mappings between a custom content site and predefined tag management attributes. By completing a template, which may depend on other templates or have templates that depend on it, the tag management system can automatically deploy complex tag management configurations to track end user interactions over a data network.

Abstract: Social networking systems benefit from techniques that improve the ability of users to share online content with other users of a social networking system. In one embodiment, when a user types, pastes, or otherwise inserts a URL, or some other hyperlink, into a message or post to the social networking system, a set of data on the referenced hyperlink target is acquired and stored on a server of the social networking system. The stored data is analyzed, to automatically generate a preview for the hyperlink; and the hyperlink preview is transmitted to the client device for approval. In one embodiment, follow-up actions related to the content are performed when the content is posed, which enables users to perform social graph actions to user nodes and concept nodes related to the message or post. In one embodiment, the shared content is cached on the social networking system.

Abstract: A display apparatus is disclosed, the display apparatus including: communication circuitry configured to receive a web-based content comprising a plurality of objects; a display configured to display an image; a memory configured to be loaded with data of the image displayed on the display; and at least one processor configured to load data of a first object in the memory and to not load data of a second object in the memory if an area of the first object is displayed to cover areas of one or more second objects of the plurality of objects of the web-based contents.

Abstract: To compress a document, a number of edges present in a selected portion of the document are counted to determine whether the number of edges exceeds a threshold. When the number of edges exceeds the threshold, a pixel is selected from the portion and a set of neighboring pixels is identified for the pixel. For each neighboring pixel in a subset of the neighboring pixels, a corresponding label of the neighboring pixel is identified. A mask layer contains labels of pixels in the portion where a label of the selected pixel is biased using labels of neighboring pixels in the subset of the neighboring pixels. The selected pixel is designated to a foreground or a background layer of the document according to the label of the selected pixel. A compressed document is constructed corresponding to the document using the mask layer, the foreground layer, and the background layer.

Abstract: Provided are techniques for a domain specific representation of document text for accelerated natural language processing. A document is selected from a set of documents to be analyzed. A character stream from the document is converted into a token stream based on tokenization rules. Irrelevant tokens are removed from the token stream. The tokens remaining in the token stream are converted into an integer domain representation based on a domain specific ontology dictionary. The integer domain representation are stored to a Graphics Processing Unit (GPU) processing queue of each of one or more GPUs. Then, a result set is received from the one or more GPUs.

Abstract: A nonextensible schema is obtained including a first content model of ANY. Based on the nonextensible schema, a compact syntax regular language for XML next generation (RNC) file is generated that includes a second content model of ANY. The second content model of ANY can correspond to the first content model of ANY. The RNC file is modified, based upon the RNC file including the second content model of ANY, so as to explicitly enumerate all semantics of the second content model of ANY as elements in the RNC file. A regular language for XML next generation (RNG) file is later generated based on the modified RNC file. Related apparatus, systems, techniques and articles are also described.

Abstract: A semantic based document editor is provided. An application such as a document processing application displays previews of a document. The previews include semantic styles. In response to a selection of one of the previews, a semantic style associated with the selected preview is applied to a section of the document. The semantic style is rendered in the selected preview. A suggestion is displayed on the section. The suggestion identifies the section. The suggestion is also formatted based on the semantic style.

Abstract: The present invention relates to a solution for generating a notification relating to editing of a document in a collaborative document editing environment. The method includes: establishing the collaborative document editing environment at least by defining a plurality of users permitted to access the document; monitoring if the document is edited by the at least one user granted the right to edit the document; in response to a detection generating at least one notification representing at least one edit event performed by the at least one user granted the right to edit the document; and transmitting the at least one notification representing the at least one edit event to at least one recipient. Also disclosed is a system implementing the method and a processor-readable non-transitory medium storing processor-executable instructions for executing the method by a processor.

Abstract: A mobile communication device and a method for managing images, associated geographic location data, and associated supplemental information, in which geographic location data is generated based on a current location of the mobile communication device; a map corresponding to the generated geographic location data is displayed; a plurality of images and associated supplemental information corresponding to each image in a list mode are displayed in a first user interface, wherein the displayed associated supplemental information comprises description information and a street address; a selection of the plurality images, the associated description information, and the associated street address is received; the selected associated location information is displayed in a second user interface, wherein the second user interface comprises an editing mode; and the supplemental information is edited in the edit mode by receiving note information and the note information is associated with the selected associated descri

Abstract: Systems and methods for locating, identifying, mapping and completing electronic form fields are provided herein. A mapping engine is configured to identify form fields using a variety of similar field names through one or more algorithms configured to identify and match similar field names and combinations of field names. A form field mapping and identification engine identifies a form category using a machine learning classification algorithm, then determines and maps form labels to form fields using seeded values and optical scanning in order to produce a human readable label for each form field. The field labels are used to generate a set of terms for each form field that are used to identify content to be filled in the form with a high degree of accuracy. Additional embodiments are directed toward locating form fields in an electronic form known as a formless form.

Abstract: Disclosed are systems and methods that enable a workbook author to break a workbook out into a set of logically separate pieces, referred to herein as “workbook parts.” Calculation dependencies between the workbook parts may be maintained, so that all the calculations are correct across the entire spreadsheet. An organization may be enabled to manage each workbook part separately, thus certain users may be denied access to view or edit certain workbook parts. Accordingly, where multiple authors are contributing to a tightly controlled workbook, the person responsible for spreadsheet management is enabled to allow each of those authors access to edit only the portion that they need to be concerned with.

Abstract: Dynamic collaborative presence information is provided. A plurality of users may access a document concurrently. Presence information associated with each of the users may be communicated to a server, collected, and communicated to a client application running on each user's client device. The client application may dynamically show where other users are editing a cell or a range of cells to help avoid collisions of edits in the document. Various interface elements may be provided for indicating presence and for indicating whether a single user or multiple users have selected or are editing the cell or range of cells.

Abstract: Data cells in a spreadsheet report are collapsed and expanded without disrupting other spreadsheet data. A user may want to drill down on data corresponding to a parent member of the report to display more detailed information about the parent member. Likewise, a user may want to drill up the displayed information corresponding to the parent member to hide detailed information associated with the parent member. Before expanding or collapsing a report, the spreadsheet is scanned for information to determine whether the display of other data in the spreadsheet would be disrupted by the expansion/collapse. The information may include cross join information associated with the parent member, the number of child members associated with the parent member, the dimension of the report created by the parent member and the associated child members, and other reports that may be linked to the report that includes the parent member.