Patents Issued in January 15, 2019
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Patent number: 10180839Abstract: An apparatus includes a processor and a loop cache coupled to the processor. The loop cache provides to the processor instructions corresponding to a loop in the instructions. The loop cache includes a persistence counter.Type: GrantFiled: March 4, 2016Date of Patent: January 15, 2019Assignee: Silicon Laboratories Inc.Inventors: Mark W. Johnson, Paul Zavalney, Marius Grannæs, Oeivind A. G. Loe
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Patent number: 10180840Abstract: Apparatus and methods are disclosed for dynamic nullification of memory access instructions, such as memory store instructions. In some examples of the disclosed technology, an apparatus can include memory and one or more block-based processor cores. One of the cores can include an execution unit configured to execute memory access instructions comprising a plurality of memory load and/or memory store instructions contained in an instruction block. The core can also include a hardware structure storing data for at least one predicate instruction in the instruction block, the data identifying whether one or more of the memory store instructions will issue if a condition of the predicate instruction is satisfied. The core may further include a control unit configured to control issuing of the memory access instructions to the execution unit based at least in a part on the hardware structure data.Type: GrantFiled: December 23, 2015Date of Patent: January 15, 2019Assignee: Microsoft Technology Licensing, LLCInventors: Douglas C. Burger, Aaron L. Smith
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Patent number: 10180841Abstract: A processor includes a processing pipeline including multiple hardware threads and configured to execute software code instructions that are stored in a memory, along with multiple registers, configured to be read and written to by the processing pipeline during execution of the instructions. A monitoring unit monitors the instructions in the processing pipeline and records respective monitoring tables indicating the registers accessed in processing the instructions in different sequences of the instructions, and parallelizes among the hardware threads of the processor, using the respective monitoring tables, execution of repetitions of at least first sequences of the instructions.Type: GrantFiled: January 27, 2016Date of Patent: January 15, 2019Assignee: Centipede Semi Ltd.Inventors: Noam Mizrahi, Alberto Mandler, Shay Koren, Jonathan Friedmann
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Patent number: 10180842Abstract: Provided is an integrity verification method for a user device includes verifying integrity of a first verification target on a basis of a first integrity verification scheme during executing a boot-loader, uncompressing a kernel image according to the integrity verification result for the first verification target and verifying integrity of a second verification target on a basis of a second integrity verification scheme while the kernel image is uncompressed, and driving an operating system according to the integrity verification result for the second verification target and verifying integrity of a third verification target on a basis of a third integrity verification scheme while the operating system is driven.Type: GrantFiled: March 11, 2016Date of Patent: January 15, 2019Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTEInventor: Yong Hyuk Moon
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Patent number: 10180843Abstract: A resource processing method, an operating system, and a device are provided. The method is applied to a multi-core operating system, where the multi-core operating system includes a management operating system and multiple load operating systems that run on a host machine and includes a physical resource pool. According to the method, after selecting, in processor cores allocated to a first load operating system, a startup processor core that starts up the first load operating system, the management operating system instructs the startup processor core to read a mapping relationship that is from a virtual memory address to a physical memory address and that is required for executing a startup mirror of the first load operating system. Then, the management operating system instructs the startup processor core to execute the startup mirror pre-constructed for the first load operating system to start up the first load operating system.Type: GrantFiled: June 7, 2016Date of Patent: January 15, 2019Assignee: Huawei Technologies Co., Ltd.Inventors: Gang Lu, Jianfeng Zhan, Yunwei Gao, Chongkang Tan, Dongliang Xue
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Patent number: 10180844Abstract: The concepts described herein include a storage access system including two access paths using different path configurations resulting in the ability to do a two part boot from the same boot memory. The two storage access paths address the boot memory using a globally unique identifier. The first storage path is a slower path that transfers instructions from the boot memory to configure the second storage path used to transfer the operating system from the boot memory.Type: GrantFiled: January 20, 2017Date of Patent: January 15, 2019Assignee: ORACLE INTERNATIONAL CORPORATIONInventor: Jon K. Aimone
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Patent number: 10180845Abstract: A method for network booting by a preboot execution environment (PXE) proxy is described. The method includes receiving one or more boot service discovery protocol (BSDP) packets from a client device. The method also includes determining a bootable image file to provide to the client device based on characteristics of the client device received in the one or more BSDP packets. The method further includes determining a nearest network location of the bootable image file. The method additionally includes providing the nearest network location of the bootable image file to the client device.Type: GrantFiled: January 11, 2016Date of Patent: January 15, 2019Assignee: Ivanti, Inc.Inventor: Joseph Nunes
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Patent number: 10180846Abstract: What is disclosed is a device interoperability system for one or more user devices associated with a user, wherein said one or more user devices comprises a first user device, said device interoperability system comprising a communications module, wherein a first connection is established between said first user device and said communications module; storage associated with said device interoperability system and coupled to said communications module, wherein said storage stores an operating system, one or more programs, and data associated with the user, further wherein said operating system is booted by said first user device via said first connection; and one or more processors to support said device interoperability system.Type: GrantFiled: October 19, 2017Date of Patent: January 15, 2019Assignee: Simpleway Technologies Ltd.Inventors: Artem Bohdan, Ievgen Krutov
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Patent number: 10180847Abstract: A method disclosed herein includes operating a processor of a system on a chip in a configuration mode until completion of a set of tasks, and operating the processor in a normal operation mode after completion of the set of tasks. During the configuration mode, the method includes performing steps of sending by the processor of configuration information to a configuration programming block, sending by the configuration programming block of the configuration information to one or more electronic components to thereby complete a first subset of the set of tasks, while permitting the processor to complete a second subset of the set of tasks, and sending by the configuration programming block of a notification to the processor after completing the first subset of the set of tasks.Type: GrantFiled: April 4, 2017Date of Patent: January 15, 2019Assignee: STMicroelectronics (Research & Development) LimitedInventor: Gavin Probyn
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Patent number: 10180848Abstract: Described are techniques for determining features to be presented in a user interface based on the times that users spent viewing previous webpages or other user interfaces. A data structure associating user viewing times with the count, size, color, or other features of the elements presented in the previous user interfaces may be generated. Based on this data structure and a target viewing time, a set of user interface features to be presented in a subsequent user interface may be selected.Type: GrantFiled: November 25, 2015Date of Patent: January 15, 2019Assignee: AMAZON TECHNOLOGIES, INC.Inventor: Nima Sharifi Mehr
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Patent number: 10180849Abstract: An apparatus is provided. The apparatus includes an identifying unit configured to, by referring to information in which a permission type a user of the apparatus has with respect to an operation of the apparatus is indicated for identification information of the user, identify the permission type corresponding to the identification information input by the user; and a display control unit configured to display a screen based on screen configuration information corresponding to the permission type identified by the identifying unit. The screen configuration information item corresponding to the permission type is stored in a storage unit.Type: GrantFiled: June 7, 2016Date of Patent: January 15, 2019Assignee: Ricoh Company, Ltd.Inventor: Junji Ukegawa
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Patent number: 10180850Abstract: Emulating a heterogeneous application having a kernel designated for hardware acceleration may include compiling, using a processor, host program code into a host binary configured to execute in a first process of a computing system and generating, using the processor, a device program binary implementing a register transfer level simulator using the kernel. The device program binary may be configured to execute in a second, different process of the computing system. A high level programming language model of static circuitry of a programmable integrated circuit that couples to a circuit implementation of the kernel may be compiled into a static circuitry binary. The static circuitry binary may be used by the register transfer level simulator during emulation.Type: GrantFiled: November 3, 2015Date of Patent: January 15, 2019Assignee: XILINX, INC.Inventors: Amit Kasat, Nikhil A. Dhume, Sahil Goyal, Ch Vamshi Krishna
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Patent number: 10180851Abstract: In one implementation, an original physical profile file and a configuration baseline are stored for a virtual machine. The physical profile file includes physical characteristics of a physical device running the virtual machine. The configuration baseline includes configuration settings or attributes of the instance of the virtual machine. A network device detects current value for at least one physical characteristic and compares the current value to the original physical profile file. When the current values deviate enough from the original physical profile file to exceed a threshold amount of deviation that is permissible, the network device determines that the virtual machine has been moved to another physical device. In response, the network device monitors current configuration settings or attributes with respect to the configuration baseline in order to detect an unauthorized usage of the virtual machine.Type: GrantFiled: January 14, 2013Date of Patent: January 15, 2019Assignee: Cisco Technology, Inc.Inventors: Jeffrey David Haag, Earl Hardin Booth, III, James Ronald Holland, Jr.
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Patent number: 10180852Abstract: Exemplary methods, apparatuses, and systems include a client virtual machine processing a system call for a device driver to instruct a physical device to perform a function and transmitting the system call to an appliance virtual machine to execute the system call. The client virtual machine determines, in response to the system call, that an established connection with the appliance virtual machine has switched from a first protocol to a second protocol, the first and second protocols including a high-performance transmission protocol and Transmission Control Protocol and Internet Protocol (TCP/IP). The client virtual machine transmits the system call to the appliance virtual machine according to the second protocol. For example, the established connection may switch to the second protocol in response to the client virtual machine migrating to the first host device from a second host device.Type: GrantFiled: June 4, 2013Date of Patent: January 15, 2019Assignee: VMware, Inc.Inventors: Lawrence Spracklen, Hari Sivaraman, Vikram Makhija, Rishi Bidarkar
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Patent number: 10180853Abstract: Session reliability for a redirected mass storage device can be improved by delaying a device removal process when a redirected mass storage device is disconnected. Whenever a session employed to redirect a mass storage device is disconnected, the agent on the server can send a device removal notification to a virtual disk enumerator. Rather than immediately initiating the device removal process, the virtual disk enumerator can pause I/O requests pertaining to the mass storage device and wait a specified amount of time to allow the mass storage device to be reconnected. If the mass storage device is reconnected during the specified amount of time, the paused I/O requests can be resumed. Otherwise, the device removal process can be commenced after the specified amount of time has elapsed.Type: GrantFiled: May 2, 2016Date of Patent: January 15, 2019Assignee: Wyse Technology L.L.C.Inventor: Gokul Thiruchengode Vajravel
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Patent number: 10180854Abstract: A processing system includes an execution unit, communicatively coupled to an architecturally-protected memory, the execution unit comprising a logic circuit to execute a virtual machine monitor (VMM) that supports a virtual machine (VM) comprising a guest operating system (OS) and to implement an architecturally-protected execution environment, wherein the logic circuit is to responsive to executing a blocking instruction by the guest OS directed at a first page stored in the architecturally-protected memory during a first time period identified by a value stored in a first counter, copy the value from the first counter to a second counter, responsive to executing a first tracking instruction issued by the VMM, increment the value stored in the first counter, and set a flag to indicate successful execution of the second tracking instruction.Type: GrantFiled: September 28, 2016Date of Patent: January 15, 2019Assignee: Intel CorporationInventors: Rebekah M. Leslie-Hurd, Carlos V. Rozas, Dror Caspi
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Patent number: 10180855Abstract: A system and method is provided for controlling an operating state of a virtual processor. An exemplary method includes determining a blocked state of a guest operating system, and, upon detecting the blocked state, determining a number of interrupt events during a first time period. If the number of interrupts is less than a first threshold or even zero during a first time period, the method includes protecting memory pages from execution by the virtual processor. Moreover, the method includes detecting, during a second time period, when the processor attempts to execute protected memory pages and unprotecting these protected memory page. Then, during a third time period, the method includes monitoring execution by the processor of the unprotected memory pages and maintaining the processor in an idle state based on the number of executed unprotected memory pages during the third time period.Type: GrantFiled: June 13, 2017Date of Patent: January 15, 2019Assignee: Parallels International GmbHInventors: Alexey Koryakin, Nikolay Dobrovolskiy, Serguei M. Beloussov
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Patent number: 10180856Abstract: A method for performing dynamic port remapping during instruction scheduling in an out of order microprocessor is disclosed. The method comprises selecting and dispatching a plurality of instructions from a plurality of select ports in a scheduler module in first clock cycle. Next, it comprises determining if a first physical register file unit has capacity to support instructions dispatched in the first clock cycle. Further, it comprises supplying a response back to logic circuitry between the plurality of select ports and a plurality of execution ports, wherein the logic circuitry is operable to re-map select ports in the scheduler module to execution ports based on the response. Finally, responsive to a determination that the first physical register file unit is full, the method comprises re-mapping at least one select port connecting with an execution unit in the first physical register file unit to a second physical register file unit.Type: GrantFiled: July 25, 2016Date of Patent: January 15, 2019Assignee: INTEL CORPORATIONInventor: Nelson N. Chan
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Patent number: 10180857Abstract: A method and mobile terminal for determining a power efficiency of an application installed in and executed by a mobile terminal. The method includes: determining power consumption per unit time according to units of the installed and executed application; and determining a power efficiency level of the installed and executed application based on the determined power consumption per unit time. The mobile terminal includes: a power consumption determiner configured to determine power consumption per unit time according to units of the installed and executed application; and a level determiner configured to determine a power efficiency level of the installed and executed application based on the determined power consumption per unit time.Type: GrantFiled: June 6, 2014Date of Patent: January 15, 2019Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Jong-bum Choi, Hyung-hoon Kim
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Patent number: 10180858Abstract: A parallel arithmetic device includes a plurality of computing nodes; and a management node coupled to the plurality of computing nodes and including a computer, the management node being configured to calculate a degree of increasing a priority of each of a plurality of users, based on a degree of increasing the priority of the user depending on resource distribution to the user as time elapses and a difference between a current time instant and a future time instant, the priority being to be used in determining one of the plurality of users that has a job to which a computing resource at a first time instant being later than the current time instant is to be allocated.Type: GrantFiled: February 22, 2016Date of Patent: January 15, 2019Assignee: FUJITSU LIMITEDInventor: Akitaka Iwata
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Patent number: 10180859Abstract: Systems, apparatuses, methods, and computer programs for overprovisioning resources are disclosed. Resource usage statistics may be gathered for a plurality of client virtual machines (“VMs”). Statistical characteristics of resource usage by the plurality of client VMs may be calculated. It may also be determined which of the plurality of client VMs requesting resources to allocate resources to, as well as an amount of the resources to allocate, in a given time slot based on the calculated statistical characteristics.Type: GrantFiled: September 19, 2017Date of Patent: January 15, 2019Assignee: Open Invention Network LLCInventors: Farid Khafizov, Andrey Mokhov
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Patent number: 10180860Abstract: A cloud manager controls the deployment and management of machines for an online service. A build system creates deployment-ready virtual hard disks (VHDs) that are installed on machines that are spread across one or more networks in farms that each may include different configurations. The build system is configured to build VHDs of differing configurations that depend on a role of the virtual machine (VM) for which the VHD will be used. The build system uses the VHDs to create virtual machines (VMs) in both test and production environments for the online service. The cloud manager system automatically provisions machines with the created virtual hard disks (VHDs). Identical VHDs can be installed directly on the machines that have already been tested.Type: GrantFiled: May 22, 2015Date of Patent: January 15, 2019Assignee: MICROSOFT TECHNOLOGY LICENSING, LLC.Inventors: Jason M. Cahill, Alexander Hopmann, Marc Keith Windle, Erick Raymundo Lerma
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Patent number: 10180861Abstract: A task worker running on a worker server receives a process specification over a network. The process specification specifies a task to be executed by the task worker. The executed task includes generating an output data object for an output data stream based in part on an input data object from an input data stream. The process specification is accessed to specify the required fields to be read from for executing the task and to specify the generated the fields in the input data object that will be written to during or subsequent to the executing of the task. The task worker executes the task and generates the output data object. The output data object is then transmitted to the output stream based on the stream configuration.Type: GrantFiled: November 12, 2015Date of Patent: January 15, 2019Assignee: FAIR ISAAC CORPORATIONInventors: Shalini Raghavan, Tom J. Traughber, George Vanecek, Jr., Christopher Lee Bedford
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Patent number: 10180862Abstract: A method and system for interoperability between a first and second mark-up language application, both executable within a browser container, includes accessing a first exchange script in the first application and a second exchange script in the second application. The method and system includes executing a desktop services module in communication with the applications, the module disposed between the applications and the browser container. The method and system includes communicating between the first application and the desktop services module using the first exchange script and communicating between the second application and the desktop services module using the second exchange script. Therein, the method and system determines an interaction in the first application via desktop services module, generates an action command for the second application via an interoperability function in the desktop services module, and performs a processing operation in the second application based on the action command.Type: GrantFiled: May 16, 2018Date of Patent: January 15, 2019Assignee: CHARTIQ, Inc.Inventors: Daniel Gary Schleifer, Siddharth Gautam Dalal, Bradley Stewart Carter, Terrence Russell Thorsen, Michael Hugh McClung, Ryan Christopher Sharp
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Patent number: 10180863Abstract: A consumer transmits a set of system updates corresponding to an initial set of events retrieved from an event stream. The consumer determines that acknowledgement of the transmission of the initial set of events has not been received. The consumer executes another retrieval operation to retrieve events from the event stream which results in retrieving an updated set of events. The updated set of events includes the initial set of events and one or more additional events. The consumer trims the updated set of events to remove the one or more additional events and obtains the initial set of events. The consumer re-determines and re-transmits the system updates corresponding to the initial set of events that were obtained by trimming the updated set of events.Type: GrantFiled: October 31, 2016Date of Patent: January 15, 2019Assignee: Oracle International CorporationInventors: Aditya Sawhney, Venkat Pavan Kumar Bellapu Konda
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Patent number: 10180864Abstract: Systems and methods of increasing the efficiency of an event processing system are disclosed. In some example embodiments, a computer-implemented method comprises identifying a first group of computing events from a plurality of computing events in an execution pipeline based on a similarity between the computing events of the first group, and merging the computing events of the first group into a single representative computing event of the first group in the execution pipeline. In some example embodiments, the identifying of the first group of computing events comprises calculating a corresponding identifier using a hash function on at least one attribute of the corresponding computing event for each one of the plurality of computing events in the execution pipeline, and determining that the computing events of the first group have corresponding identifiers that match each other.Type: GrantFiled: November 11, 2016Date of Patent: January 15, 2019Assignee: SAP SEInventors: Rocky He, Chester Feng, Grace Yu
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Patent number: 10180865Abstract: A memory device includes a first interface that is to couple to a bidirectional link and a second interface to couple to a unidirectional link. An encoder generates first error-detection information corresponding to write data received via the bidirectional link for a write operation. An encoder generates second error-detection information corresponding to read data transmitted via the bidirectional link for a read operation. A transmitter coupled to the unidirectional link transmits the both the first and second error-detection information. A controller may receive the first and second error-detection information. Based on at least one of the first and second error-detection information, the controller may command the memory device to retry an operation.Type: GrantFiled: December 27, 2017Date of Patent: January 15, 2019Assignee: Rambus Inc.Inventors: Yuanlong Wang, Frederick A. Ware
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Patent number: 10180866Abstract: Effects of a physical memory fault are mitigated. In one example, to facilitate mitigation, memory is allocated to processing entities of a computing environment, such as applications, operating systems, or virtual machines, in a manner that minimizes impact to the computing environment in the event of a memory failure. Allocation includes using memory structure information, including, information regarding fault containment zones, to allocate memory to the processing entities. By allocating memory based on fault containment zones, a fault only affects a minimum number of processing entities.Type: GrantFiled: February 23, 2015Date of Patent: January 15, 2019Assignee: International Business Machines CorporationInventors: Jerry D. Ackaret, Robert M. Dunn, Susan E. Goodwin, Sumeet Kochar, Randolph S. Kolvick, James A. O'Connor, Wilson E. Smith, Jeffrey J. Van Heuklon
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Patent number: 10180867Abstract: Systems and methods are shown for detecting potential attacks on a domain, where one or more servers, in response to a failure event, obtain a lambda value from a baseline model of historical data associated with a current time interval corresponding to the failure event, determine a probability of whether a total count of failure events for the current time interval is within an expected range using a cumulative density function based on the lambda value, and identify a possible malicious attack if the probability is less than or equal to a selected alpha value.Type: GrantFiled: June 11, 2015Date of Patent: January 15, 2019Assignee: Leviathan Security Group, Inc.Inventors: Falcon Momot, Lorne Schell, Duncan Smith
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Patent number: 10180868Abstract: Adaptive read threshold voltage tracking techniques are provided that employ bit error rate estimation based on a non-linear syndrome weight mapping. An exemplary device comprises a controller configured to determine a bit error rate for at least one of a plurality of read threshold voltages in a memory using a non-linear mapping of a syndrome weight to the bit error rate for the at least one of the plurality of read threshold voltages.Type: GrantFiled: June 30, 2017Date of Patent: January 15, 2019Assignee: Seagate Technology LLCInventors: AbdelHakim S. Alhussien, Sundararajan Sankaranarayanan, Erich F. Haratsch
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Patent number: 10180869Abstract: Monitoring the health of a computer system and suggesting an order of repair when problems within the computer system have been identified. Problem(s) and problem entity(s) within the computer system are identified during monitoring. Relationship(s) of the problem entities with other entities in the computer system are identified. A relationship type for each of the identified relationship(s) is determined. A combination of the identified problem(s), the identified problem entity(s), and the determined relationship type(s) is analyzed to determine an order in which repairs of one or more user-visible entities of the computing system should occur in order to address the identified problem(s). An alert comprising the determined order of the repairs is then presented to a user.Type: GrantFiled: February 16, 2016Date of Patent: January 15, 2019Assignee: Microsoft Technology Licensing, LLCInventors: Alexander Say Go, Donald MacGregor, Gregorio Maeso, Noah Aaron Cedar Davidson
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Patent number: 10180870Abstract: A network device includes a processor; and a memory storing computer-readable instructions therein, the computer-readable instructions, when executed by the processor, causing the network device to perform: storing a first mail address and a second mail address; generating a first email to be addressed to the first mail address and a second email to be addressed to the second mail address, the first email having a first body including a URL, the second email having a second body including the URL; detecting a specific failure occurring in the network device; transmitting the first email to the first mail address and the second email to the second mail address when the specific failure is detected.Type: GrantFiled: October 12, 2017Date of Patent: January 15, 2019Assignee: BROTHER KOGYO KABUSHIKI KAISHAInventors: Shigetaka Yoshida, Atsushi Kojima, Hideto Matsumoto, Kiyotaka Ohara
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Patent number: 10180871Abstract: The disclosed embodiments relate to systems and methods for coordinating management of a shared disk storage between nodes. Particularly, a messaging protocol may be used to communicate notifications regarding each node's perception of the shared storage's state. The nodes may use the messaging protocol to achieve consensus when recovering from a storage device failure. Some embodiments provide for recovery when localized failures, such as failures at an adapter on a node, occur.Type: GrantFiled: May 23, 2016Date of Patent: January 15, 2019Assignee: NetApp Inc.Inventors: Todd Mills, Suhas Urkude, Kyle Sterling, Atul Goel
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Patent number: 10180872Abstract: Methods that use marking, leveling and linking (“MLL”) processes to identify problems and dynamically correlate events recorded in various log files generated for a use-case of an application are described. The marking process determines fact objects associated with the use-case from events recorded in the various log files, database dumps, captured user actions, network traffic, and third-party component logs in order to identify non-predefined problems with running the application in a distributed computing environment. The MLL methods do not assume a predefined input format and may be used with any data structure and plain log files. The MLL methods present results in a use-case trace in a graphical user interface. The use-case trace enables human users to monitor and troubleshoot execution of the application. The use-case trace identifies the types of non-predefined problems that have occurred and points in time when the problems occurred.Type: GrantFiled: August 10, 2016Date of Patent: January 15, 2019Assignee: VMware, Inc.Inventors: Thangamani K, Dinesh Surajmal, Kumaran Kamala Kannan, Hari Hara Subramanian Nagaiyanallur Sairam, Ramachandran Krishnan
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Patent number: 10180873Abstract: Provided herein may be a semiconductor memory device and a method for operating the same. The semiconductor memory device may include a memory cell array, a peripheral circuit, control logic, a status storage unit, and an operating characteristic checking unit. The memory cell array may include memory cells. The peripheral circuit may perform an operation for writing data to the memory cell array, reading data from the memory cell array, or erasing data written to the memory cell array. The control logic may control the peripheral circuit so that a data write operation, a data read operation or a data erase operation is performed. The status storage unit may store an operational status of the memory cell array as a first status value. The operating characteristic checking unit may receive an operating characteristic value, and generate a second status value via a comparison with an operation threshold value.Type: GrantFiled: July 6, 2017Date of Patent: January 15, 2019Assignee: SK Hynix Inc.Inventor: Deung Kak Yoo
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Patent number: 10180874Abstract: A data storage device may include a memory and a controller that includes an error correction coding (ECC) decoder configured to operate in a plurality of decoding modes. The controller also includes a bit error rate estimator configured to determine, based on data received from the memory, bit error rate estimates for ECC codewords from the memory. The controller also includes a data path management unit configured to reorder the codewords based on the bit error rate estimates and to provide the reordered codewords to the ECC decoder.Type: GrantFiled: June 5, 2017Date of Patent: January 15, 2019Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.Inventors: Alexander Bazarsky, Eran Sharon, Yuri Ryabinin, Yan Dumchin, Idan Alrod, Ariel Navon
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Patent number: 10180875Abstract: A method for performing error correction for a plurality of storage drives and a storage appliance comprising a plurality of storage devices is disclosed. In one embodiment, the method includes generating a first set of parity bits from a first set of data of at least one of the plurality of storage devices, the first set of parity bits capable of correcting a first number of error bits of the first set of data. The method further includes generating a second set of parity bits from a concatenated set of the first data and a second set of data from at least another of the plurality of storage devices, the second set of parity bits capable of correcting a second number of error bits of the first set of data, the second number being greater than the first number.Type: GrantFiled: July 8, 2016Date of Patent: January 15, 2019Assignee: Toshiba Memory CorporationInventor: Yaron Klein
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Patent number: 10180876Abstract: A memory controller includes: a host interface configured to receive a read command from the outside of the memory controller; and a read controller configured to perform a data read operation on a memory device according to the read command. The read controller performs a data read operation on a set of memory cells and determines a first and second values. The first value is a number of memory cells having a first threshold voltage among the set of memory cells, and the second value is a number of memory cells having a second threshold voltage among the set of memory cells. The read controller determines a first read voltage based on only the first and second values and performs a data read operation on the set of memory cells using the first read voltage.Type: GrantFiled: March 2, 2016Date of Patent: January 15, 2019Assignee: TOSHIBA MEMORY CORPORATIONInventor: Tokumasa Hara
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Patent number: 10180877Abstract: The present disclosure discloses a data storage device having error detection and correction capabilities. The data storage device includes an information encoder/decoder having error checking circuitry to determine whether one or more errors present in an input datastream. When the one or more errors are present in the input datastream, the information encoder/decoder activates error correction circuitry to correct the one or more errors when present in the input datastream. Otherwise, when the one or more errors are not present in the input datastream, the information encoder/decoder deactivates the error correction circuitry. This activation and deactivation conserves power when compared to conventional data storage devices. Any error correction circuitry, if present, in these conventional data storage devices continuously remain active even when the one or more errors are not present in the input datastream.Type: GrantFiled: May 12, 2016Date of Patent: January 15, 2019Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Chien-Yin Liu, Hsueh-Chih Yang, Kuan-Chun Chen, Yue-Der Chih, Yi-Chun Shih
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Patent number: 10180878Abstract: A memory system according to an embodiment includes a non-volatile memory that performs multi-value recording using a plurality of pages and a controller. The controller performs bit inversion for any page of first symbols in a data string. The first symbols are a certain code sequence in the data string. The controller dispersedly allocates bits to be inverted to the plurality of pages. The controller records substitution position information indicating a position of the bit inversion in redundant data of the bit-inverted page.Type: GrantFiled: September 12, 2016Date of Patent: January 15, 2019Assignee: Toshiba Memory CorporationInventor: Toshitada Saito
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Patent number: 10180879Abstract: A system and method for offset protection data in a RAID array. A computer system comprises client computers and data storage arrays coupled to one another via a network. A data storage array utilizes solid-state drives and Flash memory cells for data storage. A storage controller within a data storage array is configured to store user data in a first page of a first storage device of the plurality of storage devices; generate intra-device protection data corresponding to the user data, and store the intra-device protection data at a first offset within the first page. The controller is further configured to generate inter-device protection data corresponding to the first page, and store the inter-device protection data at a second offset within a second page in a second storage device of the plurality of storage devices, wherein the first offset is different from the second offset.Type: GrantFiled: December 14, 2015Date of Patent: January 15, 2019Assignee: Pure Storage, Inc.Inventors: John Colgrove, John Hayes, Bo Hong, Ethan Miller
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Patent number: 10180880Abstract: A method for execution by one or more processing modules of a dispersed storage network (DSN), the method begins by monitoring an encoded data slice access rate to produce an encoded data slice access rate for an associated rebuilding rate of a set of rebuilding rates. The method continues by applying a learning function to the encoded data slice access rate based on a previous encoded data slice access rate associated with the rebuilding rate to produce an updated previous encoded data slice access rate of a set of previous encoded data slice access rates. The method continues by updating a score value associated with the updated previous encoded data slice access rate and the rebuilding rate and selecting a slice access scheme based on the updated score value where a rebuild rate selection will maximize a score value associated with an expected slice access rate.Type: GrantFiled: August 25, 2017Date of Patent: January 15, 2019Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Ravi V. Khadiwala, Jason K. Resch
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Patent number: 10180881Abstract: Embodiments of the present invention also provide a system for increasing inter-application efficiency by conducting recovery of end-to-end transactions. Embodiments of the invention allow a transaction manager to track the status of a transaction being processed by a plurality of nodes in an array in order to perform error recovery of failed transactions within a node. The recovery process may involve restarting the transaction at the global step and the local step at which the transaction failed. By avoiding restarting the end-to-end transaction from the first step, the system may save precious computing resources of the computer systems within the nodes processing the end-to-end transaction, including, but not limited to, processing power, memory space, storage space, cache space, electric power, networking bandwidth, and I/O calls.Type: GrantFiled: August 19, 2016Date of Patent: January 15, 2019Assignee: Bank of America CorporationInventor: Brandon Matthew Castagna
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Patent number: 10180882Abstract: An acquisition unit that acquires, based on a combination of failures in components of an information system, a correction subprocedure for identifying a cause of failure and correcting trouble and a reconstruction subprocedure for reconstructing the component; a generator that generates at least one candidate for a service restart procedure of the information system by connecting the correction and the reconstruction subprocedures based on a dependency relationship between the acquired correction and reconstruction subprocedures; an estimator that estimates required time of at least one candidate for the service restart procedure; and a selector that identifies the service restart procedure, of which required time satisfies desired restoration time from among the candidates for the service restart procedure and selects, from among the identified candidates for the service restart procedure that has the risk of exceeding the desired restoration time, the service restart procedure based on a high/low degree ofType: GrantFiled: May 11, 2015Date of Patent: January 15, 2019Assignee: NEC CORPORATIONInventor: Kumiko Tadano
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Patent number: 10180883Abstract: A storage drive and associated system and method for storing data locally at the storage drive and/or at cloud storage may buffer, in a local storage buffer, data to be stored at the cloud and upload the data to the cloud storage from the local storage buffer. Upon receipt of an acknowledgement, from the cloud storage, that the data was successfully uploaded, the storage drive may delete the data from the local storage buffer. The storage drive may provide a ghost file representation of the uploaded data through the storage drive, through which the data uploaded to the cloud storage may be accessed. The storage drive may access multiple cloud storage accounts, each corresponding to a file folder on the storage drive, allowing the user to easily access different cloud storage accounts. The storage drive may recover data that was deleted from either local persistent storage or the cloud storage.Type: GrantFiled: April 25, 2017Date of Patent: January 15, 2019Assignee: MOKHTARZADA HOLDINGS, LLCInventors: Danyal Haroon Mokhtarzada, Zekeria Tariq Mokhtarzada, Ryan William Stout
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Patent number: 10180884Abstract: A method begins with a processing module receiving an access request and determining security requirements corresponding to the access request. The method continues with the processing module determining a subset of a plurality of dispersed storage units based on the security requirements. The method continues with the processing module determining, based on the security requirements, a connection security level for communicating with the subset of the plurality of dispersed storage units regarding the access request. The method continues with the processing module communicating the access request to the subset of the plurality of dispersed storage units in accordance with the connection security level for processing by the subset of the plurality of dispersed storage units.Type: GrantFiled: June 26, 2014Date of Patent: January 15, 2019Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Jason K. Resch, Wesley Leggette
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Patent number: 10180885Abstract: A system and method are provided for backing up and recovering data that allows the data to be modified and backed up even while recovery is still in progress. In some embodiments, the method includes performing a data recovery procedure on a computing system. The data recovery procedure includes identifying a set of data objects stored on a recovery system; retrieving the set of data objects; and storing data of the retrieved set of data objects to at least one storage device. Data objects may be prioritized so that data that is in demand is retrieved first. Data that is modified during the data recovery procedure is tracked and backed up to an object-storage system during the data recovery procedure. In some embodiments, backing up the modified data is part of an incremental backup procedure that excludes data objects that contains only unmodified data.Type: GrantFiled: November 10, 2015Date of Patent: January 15, 2019Assignee: NETAPP, INC.Inventors: Mitch Blackburn, Charles Binford, Reid Kaufmann
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Patent number: 10180886Abstract: A processing device receives a request to recreate an application from a particular point in time and determines a set of tags in a data store of hierarchical tags. The set of tags describe a computing environment hosting the application from the particular point in time. The hierarchical tags in the data store are created in response to a change to parameters of the computing environment. The processing device copies a snapshot from the data store to a replication data store, the snapshot of the computing environment being associated with a source data tag of the set of tags. The processing device recreates the computing environment hosting the application from the particular point in time in a replication environment using the set of tags and the snapshot stored in the replication data store.Type: GrantFiled: November 16, 2015Date of Patent: January 15, 2019Assignee: Red Hat, Inc.Inventor: Huamin Chen
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Patent number: 10180887Abstract: The present invention relates to an apparatus, method, and/or sequence that adaptively provide the recovery of data after a power cycle sequence, wherein only minimal updates are provided for control blocks associated with the data.Type: GrantFiled: June 8, 2016Date of Patent: January 15, 2019Assignee: BiTMICRO LLCInventors: Rolando H. Bruce, Richard A. Cantong, Marizonne O. Fuentes
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Patent number: 10180888Abstract: Example implementations relate to using a spare memory on a memory module. In example implementations, a memory module may have a plurality of memories, including default memories and a spare memory. A plurality of data buffers on the memory module may select data nibbles from the plurality of memories such that when a default memory is identified as defective, a data nibble is selected from the spare memory and not from the defective default memory. A data nibble selected from the default memory may be in a first position in an output of the memory module when the default memory is functional. A data nibble selected from the spare memory may be in a second position in the output of the memory module.Type: GrantFiled: September 27, 2013Date of Patent: January 15, 2019Assignee: Hewlett Packard Enterprise Development LPInventors: Melvin K Benedict, Eric L Pope, Andrew C. Walton