Patents Issued in January 15, 2019
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Patent number: 10180789Abstract: Systems, apparatuses, and methods for implementing software control of state sets are disclosed. In one embodiment, a processor includes at least an execution unit and a plurality of state registers. The processor is configured to detect a command to allocate a first state set for storing a first state, wherein the command is generated by software, and wherein the first state specifies values for the plurality of state registers. The command is executed on the execution unit while the processor is in a second state, wherein the second state is different from the first state. The first state set of the processor is allocated with the first state responsive to executing the command on the execution unit. The processor is configured to allocate the first state set for the first state prior to the processor entering the first state.Type: GrantFiled: January 26, 2017Date of Patent: January 15, 2019Assignee: Advanced Micro Devices, Inc.Inventors: Rex Eldon McCrary, Michael J. Mantor, Alexander Fuad Ashkar, Harry J. Wise
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Patent number: 10180790Abstract: A technique for copying a source data object within a data storage system to a destination includes ingesting data portions of the source object into respective pages of a cache. The cache associates the pages with respective descriptors and writes into the descriptors locations of storage elements that have been provided for storing the respective data portions at the destination. When later flushing these cache pages, each page is flushed to the location at the destination that is provided in the respective descriptor.Type: GrantFiled: September 30, 2016Date of Patent: January 15, 2019Assignee: EMC IP Holding Company LLCInventors: Alan L. Taylor, David Haase, Michael C. Brundage, Somnath A. Gulve
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Patent number: 10180791Abstract: A method for data steering in tiered storage is described. In one embodiment, the method includes ranking a plurality of storage areas of a storage device according to at least one property of the plurality of storage areas. In some embodiments, the plurality of storage areas include at least a first storage area and a second storage area. The method includes obtaining a sample of data at the storage device, passing the sample of data through one or more compression codecs, and analyzing a result of passing the sample of data through the one or more compression codecs. In some embodiments, the result includes a score of compression savings associated with the sample of data. The method includes storing the data in one of the plurality of storage areas based at least in part on the analyzing the result of passing the sample of data through the one or more compression codecs.Type: GrantFiled: August 21, 2017Date of Patent: January 15, 2019Assignee: SEAGATE TECHNOLOGY LLCInventor: Andrew M. Kowles
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Patent number: 10180792Abstract: Data storage devices may store selected data received from a data source to a buffer memory. The selected data may be copied from the buffer to a non-volatile memory configured for sequential storage. The selected data may then be copied from the buffer to a solid state memory, such as dynamic random access memory. The selected data may be copied from the solid state memory to a main store, such as a magnetic disc memory. If the selected data cannot be found in the solid state memory, the selected data in the non-volatile memory can be copied to the main store.Type: GrantFiled: April 30, 2015Date of Patent: January 15, 2019Assignee: Seagate Technology LLCInventors: Mark Gaertner, James D Sawin
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Patent number: 10180793Abstract: An example device in accordance with an aspect of the present disclosure includes a plurality of memory segments corresponding to at least one memory channel of a computing system that is to receive a memory module. A performance attribute of an Advanced Configuration and Power Interface (ACPI) table is set to indicate performance of at least one of the plurality of memory segments, and is usable for memory allocation by an operating system memory manager.Type: GrantFiled: January 31, 2017Date of Patent: January 15, 2019Assignee: Hewlett Packard Enterprise Development LPInventors: Vincent Nguyen, Thierry Fevrier, David Engler
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Patent number: 10180794Abstract: The subject technology provides reduced overhead in Low Density Parity Check decoding operations. A method includes receiving a hard decode fail indication from a decoder that decoding first raw data read from non-volatile memory in response to a first read command using a first set of voltages failed. The method includes determining a count of available soft decoders of a plurality of soft decoders of the decoder. The method includes determining, based on the count of available soft decoders and a pending number of soft decoding requests, a number of soft decoding requests to issue. The method includes issuing the determined number of soft decoding requests to respective ones of the available soft decoders for soft decoding the first raw data in parallel. The method includes receiving from the decoder a success indication of successful decoding.Type: GrantFiled: February 7, 2017Date of Patent: January 15, 2019Assignee: Western Digital Technologies, Inc.Inventors: Niang-Chu Chen, Jun Tao
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Patent number: 10180795Abstract: According to one embodiment, a memory system includes a memory and a memory controller. The memory includes a first buffer and a memory cell array. The memory controller includes a second buffer for receiving first data from a host. The memory controller transfers the first data to the first buffer without accumulating a predetermined size of the first data in the second buffer. The memory controller creates second data in the first buffer and programs the second data created in the first buffer into the memory cell array. The second data is formed of a plurality of third data. The third data is first data received from the memory controller by the memory. The size of the second data is equal to a size of a unit in which to program into the memory cell array.Type: GrantFiled: December 19, 2017Date of Patent: January 15, 2019Assignee: Toshiba Memory CorporationInventors: Yoshihisa Kojima, Tatsuhiro Suzumura, Tokumasa Hara, Hiroyuki Moro, Yohei Hasegawa, Yoshiki Saito
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Patent number: 10180796Abstract: A memory system includes: a plurality of first memory devices directly or indirectly coupled to one another, each first memory device including a first memory and a first memory controller suitable for controlling the first memory to store data; a second memory device including a second memory and a second memory controller suitable for controlling the second memory to store data; and a multi-processor including a plurality of processors, each processor executing an operating system (OS) and an application to access a data storage memory through the first and second memory devices.Type: GrantFiled: October 14, 2016Date of Patent: January 15, 2019Assignee: SK Hynix Inc.Inventors: Chang-Hyun Kim, Min-Chang Kim, Do-Yun Lee, Yong-Woo Lee, Jae-Jin Lee, Hoe-Kwon Jung
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Patent number: 10180797Abstract: Provided are a computer program product, system and method for determining adjustments to the spare space in a storage device unavailable to a user based on a current consumption profile of a storage device. A current write amplification is based on storage writes to a media at a storage device and host writes from a host to the storage device. An adjustment to the current write amplification is determined to produce an adjusted write amplification based on an estimated lifespan of the storage device, a maximum storage writes for the storage device, and the storage writes at the storage device since the storage device was powered-on. A determination is made to an adjustment to spare space based on the adjusted write amplification. The spare space and the free space available to the user are reconfigured to adjust the spare space by the determined adjustment to the spare space.Type: GrantFiled: May 31, 2017Date of Patent: January 15, 2019Assignee: INTEL CORPORATIONInventor: Knut S. Grimsrud
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Patent number: 10180798Abstract: An aspect of the invention is directed to a management server coupled to a first storage array which executes a given function and coupled to a plurality of second storage arrays. The management server comprises: a memory being configured to store information of hardware configurations of the plurality of second storage arrays and to store information of one or more configuration patterns which realize the given function using a plurality of storage arrays, the plurality of storage arrays including zero or more first storage arrays and zero or more second storage arrays; and a processor, in response to receipt of a request to create configuration for the given function on the plurality of second storage arrays, being configured to select at least one configuration pattern, of the one or more configuration patterns, which can be realized by the hardware configurations of the plurality of second storage arrays.Type: GrantFiled: October 27, 2014Date of Patent: January 15, 2019Assignee: Hitachi, Ltd.Inventor: Yasutaka Kono
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Patent number: 10180799Abstract: Preserving memory values during replay includes identifying trace sections that each represents events executed by an entity over a period of time. A parallel replay of trace sections is performed at a plurality of processing units. While performing the parallel replay, a persistence data structure corresponding to each trace section is maintained. This includes, for each trace section, storing, in the trace section's persistence data structure, a record of each memory address consumed by the processing unit while replaying the trace section, and a most recent memory value stored at each memory address. Returning a memory value during replay includes identifying relevant persistence data structures, and searching these data structures, in turn, based on a defined ordering. When a relevant memory address is identified during the search, the search is ceased and the value associated at the memory address, as stored in a persistence data structure, is returned.Type: GrantFiled: February 2, 2017Date of Patent: January 15, 2019Assignee: Microsoft Technology Licensing, LLCInventor: Jordi Mola
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Patent number: 10180800Abstract: Systems, apparatuses and methods may include technology that detects a migration request and conducts a first transfer, via a trusted execution environment (TEE), of storage context information from a first removable storage device to a secure memory region of a system in response to the data migration request. Additionally, the technology may conduct a second transfer, via the TEE, of the storage context information from the secure memory region to a second removable storage device, wherein the storage context information includes factory data, security data and boot firmware.Type: GrantFiled: March 2, 2017Date of Patent: January 15, 2019Assignee: Intel CorporationInventors: Karunakara Kotary, Krishna Kumar Ganesan, Vincent J. Zimmer
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Patent number: 10180801Abstract: The disclosed computer-implemented method for load balancing backup data may include (1) receiving a request to backup files in a multi-node computing cluster, (2) identifying a backup distribution of the files among multiple backup clients, (3) reading an initial data block of a current file from a data node in the cluster, (4) reading a copy of the initial data block of an additional file from another data node in the cluster, (5) reading a subsequent data block of the current file from the data node in the cluster, and (6) balancing backup of the current and additional files among the data node and the another data node by reading a copy of a subsequent backup data block of the additional file from the another data node in the multi-node computing cluster. Various other methods, systems, and computer-readable media are also disclosed.Type: GrantFiled: May 16, 2017Date of Patent: January 15, 2019Assignee: Veritas Technologies LLCInventors: Sudhakar Paulzagade, Pradip Kulkarni
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Patent number: 10180802Abstract: Storage sites are allocated pairs of nodes in which one node of the pair acts as an owner node while the other a backup node. When a local owner node receives a colliding write, the local owner node obtains a lock on the modified database and transfers both the write data and metadata to a remote owner node. The remote owner node returns a write complete message and the local site owner unlocks the modified database. When a local backup node receives a colliding write, the local backup node requests a lock from the local owner node and sends the write data to the remote owner node while the local owner node sends the write metadata to the remote owner node. The remote owner node then returns a write complete message to the local backup node which then requests the modified database be unlocked by the local owner node.Type: GrantFiled: May 18, 2017Date of Patent: January 15, 2019Assignee: International Business Machines CorporationInventors: Florent C. Rostagni, Andrea Sipka, John P. Wilkinson
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Patent number: 10180803Abstract: A method includes receiving a first request, from a first master core, to access data in one of a plurality of memory banks. It is determined whether an access to the data is stalled by virtue of a second request, from a second master core, to access the data in the one of the plurality of memory banks, the second request currently being serviced. In response to a determination that the access to the requested data is stalled, the first request is serviced by accessing data in one of a plurality of coding banks, each coding bank smaller in size than each memory bank.Type: GrantFiled: July 28, 2015Date of Patent: January 15, 2019Assignee: Futurewei Technologies, Inc.Inventors: Hao Luan, Alan Gatherer, Sriram Vishwanath, Casen Hunger, Hardik Jain
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Patent number: 10180804Abstract: The present disclosure includes apparatuses and methods for obfuscation-enhanced memory encryption. An example method comprises performing a write operation, wherein the write operation includes transmitting a number of write transactions received from a host along with a number of spurious transactions to a memory, and wherein the number of spurious transactions are transmitted at a particular rate among the number of received write transactions.Type: GrantFiled: September 7, 2018Date of Patent: January 15, 2019Assignee: Micron Technology, Inc.Inventor: Jayarama N. Shenoy
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Patent number: 10180805Abstract: Memory systems may include a memory device with multiple dies, a first super block, and a second super block, the first super block including a first meta-page stored at a location on a die and the second super block including a second-meta page stored at a location on a die; and a controller suitable for reading the meta-pages in the super blocks, wherein the stored location of the first meta-page is staggered with respect to the stored location of the second meta-page such that the first meta-page and the second meta-page are read by the controller during a single read.Type: GrantFiled: March 25, 2016Date of Patent: January 15, 2019Assignee: SK Hynix Inc.Inventors: Curtis Lehman, Frank Liao
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Patent number: 10180806Abstract: An information processing apparatus is connected to a plurality of online storages through a network. The apparatus includes a circuitry to divide a file into a plurality of pieces of segment data, encrypt each of the plurality of segment data with an encryption key, and generate a plurality of final generated files, each including the encryption key and at least one piece of the plurality of segment data encrypted with the encryption key, and a transmitter to transmit each one of the plurality of final generated files to a corresponding one of the plurality of online storages. The circuitry manages folder and file management information that associates a folder path of each of the folders stored in the online storages with a virtual folder path, and associates a file path of each of the final generated files stored in the online storages with a virtual file path.Type: GrantFiled: September 16, 2016Date of Patent: January 15, 2019Assignee: Ricoh Company, Ltd.Inventor: Naoki Shimizu
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Patent number: 10180807Abstract: A system and method for consolidating a plurality of heterogeneous storage systems in a data center comprising collecting data from a plurality of heterogeneous storage devices using data collection tools, using Data Preparation Tool for extracting and translating the collected data, populating a Data Model stored in source storage configuration unit suitable for analysis, analyzing and classifying the collected data by an analysis unit based upon a plurality of attributes, comprising of a Consolidation Advisor that uses the analyzed data and candidate Target System Configurations, Preferences & Constraints for generating optimum number, specification & configuration of the Consolidate Target State infrastructure and mappings of logical units from as-is data center storage infrastructure to the target state, and iteratively validating the same in a Validation task till the final desired consolidation and objectives are met.Type: GrantFiled: October 11, 2012Date of Patent: January 15, 2019Assignee: Tata Consultancy Services LimitedInventors: Prateep Misra, Soumitra Naskar, Sumanta Ghosh, Ankur Chakraborty, Nilanjan Roy
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Patent number: 10180808Abstract: A system includes a library, a compiler, a driver and at least one dynamic random access memory (DRAM) processing unit (DPU). The library may determine at least one DPU operation corresponding to a received command. The compiler may form at least one DPU instruction for the DPU operation. The driver may send the at least one DPU instruction to at least one DPU. The DPU may include at least one computing cell array that includes a plurality of DRAM-based computing cells arranged in an array having at least one column in which the at least one column may include at least three rows of DRAM-based computing cells configured to provide a logic function that operates on a first row and a second row of the at least three rows and configured to store a result of the logic function in a third row of the at least three rows.Type: GrantFiled: February 6, 2017Date of Patent: January 15, 2019Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Shaungchen Li, Dimin Niu, Krishna Malladi, Hongzhong Zheng
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Patent number: 10180809Abstract: An improved storage controller that enables the acceleration of datacenter software, by making it easier to deploy application software portions (applets) onto storage devices, in a manner that best supports runtime performance acceleration of storage-network-latency-throttled applications. Means are defined for how server hosted applications cause to have provisioned, initiate execution of, and work with a multitude of applets on a multitude of storage devices, proximate to storage contents. This invention supports the multi-exabyte growth of data storage, by scaling performance acceleration linearly with the growth in the number of storage devices. This in turn supports the evolving cloud and Enterprise Cognitive Computing datacenter by providing the infrastructure necessary for accelerating applications that face enormous heterogeneous datasets. This includes Big Data Analytics of problems that have eluded successful analysis.Type: GrantFiled: September 26, 2016Date of Patent: January 15, 2019Inventor: Richard Fetik
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Patent number: 10180810Abstract: According to one embodiment, a memory controller includes a memory, an adjustment part, a writing part and a setting change part. The memory stores first data, that includes a write amount with respect to a plurality of regions in a plurality of nonvolatile memories, and second data that includes a write state corresponding to the plurality of nonvolatile memories. The adjustment part selects the nonvolatile memory based on the first data and the second data. The write part writes the data to be written in the selected nonvolatile memory and updates the first data and the second data. The setting change part changes setting of a usable capacity with respect to at least one of the plurality of nonvolatile memories, based on the first data and the second data.Type: GrantFiled: March 6, 2017Date of Patent: January 15, 2019Assignee: KABUSHIKI KAISHA TOSHIBAInventor: Masato Koishi
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Patent number: 10180811Abstract: A semiconductor storage device includes m (m?2) memory chips, a buffer, and a controller. The controller arranges, in the buffer, a first plurality of data units to be transferred to N (1?N?m) of the m memory chips, in an order in which each of the first plurality of data units has been received from a host, for each one of the N memory chips, and arranges a second plurality of data units, if any, in an order in which each of the second plurality of data units has been received from the host, for each one of the next N memory chips. Upon the arranged data units, the controller collectively transfers the certain number of arranged data units to the memory. The value of N is changed based on an amount of data accumulated in the buffer.Type: GrantFiled: August 2, 2017Date of Patent: January 15, 2019Assignee: TOSHIBA MEMORY CORPORATIONInventors: Akinori Harasawa, Yoshihisa Kojima
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Patent number: 10180812Abstract: A cluster of nodes can receive a request to perform a logging operation of a distributed data storage application. The logging operation can include writing of data to a secondary storage of each of the nodes of the plurality of nodes. The request can include an indication of a durability mode to use for the logging operation. The logging operation can be initiated at each node of the plurality of nodes according to the indication of the durability mode, a completion callback can be run at each node of the plurality of nodes according to the indication of the durability mode, a global durability state and a global commit state can be determined for the cluster, and a reply can be returned to the request once the global durability state and global commit state are consistent with the indication of the durability mode to be used for the logging operation.Type: GrantFiled: June 16, 2016Date of Patent: January 15, 2019Assignee: SAP SEInventor: Ivan Schreter
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Patent number: 10180813Abstract: A processing device includes a reception unit, a processing unit, and an output unit. The reception unit receives a process designated by a user. The processing unit performs the process received by the reception unit. The output unit outputs the process to an external apparatus capable of executing the process received by the reception unit. When the reception unit receives multiple processes, a process that is included in the multiple processes and in which an output from the processing device has to be obtained is performed in the processing device, and at least a part of a process that is included in the multiple processes and in which an output from the processing device does not have to be obtained is output to the external apparatus by the output unit.Type: GrantFiled: May 16, 2017Date of Patent: January 15, 2019Assignee: FUJI XEROX CO., LTD.Inventors: Hiroshi Niina, Tetsuya Wakiyama, Masashi Okano, Junichi Shimizu, Kiyotaka Tsuchibuchi, Hiroshi Hayashi
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Patent number: 10180814Abstract: An image processing system includes: a cloud server that provides a service after identifying a user from first user information; an image processing device that executes a job after identifying the user from second user information, and execute the job; and a user terminal storing the second user information beforehand, wherein the cloud server includes: an access sensing processor that senses access from the user terminal; a user information validating processor that validates the first user information; and a job execution instructing processor that causes the user terminal to transmit a job containing the first and second user information to the image processing device, and the image processing device includes: a job receiving processor that receives the job transmitted; and a user information extracting processor that extracts the first and second user information from the job, and generate user reference information.Type: GrantFiled: June 14, 2016Date of Patent: January 15, 2019Assignee: Konica Minolta, Inc.Inventor: Masato Fujii
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Patent number: 10180815Abstract: Systems and method for variable data printing are provided. A composition system can receive a variable data printing job and can determine a plurality of subjobs. The composition system can determine a plurality of variable data print streams are determined. The composition system can transmit the plurality of variable data print streams and an indicator to expect a transmission of the plurality of variable data printing streams. The RIP can be configured to receive the indicator and the plurality of variable data printing streams.Type: GrantFiled: September 6, 2017Date of Patent: January 15, 2019Assignee: XMPIE (ISRAEL) LTD.Inventors: Jacob Aizikowitz, Zvika Leybovich, Hanan Weisman, Hadas Groisman, Amit Cohen
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Patent number: 10180816Abstract: The present disclosure discloses methods and systems for segregating large print jobs and minor print jobs. The method includes detecting a trigger event caused by receiving a new high priority job while an old print job is already under printing by a printer. The printer includes a paper collection tray installed in a paper collection area for receiving printouts of the high priority jobs. After receiving, printing of the old print job is paused and printing of the high priority is initiated. Then, a collection tray is moved to an extended position for receiving printouts of the high priority job into the collection tray. After successful printing of the new high priority job, printing of the old print job is resumed. Thereafter, the collection tray is moved back to the retracted position for receiving printouts in the collection area.Type: GrantFiled: July 11, 2017Date of Patent: January 15, 2019Assignee: Xerox CorporationInventor: Arockia Raja Soundararajan
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Patent number: 10180817Abstract: An information processing apparatus includes a first communication unit, a request accepting unit, a second communication unit, and a process performing unit. The first communication unit performs first communication to communicate with a terminal apparatus. The request accepting unit accepts a request for a data processing process from the terminal apparatus via the first communication. The second communication unit stores information concerning the requested data processing process in a memory upon the request accepting unit accepting the request, temporarily disconnects a connection between the information processing apparatus and the terminal apparatus, and performs second communication to communicate with the terminal apparatus in a case where a condition under which the requested data processing process is performed is satisfied. The process performing unit performs the requested data processing process via the second communication by using the information stored in the memory.Type: GrantFiled: April 7, 2015Date of Patent: January 15, 2019Assignee: FUJI XEROX CO., LTD.Inventor: Takanari Ishimura
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Patent number: 10180818Abstract: A rotary fader apparatus includes a fader control knob that is directly attached to the rotor of a non-contact electrical motor. The apparatus may produce a fade effect based on the rotational position of the fader control knob and may be automated through signals to the motor. Such a rotary fader apparatus may be used, for example, in audio mixing applications to provide automated or manual rotary control of track fading. The motor may also be used to alter the feel of the movement of the fader control knob and/or provide tactile feedback in response to mixing parameters or signal properties.Type: GrantFiled: September 10, 2014Date of Patent: January 15, 2019Assignee: Sound Devices, LLCInventors: Matt Anderson, Steven Popovich, Paul Isaacs, Jason McDonald
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Patent number: 10180819Abstract: Embodiments of a processor are disclosed for performing arithmetic operations on variable-length and fixed-length machine independent numbers. The processor may include a floating point unit, and a logic circuit. The number unit may be configured to receive an operation, and first and second operands. Each of the first and second operands may include a sign byte, and multiple mantissa bytes, and may be processed in response to a determination that the operands are fixed-length numbers. The logic circuit may be further configured to perform the received operation on the processed first and second operands.Type: GrantFiled: October 26, 2016Date of Patent: January 15, 2019Assignee: Oracle International CorporationInventors: Jeffrey S. Brooks, Christopher H. Olson, Eugene Karichkin
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Patent number: 10180820Abstract: In some examples, a method may be performed by a multiply-accumulate circuit. As part of the method a row driver of the multiply-accumulate circuit may drive a row value line based on an input vector bit of an input vector received by the row driver. The row driver may also drive a row line that controls a corresponding memristor according to the input vector bit. The corresponding memristor may store a weight value bit of a weight value to apply to the input vector for a multiply-accumulate operation. The method may further include a sense amplifier generating an output voltage based on a current output from the corresponding memristor and counter circuitry adjusting a counter value that represents a running total of the multiply-accumulate operation based on the row value line, the output voltage generated by the sense amplifier, or a combination of both.Type: GrantFiled: September 30, 2016Date of Patent: January 15, 2019Assignee: HEWLETT PACKARD ENTERPRlSE DEVELOPMENT LPInventors: Brent Buchanan, Le Zheng, John Paul Strachan
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Patent number: 10180821Abstract: Combining specifications of dataflow graphs includes receiving: a first dataflow graph specification that specifies two or more components connected by links representing flows of data, and a second dataflow graph specification that specifies at least one component, and at least one sub-graph interface. The sub-graph interface includes at least one flow junction representing a connection between: (1) a flow of data outside the sub-graph interface, and (2) a flow of data inside the sub-graph interface. The method includes processing information including the first dataflow graph specification and the second dataflow graph specification, to generate a combined dataflow graph specification, including: identifying an association between the sub-graph interface and the first dataflow graph specification, for at least a first flow junction, determining a direction associated with transferring a value of a descriptor, and transferring a value of a descriptor according to the determined direction.Type: GrantFiled: December 5, 2014Date of Patent: January 15, 2019Assignee: Ab Initio Technology LLCInventors: Brond Larson, Paul Bay, H. Mark Bromley
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Patent number: 10180822Abstract: According to certain embodiments, a development environment for mobile applications includes a design environment executed by a computing system in communication with a group of viewing applications operating on a group of mobile devices. The viewing applications correspond to version(s) of an application under development. In some embodiments, the design environment is capable of receiving inputs from a designer to modify the application under development. In some embodiments, the design environment provides to the viewing applications, during run-time and in real time, dynamic instructions based on the designer's modifications. In some embodiments, each viewing application executed by each mobile device includes localized features corresponding to features of the application under development, each localized feature optimized for the mobile device.Type: GrantFiled: July 25, 2016Date of Patent: January 15, 2019Assignee: Adobe Systems IncorporatedInventors: Andra Elena Iacov, Manuel Castellanos Raboso
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Patent number: 10180823Abstract: Systems and methods relate to creating applications using building blocks linked together with metadata. A user interface can enable a user to create an application. Creating the application can include defining a new building block configured to generate output data. The new building block can include one or more existing building blocks and the metadata associated with the existing building blocks. For example, a building block can include at least one input/output (I/O) feature configured to receive inputs and/or generate outputs. Further, the existing building block can correspond to a data structure including external I/O features. The new building block can be linked to an existing building block by mapping an external I/O feature of the existing building block to an open I/O feature of the new building block. The mapping can be stored in metadata associated with the new building block.Type: GrantFiled: January 5, 2017Date of Patent: January 15, 2019Assignee: Oracle International CorporationInventor: Keith Collins
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Patent number: 10180824Abstract: A computing device is provided configured to compute a data function on a function-input value comprising an electronic storage storing a table network configured for the data function and an electronic processor coupled to the storage and configured to compute the data function by applying the table network, wherein the device is configured to obtain the function-input value as an encoded input value, the encoded input value combines the function-input value together with a state-input value encrypted together into a single value, the table network is configured to take as input the encoded input value and produce as output an encoded output value, the encoded output value combines a function-output value together with a state-output value encrypted data function together into a single value, wherein the function-output value equals the result of applying the data function to the function-input value, and the state-output value equals the result of applying a state function to the state-input value.Type: GrantFiled: December 17, 2013Date of Patent: January 15, 2019Assignee: KONINKLIJKE PHILIPS N.V.Inventors: Ludovicus Marinus Gerardus Maria Tolhuizen, Paulus Mathias Hubertus Mechtildis Antonius Gorissen, Mina Deng, Alphons Antonius Maria Lambertus Bruekers
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Patent number: 10180825Abstract: Ubershaders may be used in a graphics development environment as an efficiency tool because many options and properties may be captured in a single shader program. Each selectable option of property in the shader code may be tagged with an attribute to indicate the presence of the selection. The single shader program embodying the many selectable options and properties may be compiled to an intermediate version that also embodies the many options and properties, along with at least remnants of the tagging attributes. Upon a request for executable code including indications of the desired selectable options or properties, generation of the executable code may proceed such that it includes only the desire selectable options and properties and not other selectable options and properties embodied in the source code.Type: GrantFiled: August 23, 2016Date of Patent: January 15, 2019Assignee: Apple Inc.Inventors: Aaftab A. Munshi, Charles Brissart, Owen Anderson, Mon Ping Wang, Ravi Ramaseshan
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Patent number: 10180826Abstract: A compiler generates transfer functions for blocks of a program during compilation of the program. The transfer functions estimate bit widths of variables in the blocks based on numbers of bits needed to carry out at least one instruction in the blocks and whether the variables are live in the blocks. For example, a transfer function may return a number indicating how many bits of a variable are needed to execute a current instruction as a function of the number of bits of the variable used by the program in subsequent instructions. Numbers of bits to represent the variables in the compiled program based on the transfer functions.Type: GrantFiled: October 22, 2015Date of Patent: January 15, 2019Assignee: Advanced Micro Devices, Inc.Inventors: Prakash Sathyanath Raghavendra, Dibyendu Das, Arun Rangasamy
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Patent number: 10180827Abstract: Optimizations are provided for sibling calls. A sibling caller is marked to indicate that it may call a sibling routine or that it may call an external sibling routine. Based on the marking, certain processing is performed to facilitate use of sibling calls, particularly when the sibling routine being called is external to the caller.Type: GrantFiled: December 14, 2016Date of Patent: January 15, 2019Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventor: Michael K. Gschwind
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Patent number: 10180828Abstract: A compilation system generates one or more energy windows in a program to be executed on a data processors such that power/energy consumption of the data processor can be adjusted in which window, so as to minimize the overall power/energy consumption of the data processor during the execution of the program. The size(s) of the energy window(s) and/or power option(s) in each window can be determined according to one or more parameters of the data processor and/or one or more characteristics of the energy window(s).Type: GrantFiled: April 29, 2015Date of Patent: January 15, 2019Assignee: SIGNIFICS AND ELEMENTS, LLCInventors: Muthu M. Baskaran, Thomas Henretty, Ann Johnson, Athanasios Konstantinidis, M. H. Langston, Richard A. Lethin, Janice O. McMahon, Benoit J. Meister, Paul Mountcastle, Benoit Pradelle
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Patent number: 10180829Abstract: A processing device includes a target processor instruction memory to store a plurality of memory access instructions, and a compiler. A vector invariant candidate detection module of the compiler to determine whether the memory access instruction is to be replaced by vector invariant access code, and in response: the complier to generate first replacement code that vectorizes the memory access instruction using vector invariant access code, and to replace the memory access instruction with the first replacement code. A vector modulo addressing candidate detection module of the compiler to determine whether the memory access instruction is to be replaced by vector modulo addressing access code, and in response: the complier to generate second replacement code that vectorizes the memory access instruction using vector modulo addressing code, and to replace the memory access instruction with the second replacement code.Type: GrantFiled: April 1, 2016Date of Patent: January 15, 2019Assignee: NXP USA, Inc.Inventors: Anca Gabriela Burlacu-Zane, Abderrazek Zaafrani
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Patent number: 10180830Abstract: Efficient system construction is enabled even when components (objects) of a system include such a setting item whose setting value is determined by an environment of a destination of construction during deployment. In a deployment device (100), a setting information storage unit (120) stores setting information indicating a referencing relation among setting items of a plurality of objects included in a system and a dependent item which is a setting item whose value is determined during deployment in an execution environment among the setting items of the plurality of objects. A deployment sequence determination unit (140) determines a sequence in which the plurality of objects are to be deployed in the execution environment, based on the setting information. A deployment execution unit (150) deploys each of the plurality of objects in the execution environment in accordance with the deployment sequence.Type: GrantFiled: June 11, 2015Date of Patent: January 15, 2019Assignee: NEC CORPORATIONInventor: Manabu Nakanoya
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Patent number: 10180831Abstract: An application installation method of a mobile device is provided. The method includes installing an application on the mobile device; presenting, if the application is installed, an icon corresponding to the application and a mark to indicate that the application is installed, such that at least a portion of the mark is located on the icon; executing the application; and presenting, after the application is executed, the icon without the mark.Type: GrantFiled: February 19, 2014Date of Patent: January 15, 2019Assignee: Samsung Electronics Co., LtdInventors: Joon-kyu Seo, Hyun-jin Kim, Ji-yeon Kwak, Jin Ra
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Patent number: 10180832Abstract: This invention relates to an application matching method for a mobile device and an accessory device. The mobile device installs a plurality of applications. When the mobile device is connected to the accessory device, the accessory device can receive an application list from the mobile device. The application list should be a list of applications installed on the mobile device. Thus, the accessory device is able to install or reload part of or all applications installed on the mobile device according to the application list.Type: GrantFiled: November 13, 2015Date of Patent: January 15, 2019Inventor: George Stantchev
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Patent number: 10180833Abstract: A system provides a software object to a developer for incorporation into an application. The software object includes processor-executable instructions that, upon installation of the software object in a mobile device, register a first domain with an operating system of the mobile device. In response to receiving a first deep link from the operating system, the software object determines whether the corresponding app is installed and, if so, selects a first format and transmits the first deep link using the first format. A web redirection server listens for HTTP requests at the first domain and, in response to receiving an HTTP request, prepares and transmits a redirection message to a source of the HTTP request. The redirection message includes a plurality of access mechanisms associated with the designated state of the designated application. The redirection message includes software instructions configured to select and actuate one of the access mechanisms.Type: GrantFiled: December 31, 2015Date of Patent: January 15, 2019Assignee: Samsung Electronics Co., Ltd.Inventors: Shravan Sogani, Jason Smith, Marshall Quander, Kenji Miwa
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Patent number: 10180834Abstract: Disclosed are various examples for deploying applications on client devices through a management service. A client device can be enrolled with a management service. The management service can determine application settings that are associated with an application and generate an application profile for the application. The application profile can be used to deploy the application to client devices and provision the application with the appropriate application settings.Type: GrantFiled: February 29, 2016Date of Patent: January 15, 2019Assignee: Airwatch LLCInventors: Stephen Turner, Scott Kelley
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Patent number: 10180835Abstract: In an example, a system is provided and the system includes a motor vehicle component client, a server located in the cloud, and an application to be installed on a personal portable device, such as mobile phone or other portable, mobile electronic device. In some examples, the system enables efficient vehicle software updates to the Engine Control Unit (ECU), the head unit, or the like, or combinations thereof, and/or enables efficient wireless transmission of vehicle data analytics associated with diagnostic information, location information, or the like, or combinations thereof.Type: GrantFiled: June 29, 2018Date of Patent: January 15, 2019Assignee: AIRBIQUITY INC.Inventor: Leon Hong
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Patent number: 10180836Abstract: Technologies are disclosed herein for generating comments in a source code review tool using code analysis tools. A producer module can be executed in order to obtain source code from a source code review tool. One or more source code analysis modules can then be executed in order to analyze the source code. A reporter module can then store the output of the source code analysis modules as comments in the source code review tool for use by a developer of the source code. The producer, reporter, and source code analysis modules can be executed in response to a request from the source code developer to perform a source code review, by a job scheduler, or in another manner. An application programming interface (API) exposed by the source code review tool can be utilized to obtain the source code and to store the comments associated with the source code.Type: GrantFiled: August 24, 2015Date of Patent: January 15, 2019Assignee: Amazon Technologies, Inc.Inventors: Carlos Alejandro Arguelles, Kevin Lester Quadros, Faizal Sultanali Kassamali
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Patent number: 10180837Abstract: Methods and apparatuses for version management. Information corresponding to multiple versions of a file is maintained in a database. The information includes one or more versions of the file and change data associated with the one or more versions of the file. In response to a request, a graphical user interface (GUI) is presented that includes a timeline with entries corresponding to one or more versions of the file. The entries have at least a graphical representation of changes made.Type: GrantFiled: July 20, 2015Date of Patent: January 15, 2019Assignee: salesforce.com, inc.Inventors: Owen Winne Schoppe, John Fredric Vogt, Jr., Simon Toens
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Patent number: 10180838Abstract: A processor fetches a multi-register gather instruction that includes a destination operand that specifies a destination vector register, and a source operand that identifies content that indicates multiple vector registers, a first set of indexes of each of the vector registers that each identifies a source data element, and a second set of indexes of the destination vector register for each identified source element. The instruction is decoded and executed, causing, for each of the first set of indexes of each of the vector registers, the source data element that corresponds to that index of that vector register to be stored in a set of destination data elements that correspond to the second set of identified indexes of the destination vector register for that source data element.Type: GrantFiled: September 19, 2017Date of Patent: January 15, 2019Assignee: Intel CorporationInventor: Ashish Jha