Patents Issued in June 18, 2019
  • Patent number: 10324108
    Abstract: A hand-held processor system for processing data from an integrated MEMS device disposed within a hand-held computer system and method. A dynamic offset correction (DOC) process computes 3-axis accelerometer biases without needing to know the orientation of the device. Arbitrary output biases can be corrected to ensure consistent performance A system of linear equations is formed using basic observations of gravity measurements by an acceleration measuring device, conditioned upon constraints in data quality, degree of sensed motion, duration, and time separation. This system of equations is modified and solved when appropriate geometric diversity conditions are met.
    Type: Grant
    Filed: February 5, 2013
    Date of Patent: June 18, 2019
    Assignee: mCube, Inc.
    Inventors: Sanjay Bhandari, Joe Kelly
  • Patent number: 10324109
    Abstract: A method and wireless sensor device for determining a time period a person is in bed. In one aspect, a method includes utilizing a wireless sensor device to obtain a plurality of acceleration samples in relation to at least one axis associated with a person's body over a predetermined time window. The method also includes calculating a polar angle for each acceleration sample within the predetermined time window. The method also includes calculating a fraction of an amount of time within the predetermined time window that the polar angle is greater than an angle threshold that indicates that the person is lying down, where if the fraction is greater than a predetermined threshold, the predetermined time window is marked as a period the person is lying down.
    Type: Grant
    Filed: September 15, 2016
    Date of Patent: June 18, 2019
    Assignee: VITAL CONNECT, INC.
    Inventors: Alexander Chan, Ravi Narasimhan
  • Patent number: 10324110
    Abstract: A probe cover which is to be attached to a socket that is configured to support a plurality of contact probes, includes: a base; two positioning pins which are disposed on the base; and at least one supporting member which is disposed on the base. The two positioning pins and the supporting member are capable of positioning the base in a state where the base is separated from the socket by a predetermined distance, and a mutual separation distance between the two positioning pins is changeable.
    Type: Grant
    Filed: March 20, 2015
    Date of Patent: June 18, 2019
    Assignee: Yokowo Co., Ltd.
    Inventors: Takahiro Nagata, Yoshiji Miyashita, Katsuo Miki, Kazumi Ookawara, Isao Samata
  • Patent number: 10324111
    Abstract: The embodiments of the present disclosure provide an apparatus, system and method for testing electrical functions. The apparatus for testing electrical functions comprises: at least one clamping tool configured to be capable of being clamped in the vicinity of at least one bonding area of an electronic device; at least one row of probes configured to be electrically connected to multiple pins in the at least one bonding area respectively when the at least one clamping tool is clamped; and at least one multiplex switch. Each multiplex switch has a first terminal comprising multiple ports, and a second terminal comprising at least one port and capable of being connected to a measurement instrument, and the at least one multiplex switch is configured to turn on or turn off an electrical connection between the multiple ports of the first terminal and at least one port of the second terminal.
    Type: Grant
    Filed: July 13, 2017
    Date of Patent: June 18, 2019
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Wenjin Fan, Lei Zhang, Zongjie Guo, Qingpu Wang, Qin Zeng
  • Patent number: 10324112
    Abstract: Embodiments of the present disclosure provide techniques and configurations for a package testing system. In some embodiments, the system may comprise a printed circuit board (PCB), including one or more sensors disposed adjacent to a corner of the PCB to face a package to be tested, to detect an electrical edge of the package. The PCB may include a contactor array disposed to face respective interconnects of the package. The system may further include a controller coupled with the one or more sensors, to process an input from the one or more sensors, to identify the electrical edge of the package, and initiate an adjustment of a position of the PCB relative to the package, based at least in part on the electrical edge of the package, to substantially align contacts of the contactor array with the respective interconnects of the package. Other embodiments may be described and/or claimed.
    Type: Grant
    Filed: December 6, 2016
    Date of Patent: June 18, 2019
    Assignee: Intel Corporation
    Inventors: Mohanraj Prabhugoud, Andrew J. Hoitink, Abram M. Detofsky, Joe F. Walczyk
  • Patent number: 10324113
    Abstract: The overall performance of a current sense amplifier system may be improved by increasing the common mode rejection of the system. In particular, improved current sense amplifiers may be configured to use a first signal path coupled to the amplifier and a first input terminal, wherein the first signal path is configured to measure the current through a device by generating a voltage proportional to the measured current, wherein the generated voltage includes a small signal voltage with a large common mode voltage, and a second signal path coupled to the amplifier and the first input terminal, wherein the second signal path is configured to reduce the common mode of the generated voltage by level shifting the generated voltage to reduce the common mode voltage.
    Type: Grant
    Filed: March 14, 2016
    Date of Patent: June 18, 2019
    Assignee: Cirrus Logic, Inc.
    Inventors: Vamsikrishna Parupalli, Itisha Tyagi
  • Patent number: 10324114
    Abstract: Adjustment of drive control based on a detection voltage of a transformer requires a loop time, and therefore high-speed processing of the adjustment is difficult. A semiconductor integrated circuit device includes a driving circuit that drives a power semiconductor device and a driving capability control circuit that controls a driving capability of the driving circuit. The driving circuit stops driving of the power semiconductor device based on an abnormal current detected from a sense current of the power semiconductor device. The driving capability control circuit controls the driving capability of the driving circuit based on a normal current detected from the sense current of the power semiconductor device.
    Type: Grant
    Filed: October 30, 2017
    Date of Patent: June 18, 2019
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventor: Makoto Tsurumaru
  • Patent number: 10324115
    Abstract: Provided is a method for measuring a current that a component of a matrix device can supply. A device including components (pixels) arranged in a matrix, first wirings, and second wirings and third wirings which cross the first wirings is used. Each component includes a potential supply circuit, a transistor, and a capacitor.
    Type: Grant
    Filed: September 15, 2015
    Date of Patent: June 18, 2019
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Yasuhiko Takemura
  • Patent number: 10324116
    Abstract: The invention relates to an apparatus and method for tracking energy consumption. An energy tracking system comprises at least one switching element, at least one inductor and a control block to keep the output voltage at a pre-selected level. The switching elements are configured to apply the source of energy to the inductors. The control block compares the output voltage of the energy tracking system to a reference value and controls the switching of the switched elements in order to transfer energy for the primary voltage into a secondary voltage at the output of the energy tracking system. The electronic device further comprises an ON-time and OFF-time generator and an accumulator wherein the control block is coupled to receive a signal from the ON-time and OFF-time generator and generates switching signals for the at least one switching element in the form of ON-time pulses with a constant ON-time.
    Type: Grant
    Filed: September 28, 2015
    Date of Patent: June 18, 2019
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Horst Diewald, Johann Zipperer, Peter Weber, Anton Brauchle
  • Patent number: 10324117
    Abstract: Systems and methods are disclosed for monitoring power consumption by electrical devices. In some aspects, a computing device can detect a change in aggregate electricity usage at a monitored environment that includes multiple electrical devices. The computing device can determine that electricity usage by one of the electrical devices has changed. The computing device can determine that the change in electricity usage has occurred based on a change in a monitored operational parameter other than electrical power provided to the electrical device. The value of the monitored operational parameter can change based on an operation performed by the electrical device when using electricity. The computing device can determine how electricity is used by the electrical device by correlating the change in the aggregate electricity usage and the change in the electricity usage by the electrical device.
    Type: Grant
    Filed: April 28, 2014
    Date of Patent: June 18, 2019
    Assignee: Landis+Gyr Innovations, Inc.
    Inventors: Emmanuel Monnerie, Patrick Melet, Ruben Emilio Salazar Cardozo
  • Patent number: 10324118
    Abstract: Embodiments herein provide a method for correcting power usage measurements at an apparatus. The method includes receiving, by the apparatus, a first power usage measurement from a utility meter measured at a first time unit and a second power usage measurement from a submeter measured at a set of second time units, wherein the set of second time units is dynamically defined with respect to the first time unit. Further, the method includes determining, by the apparatus, a time difference error based on the first time unit and each of the second time unit. Further, the method includes correcting, by the apparatus, the second power usage measurement based on the time difference error.
    Type: Grant
    Filed: May 30, 2016
    Date of Patent: June 18, 2019
    Inventors: Daeyoung Kim, Seonjeong Lee, Hyoseop Lee, Jong-woong Choe
  • Patent number: 10324119
    Abstract: The present disclosure relates to an insulation resistance measuring device and method, including a parameter resistance connected to a negative electrode terminal of a battery; a shunt resistance connectable to the parameter resistance; a current detection circuit including an operational amplifier configured to detect and output voltage between both ends of the shunt resistance; and a control unit configured to determine the insulation resistance of the battery using a switch control terminal configured to control a switch connected between the parameter resistance and the shunt resistance to an ON or OFF state, a detection signal output terminal configured to selectively apply a first high voltage signal and a first low voltage signal to the shunt resistance, a control signal output terminal configured to apply a control voltage signal to the operational amplifier to adjust an output voltage of the operational amplifier within a predetermined range, an ADC connected to an output terminal of the operational
    Type: Grant
    Filed: March 10, 2016
    Date of Patent: June 18, 2019
    Assignee: LG CHEM, LTD.
    Inventor: Ho-Been Choi
  • Patent number: 10324120
    Abstract: An arrangement includes a plurality of peripheral units and with a sensor, each of the plurality of peripheral units being provided with a connection for connecting the sensor to a supply voltage, includes a sensor input for connecting the sensor, and also includes a measuring resistor for acquiring a sensor current that represents a signal state, where a redundant acquisition and evaluation of the sensor current or a redundant operation of the sensor is permitted on the plurality of peripheral units via suitable measures.
    Type: Grant
    Filed: January 25, 2017
    Date of Patent: June 18, 2019
    Assignee: Siemens Aktiengesellschaft
    Inventors: Willi Maier, Norbert Rottmann
  • Patent number: 10324121
    Abstract: An electrostatic clamp monitoring system has an electrostatic clamp configured to selectively electrostatically clamp a workpiece to a clamping surface via one or more electrodes. A power supply electrically coupled to the electrostatic clamp is configured to selectively supply a clamping voltage to the one or more electrodes. A data acquisition system is coupled to the power supply and configured to measure a current supplied to the one or more electrodes, therein defining a measured current. A controller integrates the measured current over time, therein determining a charge value associated a clamping force between the workpiece and electrostatic clamp. A memory stores the charge value associated with the clamping force over a plurality of clamping cycles, therein defining a plurality of charge values, and the controller determines a clamping capability of the electrostatic clamp based on a comparison of a currently determined charge value to the plurality of charge values.
    Type: Grant
    Filed: December 28, 2012
    Date of Patent: June 18, 2019
    Assignee: Axcelis Technologies, Inc.
    Inventors: Edward K. McIntyre, Edward J. Ladny, Nathaniel Robinson, William Davis Lee
  • Patent number: 10324122
    Abstract: A method for predicting noise propagation in a circuit comprising correlating noise results predicted by a circuit model to a transistor level model with a processor, generating a first best fit data analytics model for identifying the optimal output pin capacitance as a function of circuit conditions and store the first best fit model in a noise rule file in a memory, generating a second best fit data analytics model for predicting noise peak output from the circuit model as a function of the circuit conditions and store the second best fit model in the noise rule file in the memory, and applying the first best fit model and the second best fit model in a noise analysis simulation to identify and simulate an optimal circuit.
    Type: Grant
    Filed: December 14, 2015
    Date of Patent: June 18, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Steven Kurtz, Ronald D. Rose, Sanjay Upreti
  • Patent number: 10324123
    Abstract: A semiconductor device includes a logic circuit, a memory circuit having a plurality of first static memory cells formed by a transistor on the semiconductor substrate, a monitor circuit having a second static memory cell formed by a transistor on the semiconductor substrate, the monitor circuit being configured to apply stress to the second static memory cell during a period in which the semiconductor device operates so that a state of the second static memory cell can be notified, and a bus coupled with the logic circuit, the memory circuit and the monitor circuit, wherein a size of the transistor of one cell of the first static memory cells is substantively the same as that of the transistor of the second static memory cell.
    Type: Grant
    Filed: November 21, 2017
    Date of Patent: June 18, 2019
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Hisao Kobashi, Yasuhiko Fukushima, Mikio Asai
  • Patent number: 10324124
    Abstract: A pad capacitance test circuit may be coupled to one or more pads of an electronic circuit, such as a processor. The pad capacitance test circuit may be located on a die including the electronic circuit. The pad capacitance test circuit may reset a pad voltage of one or more of the pads to zero, and then couple the pad to a supply voltage through a pullup resistor for a time period. The final pad voltage at or near the end of the period of time may be measured. The pad capacitance may be determined from the measured value of the final pad voltage and known values of the supply voltage, the time period, and resistance of the pullup resistor.
    Type: Grant
    Filed: June 16, 2015
    Date of Patent: June 18, 2019
    Assignee: Intel Corporation
    Inventors: Linda K. Sun, Harry Muljono
  • Patent number: 10324125
    Abstract: An integrated circuit die includes a substrate of semiconductor material having a top surface, a bottom surface, and an opening through the substrate between the top surface and the bottom surface. A through silicon via (TSV) has a conductive body in the opening, has a top contact point coupled to the body at the top surface, and has a bottom contact point coupled to the body at the bottom surface. A scan cell has a serial input, a serial output, control inputs, a voltage reference input, a response input coupled to one of the contact points, and a stimulus output coupled to the other one of the contact points.
    Type: Grant
    Filed: October 23, 2017
    Date of Patent: June 18, 2019
    Assignee: Texas Instruments Incorporated
    Inventor: Lee D. Whetsel
  • Patent number: 10324126
    Abstract: A method for aligning probe pins with respect to positions of electronic devices comprises conducting contact stamping on a first electronic device with the probe pins to form first probe marks on lead pads of the first electronic device, capturing an image of the first electronic device, determining positions of the first probe marks on the first electronic device using the captured image, calculating an offset using the positions of the first probe marks, adjusting relative positions between a subsequent plurality of electronic devices and the probe pins using the offset, and contacting lead pads of the subsequent plurality of electronic devices with the probe pins for testing said electronic devices. The first probe marks are configured to have greater visibility as compared with second probe marks formed when contacting the lead pads of the subsequent plurality of electronic devices with the probe pins, so as to improve the accuracy of the offset calculated.
    Type: Grant
    Filed: June 10, 2016
    Date of Patent: June 18, 2019
    Assignee: ASM TECHNOLOGY SINGAPORE PTE LTD.
    Inventors: Yu Sze Cheung, Hon Kam Ng, Chun Shing Yip
  • Patent number: 10324127
    Abstract: An electronic component handling apparatus (10) is provided which can improve the operation rate. The electronic component handling apparatus (10) includes: a contact arm (300) having a holding part (380) configured to hold a DUT (10A), the contact arm (300) being configured to press the DUT (10A) against a socket (410); an alignment device (200) including a camera (221) and a operation unit (230), the camera (221) being configured to image the DUT (10A) to acquire image information, the operation unit (230) being configured to adjust a position of the holding part (380) within a range of a maximum alignment amount (ALmax); and a control device (105) configured to control the contact arm (300) and the alignment device (200). When a predetermined condition is not satisfied, the control device (105) controls the contact arm (300) and the alignment device (200) so as to perform preliminary alignment work at least once.
    Type: Grant
    Filed: June 8, 2017
    Date of Patent: June 18, 2019
    Assignee: ADVANTEST CORPORATION
    Inventors: Yasuyuki Kato, Masataka Onozawa, Keisuke Nitta
  • Patent number: 10324128
    Abstract: Provided are a method of testing semiconductor device and a system for testing semiconductor device. The method includes measuring a minimum operating voltage of each of a plurality of sample semiconductor devices and an operating frequency of corresponding ring oscillators included in each of the plurality of sample semiconductor devices, generating a model between the operating frequencies of the ring oscillators and the minimum operating voltages of the sample semiconductor devices, measuring an operating frequency of ring oscillators included in a target semiconductor device, and determining a target minimum operating voltage of the target semiconductor device based on the operating frequency of the ring oscillators of the target semiconductor device and the model.
    Type: Grant
    Filed: June 7, 2017
    Date of Patent: June 18, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Oh Song Kwon
  • Patent number: 10324129
    Abstract: An integrated circuit (IC) automatic test system and an IC automatic test method storing test data in scan chains are revealed. The automatic test system includes at least one scan chain, a test controller and a test decompressor connected. Each scan chain consists of a storage portion with a plurality of scan units and a scan input corrector. The storage portion is for storing test data and the scan input corrector is used to adjust test patterns to be shifted into the scan chains. The test controller is for control of test flow while the test decompressor reconstructs and decompresses the test data stored in the storage portions of the scan chains to generate test patterns for the circuit under test. Thereby the IC electrical test is performed automatically and the test cost and the test cost is reduced.
    Type: Grant
    Filed: April 5, 2017
    Date of Patent: June 18, 2019
    Assignee: National Cheng Kung University
    Inventors: Kuen-Jong Lee, Ping-Hao Tang
  • Patent number: 10324130
    Abstract: A test decompressor and a test method thereof for converting original input data of one single test input into test vectors for testing a circuit under test (CUT) containing scan chains are revealed. The test decompressor includes a test data spreader, a test configuration switch, and a test controller. The test data spreader converts the original input data into a plurality of test data. The test configuration switch receives the original input data and the plurality of test data and transfers these data to scan chains of the CUT. The test controller receives the original input data and outputs a select signal to the test configuration switch for switching current test configuration to another test configuration. The scan chains in the CUT are divided into several scan groups and the scan chains in each scan group share the same test data. Thus the test data volume can be significantly reduced.
    Type: Grant
    Filed: April 5, 2017
    Date of Patent: June 18, 2019
    Assignee: National Cheng Kung University
    Inventors: Kuen-Jong Lee, Jhen-Zong Chen
  • Patent number: 10324131
    Abstract: The present disclosure provide techniques for semiconductor testing, and more particularly, to systems and methods for laser-based fault isolation and design for testability (DFT) diagnosis techniques. In one embodiment, an integrated chip (IC) testing apparatus, includes an input pin; a decompressor connected to the input pin; a plurality of scan chains, each scan chain of the plurality of scan chains comprising a plurality of scan cells; a plurality of scan chain control elements, each scan chain control element of the plurality of scan chain control elements being connected between the decompressor and a respective scan chain of the plurality of scan chains, wherein each scan chain control element is configured to enable or disable test data from flowing from the compressor to the respective scan chain; a compressor connected to an output of each scan chain of the plurality of scan chains; and an output pin connected to the compressor.
    Type: Grant
    Filed: January 16, 2018
    Date of Patent: June 18, 2019
    Assignee: QUALCOMM Incorporated
    Inventors: Lesly Endrinal, Rakesh Kinger, Joseph Fang, Srinivas Patil, Lavakumar Ranganathan, Chia-Ying Chen
  • Patent number: 10324132
    Abstract: Systems and methods for power line event zone identification are disclosed. Power line event zone identification may include receiving measured data corresponding to a signal measured on a power line, determining from the measured data that a power line event has occurred, and identifying a probable one of at least two monitoring zones in which the power line event occurred. The at least two monitoring zones may be defined for an Intelligent Electronic Device (IED). The systems may include an IED connected to the power line and a processor linked to the IED.
    Type: Grant
    Filed: June 7, 2011
    Date of Patent: June 18, 2019
    Assignee: ABB Inc.
    Inventors: Kari Saarinen, Mirrasoul Mousavi, James Stoupis, John McGowan
  • Patent number: 10324133
    Abstract: The utility model discloses a multifunctional charging box, comprising an upper cover, an upper shell, a lower shell, a base and a handle, wherein the base is fixedly connected with a battery unit for controlling circuit board; a control switch, an LED indicator, an input interface, several output interfaces and an LED floodlight are arranged on the said upper shell; the charging box can charge electric tool and other products through output interfaces; the LED floodlight can be used as charging box in a bad light or independently used as floodlight, or to send SOS signal under emergency situation; the charging box is provided with handle for facilitating carrying and use, can be put in bag, held in hand, hung, placed on desktop, hung on the waist and back. The charging box of the utility model is of simple structure, flexible design, multiple functions, and it's convenient to carry.
    Type: Grant
    Filed: May 17, 2017
    Date of Patent: June 18, 2019
    Assignee: SHENZHEN ENERGY STORAGE ELECTRONICS CO., LTD
    Inventor: Jinhui Zeng
  • Patent number: 10324134
    Abstract: A method and a device are provided for ascertaining the time required to fully charging a battery of the device. The device ascertains the type of power supply being used when charging the device by ascertaining the time required to fully charge the device based on a historical charging speed and an empirical charging speed corresponding to the power supply's type. Using the method and device provided by the present disclosure can ascertain the required charging time with more accuracy.
    Type: Grant
    Filed: January 13, 2015
    Date of Patent: June 18, 2019
    Assignee: Tencent Technology (Shenzhen) Company Limited
    Inventors: Lang Yang, Junming Luo
  • Patent number: 10324135
    Abstract: Methods and systems for estimating a state of charge (SoC) of a battery are disclosed. A method determines a first joint Gaussian distribution of values of the SoC given a set of historical measured physical quantities of the state of the battery and a corresponding set of historical values of the SoC of the battery. The method determines a second joint Gaussian distribution of SoC using the set of historical measured physical quantities and the corresponding set of historical values of the SoC, current measurement physical quantities of the battery and the first joint Gaussian distribution. Finally, the method determines a mean and a variance of the current value of the SoC of the battery from the second joint Gaussian distribution. The mean is an estimate of the current SoC of the battery, and the variance is a confidence of the estimate.
    Type: Grant
    Filed: June 6, 2016
    Date of Patent: June 18, 2019
    Assignee: Mitsubishi Electric Research Laboratories, Inc.
    Inventors: Milutin Pajovic, Gozde Ozcan, Zafer Sahinoglu, Yebin Wang, Philip Orlik
  • Patent number: 10324136
    Abstract: A method for testing electrical energy storage systems for driving vehicles provides that the load current of the energy storage system traces by means of a control loop, if possible without delay, a reference current that varies over time according to predetermined test cycles. The control loop is created by means of a model-based controller design method in which a model of the impedance of the energy storage system is integrated in the model of the controlled system.
    Type: Grant
    Filed: May 24, 2013
    Date of Patent: June 18, 2019
    Assignee: AVL LIST GMBH
    Inventors: Oliver König, Stefan Jakubek, Günter Prochart, Kurt Gschweitl
  • Patent number: 10324137
    Abstract: Various embodiments of the present technology provide methods for calibrating a full-charge capacity of a battery system. In some implementations, the battery system can be caused to enter into a static learning mode. During the static learning mode, current and past battery cell characteristics for each battery cell of the battery system can be collected, analyzed, and used to build up or update a database of correlations between a full-charge capacity of a specific type of battery cell and cell characteristics of a corresponding type of battery cell. The full-charge capacity of the battery system can be determined based at least upon cell characteristics of battery cells of the battery system, or the database of correlations between a full-charge capacity of a specific type of battery cell and cell characteristics of battery cells in the battery system.
    Type: Grant
    Filed: February 24, 2015
    Date of Patent: June 18, 2019
    Assignee: QUANTA COMPUTER INC.
    Inventor: Wen-Kai Lee
  • Patent number: 10324138
    Abstract: Embodiments of a method, a system, and non-transitory computer readable storage media evaluating electrochemical qualities for interphase products. The disclosed embodiments perform a selection of a plurality of chemical phases for a solid electrolyte and at least one of the anode and cathode to be received. Thermodynamic data is received for the plurality of chemical phases. The retrieved thermodynamic data is received to evaluate a respective electrochemical quality for at least one of an interface between the solid electrolyte and the anode, and an interface between the solid electrolyte and the cathode.
    Type: Grant
    Filed: November 15, 2016
    Date of Patent: June 18, 2019
    Assignee: MASSACHUSETTES INSTITUTE OF TECHNOLOGY
    Inventors: William D. Richards, Lincoln J. Miara, Yan E. Wang, Jae Chul Kim, Gerbrand Ceder
  • Patent number: 10324139
    Abstract: Embodiments herein provide a method and electronic device for detecting an internal short circuit in a battery. The method includes obtaining, by a battery management system, battery gauge data. Further, the method includes estimating, by the battery management system, an internal resistance of the battery using the battery gauge data. Furthermore, the method includes detecting, by the battery management system, the internal short circuit in the battery by comparing a change in the internal resistance with a pre-defined resistance change threshold value.
    Type: Grant
    Filed: December 27, 2017
    Date of Patent: June 18, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Piyush Tagade, Ashish Khandelwal, Krishnan Seethalakshmy Hariharan, Aravinda Reddy Mandli, Sanoop Ramachandran, Ankit Yadu, Periyasamy Paramasivam, Dough Heun Kang
  • Patent number: 10324140
    Abstract: Zero sequence current sensors for single-phase and multiphase power systems are disclosed. In one implementation, a zero sequence current sensor is positioned between conductors associated with a single-phase power system or a multiphase power system. The current sensor may be shaped to accommodate maintaining a substantially equal distance between the conductors associated with the single-phase power system or the multiphase power system.
    Type: Grant
    Filed: September 6, 2016
    Date of Patent: June 18, 2019
    Assignee: Littelfuse, Inc.
    Inventors: Daniel R. Gilman, Kip M. Larson, Brian Johnson
  • Patent number: 10324141
    Abstract: An apparatus comprises one or more substrates and one or more coils. At least one of the coils is configured to produce a first magnetic field that induces eddy currents in a conductive target, which generates a reflected magnetic field. One or more magnetic field sensing elements supported by the one or more substrates detect the reflected magnetic field. A conductive support structure supports the one or more substrates. The support structure includes a gap in an area adjacent to the one or more coils so that the support structure does not generate a reflected magnetic field in response to the first magnetic field.
    Type: Grant
    Filed: May 26, 2017
    Date of Patent: June 18, 2019
    Assignee: Allegro MicroSystems, LLC
    Inventors: Alexander Latham, Michael C. Doogue, Jason Boudreau
  • Patent number: 10324142
    Abstract: A diamond crystal according to the present invention has an NV region containing a complex (NV center) of nitrogen substituted with a carbon atom and a vacancy located adjacent to the nitrogen, on a surface or in the vicinity of the surface, wherein the NV region has a donor concentration equal to or higher than the concentration of the NV centers, or a crystal of the NV region is a {111} face or a face having an off-angle that is ±10 degrees or less against the {111} face, and a principal axis of the NV center is a <111> axis that is perpendicular to the {111} face. Such a diamond crystal enables almost 100% of the NV center to be a state (NV?) of having a negative electric charge, and spin states of the NV? centers to be aligned in one direction.
    Type: Grant
    Filed: January 19, 2015
    Date of Patent: June 18, 2019
    Assignees: JAPAN SCIENCE AND TECHNOLOGY AGENCY, NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY
    Inventors: Mutsuko Hatano, Takayuki Iwasaki, Norikazu Mizuochi, Toshiharu Makino, Hiromitsu Kato, Satoshi Yamasaki
  • Patent number: 10324143
    Abstract: In various embodiments, a Hall sensor arrangement for the redundant measurement of a magnetic field may include a first Hall sensor on a top side of a first semiconductor substrate; a second Hall sensor on a top side of a second semiconductor substrate; a carrier having a top side and an underside; wherein the first Hall sensor is arranged on the top side of the carrier and the second Hall sensor is arranged on the underside of the carrier; and wherein the measuring area of the first Hall sensor projected perpendicularly onto the carrier at least partly overlaps the measuring area of the second Hall sensor projected perpendicularly onto the carrier.
    Type: Grant
    Filed: March 29, 2017
    Date of Patent: June 18, 2019
    Assignee: Infineon Technologies AG
    Inventors: Berthold Astegher, Helmut Wietschorke
  • Patent number: 10324144
    Abstract: In some examples, a device includes a first conductive region and a second conductive region that is galvanically isolated from the first conductive region. The device further includes one or more conductors, wherein each conductor of the one or more conductors is electrically connected to circuitry in the first conductive region. The device also includes a giant magnetoresistive (GMR) sensor electrically connected to circuitry in the second conductive region and magnetically coupled to the one or more conductors, wherein the GMR sensor is positioned at least partially lateral relative to the one or more conductors.
    Type: Grant
    Filed: December 20, 2016
    Date of Patent: June 18, 2019
    Assignee: Infineon Technologies Austria AG
    Inventors: Hermann Gruber, Sergio Morini, Wolfgang Raberg, Holger Wille
  • Patent number: 10324145
    Abstract: A transverse-electromagnetic (TEM) radio-frequency coil (1) for a magnetic resonance system, especially for a magnetic resonance imaging system, includes a coil (1) in which at least one of the opposite end regions of the elongate strip section (4) of each TEM coil element (2) has a lateral extension (6) transverse to a longitudinal extent of the strip section (4). These lateral extensions (6) combine with strip sections (4) to form L- or U-shaped TEM coil elements (2) and provide ‘ring-like’ current contributions resulting in a reduction of the z-sensitivity compared with a conventional TEM coil. The result is a coil array having TEM coil elements (2) that provide smaller sensitivity profiles in the z-direction, yet preserve the characteristics of a well-defined RF ground, e.g. via an RF shield or screen (3). The reduced field of view in z-direction not only reduces noise reception but also reduces the SAR generated in those regions during transmission.
    Type: Grant
    Filed: October 3, 2012
    Date of Patent: June 18, 2019
    Assignee: KONINKLIJKE PHILIPS N.V.
    Inventors: Christoph Leussler, Daniel Wirtz
  • Patent number: 10324146
    Abstract: A method and apparatus for receiving (RX) radio-frequency (RF) signals suitable for MRI and/or MRS from a plurality of MRI “coil elements” (antennae), each contained in one or a plurality of body-coil parts, wherein the body-coil parts are easily assemble-able into a body-coil assembly (e.g., in some embodiments, a cylindrical body-coil assembly) with shield elements that are overlapped and/or concentric, and wherein the body-coil assembly is readily disassemble-able for easier shipping, and wherein the body-coil parts are optionally usable individually as transmit (TX) and/or receive (RX) coil elements for MRI. In some embodiments, the system provides for repeatable assembly and disassembly for ease of maintenance (such as frequency tuning and impedance matching) such that the body-coil assembly can be fully assembled and tested, then taken apart for less costly and easier shipping (with reduced risk of damage) and then reassembled at the destination for operation in an MRI system.
    Type: Grant
    Filed: January 12, 2017
    Date of Patent: June 18, 2019
    Assignee: Life Services, LLC
    Inventors: Brandon J. Tramm, Charles A. Lemaire, Matthew T. Waks, Scott M. Schillak
  • Patent number: 10324147
    Abstract: According to some aspects, a magnetic resonance imaging system comprising a B0 magnet configured to produce a B0 magnetic field for the magnetic resonance imaging system, the B0 magnet comprising at least one first B0 magnet to produce a magnetic field to contribute to the B0 magnetic field for the magnetic resonance imaging system, at least one second B0 magnet to produce a magnetic field to contribute to the B0 magnetic field for the magnetic resonance imaging system, wherein the at least one first B0 magnet and the at least one second B0 magnet are arranged relative to one another so that an imaging region is provided there between, a surface configured to support a patient anatomy within the imaging region, and a positioning member coupled to the B0 magnet and configured to allow the B0 magnet to be tilted to position the planar surface at a corresponding incline.
    Type: Grant
    Filed: September 20, 2018
    Date of Patent: June 18, 2019
    Assignee: Hyperfine Research, Inc.
    Inventors: Christopher Thomas McNulty, Michael Stephen Poole
  • Patent number: 10324148
    Abstract: A medical apparatus (300, 400, 500) includes a magnetic resonance imaging system (306); magnetic compensation coils (334, 335) for compensating for magnetic inhomogeneities within the imaging zone; a gantry (308) operable for rotating about the imaging zone; a position sensor (312) for measuring the angular position and the angular velocity of the gantry; at least one magnetic field distorting component (310, 510, 512) in the gantry; and a memory (362) storing machine executable instructions (380, 382, 410, 530, 532) and field correction data (372).
    Type: Grant
    Filed: January 16, 2014
    Date of Patent: June 18, 2019
    Assignee: KONINKLIJKE PHILIPS N.V.
    Inventors: Johannes Adrianus Overweg, Falk Uhlemann
  • Patent number: 10324149
    Abstract: Described here are systems and methods for using excited slice profiles to improve the point spread function (“PSF”) of super-resolution slices in SLIDER acquisitions while preserving all of the advantages of the SLIDER technique. The techniques described here may generally be referred to as “Generalized SLIDER” (“g-SLIDER”).
    Type: Grant
    Filed: October 5, 2016
    Date of Patent: June 18, 2019
    Assignee: The General Hospital Corporation
    Inventors: Kawin Setsompop, Jason Stockmann, Lawrence L Wald
  • Patent number: 10324150
    Abstract: In a method and apparatus for generating a magnetic resonance (MR) image data set of a target region, MR data for a first number of slices are recorded and the recording of MR data for a second number, which is smaller than or equal to the first number, of different slices takes place simultaneously. A separation algorithm of the parallel imaging is used to determine MR data that are assigned to individual slices from the multi-slice data set produced during the simultaneous recording of the multiple slices. This separation algorithm uses input parameters determined from a calibration data set of the target region, the calibration data set being recorded in a reference scan, after which the MR image data set is reconstructed from the MR data assigned to individual slices, wherein at least part of the calibration data set is also used for reconstructing the MR image data set.
    Type: Grant
    Filed: March 9, 2017
    Date of Patent: June 18, 2019
    Assignee: Siemens Healthcare GmbH
    Inventors: Mathias Blasche, Mario Zeller
  • Patent number: 10324151
    Abstract: In a method for generating an image data set for display, magnetic resonance data of a patient are provided to a computer that contains parameters of the protons underlying the measured magnetic resonance signal in measured voxels. The image data set is generated dependent on at least one user specification, taking into consideration at least two parameters per voxel.
    Type: Grant
    Filed: October 16, 2015
    Date of Patent: June 18, 2019
    Assignee: Siemens Aktiengesellschaft
    Inventor: David Grodzki
  • Patent number: 10324152
    Abstract: A passive apparatus including a plurality of resonators increases signal-to-noise ratio of radiofrequency signals emitted by a specimen and captured by an MRI machine. The apparatus increases the magnetic field component of radiofrequency energy during signal transmission from the MRI machine to the specimen, and/or reception of signals from the specimen to the MRI machine. Moreover, the apparatus enhances specimen safety by substantially avoiding unwanted generation of an electric field, or an increase in the electric field component of the RF energy. Use of the apparatus improves the images generated by the MRI machine, and/or reduces the time necessary for the MRI machine to capture the image.
    Type: Grant
    Filed: June 7, 2018
    Date of Patent: June 18, 2019
    Assignee: TRUSTEES OF BOSTON UNIVERSITY
    Inventors: Xin Zhang, Stephan Anderson, Guangwu Duan, Xiaoguang Zhao
  • Patent number: 10324153
    Abstract: A system and method for calculating a flip angle schedule is provided. The technique includes selecting an initial condition, providing a function for calculating flip angles, calculating flip angles, assessing the flip angles, and repeating the calculation of the flip angles by adjusting the function until a desired flip angle schedule is obtained.
    Type: Grant
    Filed: March 2, 2017
    Date of Patent: June 18, 2019
    Assignee: SHANGHAI UNITED IMAGING HEALTHCARE CO., LTD.
    Inventors: Guobin Li, Chaohong Wang
  • Patent number: 10324154
    Abstract: A magnetic resonance imaging method includes generating spatially resolved fiber orientation distributions (FODs) from magnetic resonance signals acquired from a patient tissue using a plurality of diffusion encodings, each acquired magnetic resonance signal corresponding to one of the diffusion encodings and being representative of a three-dimensional distribution of displacement of magnetic spins of gyromagnetic nuclei present in each imaging voxel. Generating the spatially resolved FODs includes performing generalized spherical deconvolution using the acquired magnetic resonance signals and a modeled tissue response matrix (TRM) to reconstruct the spatially resolved FODs. The method also includes using the spatially resolved FODs to generate a representation of fibrous tissue within the patient tissue.
    Type: Grant
    Filed: May 13, 2015
    Date of Patent: June 18, 2019
    Assignee: General Electric Company
    Inventors: Jonathan Immanuel Sperl, Christopher Judson Hardy, Luca Marinelli, Marion Irene Menzel, Ek Tsoon Tan
  • Patent number: 10324155
    Abstract: A computer-implemented method for sparse recovery of fiber orientations using a multidimensional Prony method for use in tractography applications includes performing magnetic resonance imaging to acquire a plurality of sparse signal measurements using a q-space sampling scheme which enforces a lattice structure with a predetermined number of collinear samples. Next, for each voxel included in the plurality of sparse signal measurements, a computer system is used to perform a parameter estimation process. This process includes translating a portion of the sparse signal measurements corresponding to the voxel into a plurality of Sparse Approximate Prony Method (SAPM) input parameters, and applying a SAPM process to the SAPM input parameters to recover a number of fiber populations, a plurality of orientation vectors, and a plurality of amplitude scalars.
    Type: Grant
    Filed: September 22, 2016
    Date of Patent: June 18, 2019
    Assignee: Siemens Healthcare GmbH
    Inventors: Evan Schwab, Hasan Ertan Cetingul, Boris Mailhe, Mariappan S. Nadar
  • Patent number: 10324156
    Abstract: Some implementations provide a MRI system configured to: access data encoding an input gradient waveform that would otherwise be used on a gradient sub-system of the MRI system to generate a gradient that corresponds to perturbations to the substantially uniform magnetic field; access data encoding a forward impulse response function and an inverse impulse response function, both characterizing a gradient generated from a target impulse input; pre-emphasizing the input gradient waveform by using both the forward impulse response function and the reverse impulse response function; and drive the gradient sub-system using the pre-emphasized gradient waveform such that distortions to the gradient caused by eddy currents within the gradient sub-system are substantially removed while radio-frequency (RF) samples for reconstructing an MRI image are being acquired from a grid that is substantially identical to when gradient sub-system is driven using the input gradient waveform.
    Type: Grant
    Filed: July 19, 2017
    Date of Patent: June 18, 2019
    Assignee: Synaptive Medical (Barbados) Inc.
    Inventors: Chad Tyler Harris, Andrew Thomas Curtis, Jeff Alan Stainsby, Geron André Bindseil
  • Patent number: 10324157
    Abstract: An RFID system includes multiple antennas and uses amplitude and phase information of the RFID signals received by each antenna to determine the position of RFID tags in the vicinity. More than one antenna can receive the RFID signals during a single read cycle, enabling the RFID system to operate more quickly than a system that energizes antennas separately.
    Type: Grant
    Filed: August 27, 2018
    Date of Patent: June 18, 2019
    Assignee: Magnet Consulting, Inc.
    Inventors: Forrest S. Seitz, Joshua K. Hoyt, Bartley A. Johnson, Tyler J. Seitz