Patents Issued in April 9, 2020
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Publication number: 20200111486Abstract: Natural speech dialog system and methods are disclosed. In one example, a method includes identifying a dialog system intent associated with the speech input based on at least one predetermined intent keyword, the dialog system intent having required intent parameters, determining whether data for all required intent parameters of the dialog system are available, based on the determination, selectively initiating a parameter collection dialog associated with the dialog system intent, the parameter collection dialog being operable to collect data for the required parameters not otherwise available to the dialog system intent, and based on the dialog system intent and one or more required parameters, generating an action instruction.Type: ApplicationFiled: October 14, 2019Publication date: April 9, 2020Inventors: Ilya Gennadyevich Gelfenbeyn, Pavel Aleksandrovich Sirotin, Artem Goncharuk
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Publication number: 20200111487Abstract: An application programming interface gateway receives a service request containing a voice command for invoking a first service for which the API gateway processes API calls, a manifest repository including a manifest file associated with the first service and containing a mapping from text commands to API endpoints associated with the first service, and a voice command processor that receives the voice command, converts the voice command to a converted text command, compares the converted text command to entries in the manifest, selects an entry in the manifest based on the converted text command, obtains a selected API endpoint associated with the entry in the manifest, constructs an API call to the service associated with the entry in the manifest that matches the converted text command, and issues the API call to the service.Type: ApplicationFiled: October 4, 2018Publication date: April 9, 2020Inventor: Jayanth Sanganabhatla
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Publication number: 20200111488Abstract: From a set of information obtained about a user, a profile is constructed representing a speech skill of the user, the set of information including audio, video, and demographic information of the user and other users, the constructing creating new data corresponding to the speech skill of the user in the profile. By correlating analytics of new real-time audio and video information with the new data in the profile, an intervention instruction is triggered automatically, the intervention being directed to change in a voice communication pattern of the user. The intervention is converted to an intervention instruction and the intervention instruction is output in a natural language form. New real-time audio and video information received in response to the spoken natural language instruction is analyzed.Type: ApplicationFiled: October 9, 2018Publication date: April 9, 2020Applicant: International Business Machines CorporationInventors: SHUBHADIP RAY, GREGORY J. BOSS, NORBERT HERMAN, ANDREW S. CHRISTIANSEN
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Publication number: 20200111489Abstract: An agent device includes a microphone which collects audio in a vehicle cabin, a speaker which outputs audio to the vehicle cabin, an interpreter which interprets the meaning of the audio collected by the microphone, a display provided in the vehicle cabin, and an agent controller which displays an agent image in a form of speaking to an occupant in a region of the display and causes the speaker to output audio by which the agent image speaks to at least one occupant, and the agent controller changes the face direction of the agent image to an direction different from an direction of the occupant who is a conversation target in a case that an utterance with respect to the face direction is interpreted by the interpreter after the agent image is displayed on the display.Type: ApplicationFiled: September 4, 2019Publication date: April 9, 2020Inventors: Toshikatsu Kuramochi, Wataru Endo, Ryosuke Tanaka
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Publication number: 20200111490Abstract: An electronic apparatus is provided. The electronic apparatus includes a communicator, a memory, and a processor connected to the communicator and the memory and configured to control the electronic apparatus. The processor is configured to, by executing at least one command stored in the memory, based on a user input for executing an assistant service being received, transmit information on a user voice acquired by the electronic apparatus to a plurality of servers providing different assistant services through the communicator, and based on a plurality of response information being received from the plurality of servers, provide a response on the user voice based on at least one of the plurality of response information. The plurality of servers provide the assistant service using an artificial intelligence agent.Type: ApplicationFiled: October 4, 2019Publication date: April 9, 2020Inventors: Wonnam JANG, Sooyeon KIM, Sungrae JO
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Publication number: 20200111491Abstract: A system for enabling user interaction with content, the system including an interaction processing system, including one or more electronic processing devices configured to obtain content code representing content that can be displayed, obtain interface code indicative of an interface structure, construct a speech interface by populating the interface structure using content obtained from the content code, generate interface data indicative of the speech interface and, provide the interface data to an interface system to cause the interface system to generate audible speech output indicative of a speech interface.Type: ApplicationFiled: October 4, 2019Publication date: April 9, 2020Inventor: Raymond James GUY
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Publication number: 20200111492Abstract: A computer implemented method of routing a verbal input to one of a plurality of handlers, comprising using one or more processors adapted to execute a code, the code is adapted for receiving a verbal input from a user, applying a plurality of verbal content identifiers to the verbal input, each of the verbal content identifiers is adapted to evaluate an association of the verbal input with a respective one of a plurality of handlers by computing a match confidence value for one or more features, such as an intent expressed by the user and/or an entity indicated by the user, extracted from the verbal input and routing the verbal input to a selected one of the handlers based on the matching confidence value computed by the plurality of verbal content identifiers. The selected handler is adapted to initiate one or more actions in response to the verbal input.Type: ApplicationFiled: December 8, 2019Publication date: April 9, 2020Inventors: Erez LM Bilgory, Eyal Cohen, Daniel Rose, Segev E. Wasserkrug
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Publication number: 20200111493Abstract: Included here are: a speech recognition unit for performing speech recognition on a speaker's speech; a keyword extraction unit for extracting a preset keyword from a result of the speech recognition; a conversation determination unit for referring to a keyword extraction result and determining whether or not the speaker's speech is a conversation; and an operation command extraction unit for extracting a command for operating an apparatus from the speech recognition result when the speech is determined not to be a conversation, and not extracting the command from the speech recognition result when the speech is determined to be a conversation.Type: ApplicationFiled: May 25, 2017Publication date: April 9, 2020Applicant: Mitsubishi Electric CorporationInventors: Takumi TAKEI, Takayoshi CHIKURI
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Publication number: 20200111494Abstract: The description relates to systems and methods for extending applications. For example, a voice assistant application can be the application to be extended. In an example, a mobile banking application can be the application that provides the extension. For example, a voice assistant might not have capability to conduct fingerprint (or biometric) authentication and bill payment function. An extension point within the voice assistant application that would enable this kind of capability might not exist. The mobile banking application can have a biometric tool for fingerprint authentication capability and a payment tool for a bill payment or money transfer function. Embodiments described herein can involve a deep link from the voice assistant application to the mobile banking application (which does offer fingerprint authentication and bill payment capability). The navigation to the mobile banking application can generate a visual impression at the UI similar or consistent with the voice assistant application.Type: ApplicationFiled: October 9, 2019Publication date: April 9, 2020Inventors: Alex Tak Kwun LAU, Arup SAHA
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Publication number: 20200111495Abstract: Systems and methods of diarization using linguistic labeling include receiving a set of diarized textual transcripts. A least one heuristic is automatedly applied to the diarized textual transcripts to select transcripts likely to be associated with an identified group of speakers. The selected transcripts are analyzed to create at least one linguistic model. The linguistic model is applied to transcripted audio data to label a portion of the transcripted audio data as having been spoken by the identified group of speakers. Still further embodiments of diarization using linguistic labeling may serve to label agent speech and customer speech in a recorded and transcripted customer service interaction.Type: ApplicationFiled: December 4, 2019Publication date: April 9, 2020Applicant: Verint Systems Ltd.Inventors: Omer Ziv, Ran Achituv, Ido Shapira, Jeremie Dreyfuss
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Publication number: 20200111496Abstract: A speaker recognition device includes: a feature calculator that calculates two or more acoustic features of a voice of an utterance obtained; a similarity calculator that calculates two or more similarities, each being a similarity between one of one or more speaker-specific features of a target speaker for recognition and one of the two or more acoustic features; a combination unit that combines the two or more similarities to obtain a combined value; and a determiner that determines whether a speaker of the utterance is the target speaker based on the combined value. Here, (i) at least two of the two or more acoustic features have different properties, (ii) at least two of the two or more similarities have different properties, or (iii) at least two of the two or more acoustic features have different properties and at least two of the two or more similarities have different properties.Type: ApplicationFiled: September 19, 2019Publication date: April 9, 2020Inventor: Kousuke ITAKURA
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Publication number: 20200111497Abstract: The invention provides a content playback system comprising a plurality of playback devices, each of which is configured to detect a voice command from a user and to play content. The system is configured to store an account conversation state associated with an account shared by the plurality of playback devices, and a device conversation state that is associated with a first playback device of the plurality of playback devices. When a voice command is detected by the first playback device, the system is configured to control the first playback device using information in the account conversation state and the device conversation state associated with the first playback device as an input. This may improve continuity of experience for a user across the plurality of playback devices.Type: ApplicationFiled: October 3, 2019Publication date: April 9, 2020Inventor: Joe LITTLEJOHN
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Publication number: 20200111498Abstract: Methods, systems, and media for managing a plurality of target devices are provided. A voice command is received by an input associated with a first target device. The voice command includes first voice information and indicates an operation instruction. The first voice information includes identification information. The first target device is specified by referencing a database in which the identification information and a device ID of the first target device are associated. It is determined whether the voice command includes second voice information that identifies a second target device as an operation object for the operation instruction. When the second voice information is not included, the first target device is caused to execute the operation instruction. When the second voice information is included, a control command is transmitted to the second target device for causing the second target device to execute the operation instruction.Type: ApplicationFiled: December 9, 2019Publication date: April 9, 2020Inventors: Yoshihiro KOJIMA, Yoichi IKEDA
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Publication number: 20200111499Abstract: The present disclosure relates to systems and methods for speech signal processing on a signal to transcribe speech. In one implementation, the system may include a memory storing instructions and a processor configured to execute the instructions. The instructions may include instructions to receive the signal, determine if at least a portion of data in the signal is missing, and when at least a portion of data is missing: process the signal using a hidden Markov model to generate an output; using the output, calculate a set of possible contents to fill a gap due to the missing data portion, with each possible content having an associated probability; based on the associated probabilities, select one of the set of possible contents; and using the selected possible content, update the signal.Type: ApplicationFiled: December 5, 2019Publication date: April 9, 2020Inventors: Xiaoming Li, Ehtesham Khan, Santosh Panattu Sethumadhavan
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Publication number: 20200111500Abstract: To convey information using an audio channel, an audio signal is modulated to produce a modulated signal by embedding additional information into the audio signal. Modulating the audio signal processing the audio signal to produce a set of filter responses; creating a delayed version of the filter responses; modifying the delayed version of the filter responses based on the additional information to produce an echo audio signal; and combining the audio signal and the echo audio signal to produce the modulated signal. Modulating the audio signal may involve employing a modulation strength, and a psychoacoustic model may be used to modify the modulation strength based on a comparison of a distortion of the modified audio signal relative to the audio signal and a target distortion.Type: ApplicationFiled: October 4, 2018Publication date: April 9, 2020Inventor: Daniel W. Griffin
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Publication number: 20200111501Abstract: Disclosed are an audio signal encoding method and device, and an audio signal decoding method and device. The encoding method includes transforming an original test signal of a time domain being an audio signal into a frequency domain, binarizing a coefficient of the original test signal of the frequency domain, performing an encoding layer feedforward using the binarized coefficient and a training model parameter derived through a training process, and performing an entropy encoding based on a result of performing the encoding layer feedforward.Type: ApplicationFiled: August 15, 2019Publication date: April 9, 2020Applicants: Electronics and Telecommunications Research Institute, The Trustees of Indiana UniversityInventors: Jongmo SUNG, Seung Kwon BEACK, Mi Suk LEE, Tae Jin LEE, Minje KIM
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Publication number: 20200111502Abstract: Embodiments relate to an audio processing unit that includes a bitstream payload deformatter and a decoding subsystem. The decoding subsystem is coupled to the bitstream payload deformatter and configured to decode at least a portion of a block of an encoded audio bitstream. The block includes a fill element with an identifier indicating a start of the fill element and fill data after the identifier. The fill data includes at least one flag identifying whether a base form of spectral band replication or an enhanced form of spectral band replication is to be performed on audio content of the block. The identifier is a three bit unsigned integer transmitted most significant bit first and having a value of 0x6.Type: ApplicationFiled: December 10, 2019Publication date: April 9, 2020Applicant: DOLBY INTERNATIONAL ABInventors: Lars Villemoes, Heiko Purnhagen, Per Ekstrand
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Publication number: 20200111503Abstract: A sound playback device and a noise reducing method thereof are disclosed. The method comprises the steps of: receiving an input sound signal, wherein the input sound signal includes a noise; performing a first denoising processing procedure to the input sound signal to obtain a first processing sound signal; performing a noise analysis procedure to the input sound signal to generate an analysis result; performing a second denoising processing procedure to the first processing sound signal to obtain a second processing sound signal according to the analysis result so as to reduce the noise; and outputting the second processing sound signal.Type: ApplicationFiled: August 23, 2019Publication date: April 9, 2020Inventors: Yu-Chieh HUANG, Kuo-Ping YANG, Po-Jui WU, Kuan-Li CHAO
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Publication number: 20200111504Abstract: Disclosed are a method and an apparatus of denoising, and the method includes: receiving a first voice signal picked up by a microphone; if it is detected, with the first voice signal, that a sensor is in an operation state, subtracting an interference noise signal from the first voice signal to obtain a first voice signal with the interference removed therefrom, where the interference noise signal is an interference noise signal generated with regard to the microphone during an operation of the sensor, and the sensor and the microphone are packaged in one module; and outputting the first voice signal with the interference removed therefrom. By implementing the solution provided in the present disclosure, interference in a signal collected by a microphone when the microphone and a sensor in a module operate together is reduced and the small size of the module, packaged with the microphone and sensor, is guaranteed.Type: ApplicationFiled: August 28, 2017Publication date: April 9, 2020Applicant: GOERTEK INC.Inventors: Dexin WANG, Xiangju XU, Luyu DUANMU
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Publication number: 20200111505Abstract: [Object] To more flexibly control the affinity of a spoken utterance for a background sound in accordance with the importance degree of an information notification. [Solution] There is provided an information processing apparatus including an utterance control unit that controls an output of a spoken utterance corresponding to notification information. The utterance control unit controls an output mode of the spoken utterance on the basis of an importance degree of the notification information and affinity for a background sound. In addition, there is provided an information processing method including controlling, by a processor, an output of a spoken utterance corresponding to notification information. The controlling further includes controlling an output mode of the spoken utterance on the basis of an importance degree of the notification information and affinity for a background sound.Type: ApplicationFiled: February 6, 2018Publication date: April 9, 2020Applicant: Sony CorporationInventors: Hiro IWASE, Mari SAITO, Shinichi KAWANO, Yuhei TAKI
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Publication number: 20200111506Abstract: An apparatus comprises a slider comprising an air bearing surface (ABS). The slider comprises a reader, a writer, and a reader heater. The reader heater is configured to cause a protrusion of the ABS proximate the reader, and the reader heater comprises a first planar loop and a second planar loop, wherein the first and second loops are in the same plane.Type: ApplicationFiled: October 3, 2018Publication date: April 9, 2020Inventors: Raul Horacio Andruet, Erik Jon Hutchinson
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Publication number: 20200111507Abstract: An audio processing system includes a server complex in communication with a network. The server complex receives a digital audio file and one or more analog domain control settings from a client device across the network. A digital-to-analog converter converts the digital audio file to an analog signal. One or more analog signal processors apply at least one analog modification to the analog signal in accordance with the one or more analog domain control settings. An analog-to-digital converter converts the modified analog signal to a modified digital audio file. The server complex can then deliver the modified digital audio file to the client device across the network.Type: ApplicationFiled: December 5, 2019Publication date: April 9, 2020Inventor: Colin Leonard
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Publication number: 20200111508Abstract: A system and method for interactive printed media are disclosed in which a mobile or wearable computing device has an application that captures an image of a piece of printed media and associates a link to the piece of printed media using a backend component to make the piece of printed media interactive. The system and method may be used to generate a piece of printed media that is interactive that may be sent to third parties or to make an existing piece of printed media interactive.Type: ApplicationFiled: December 5, 2019Publication date: April 9, 2020Inventor: Peter Lancaster
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Publication number: 20200111509Abstract: A network editor comprises a central location with stored videos such as movies that can be edited by editors at remote locations. An editor receives a representation of a video and specifies edits relative to the representation, enabling the editor to use a device lacking sufficient processing capability to edit the video directly, and also reducing the volume of information transmitted between the central location and the remote editor. The central location is able to provide the edited movie in a format suitable to the display capabilities of the viewing device of the viewer requesting the edited video.Type: ApplicationFiled: December 6, 2019Publication date: April 9, 2020Inventor: Thomas S. Gilley
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Publication number: 20200111510Abstract: The techniques described herein relate to methods, apparatus, and computer readable media configured to access multimedia data that has a hierarchical track structure that includes at least a first track at a first level of the hierarchical track structure comprising first media data, wherein the first media data comprises a first sequence of temporally-related media units, and a second track at a second level in the hierarchical track structure that is different than the first level of the first track, the second track comprising metadata specifying a temporal track derivation operation. The temporal track derivation operation is performed on a set of media units comprising at least the first sequence of temporally-related media units to temporally modify the set of media units to generate second media data for the second track, wherein the second media data comprises a second sequence of temporally-related media units from the set of media units.Type: ApplicationFiled: October 1, 2019Publication date: April 9, 2020Applicant: MEDIATEK Singapore Pte. Ltd.Inventors: Xin Wang, Lulin Chen
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Publication number: 20200111511Abstract: A conductive landing pad structure is formed utilizing a selective deposition process on a surface of an electrically conductive structure that is embedded in a first dielectric material layer. The conductive landing pad structure is located on an entirety of a surface of the electrically conductive structure and does not extend onto the first dielectric material layer. A conductive metal-containing structure is formed on a physically exposed surface of the conductive landing pad structure. During the formation of the conductive metal-containing structure which includes ion beam etching and/or a wet chemical etch, no conductive landing pad material particles re-deposit on the sidewalls of the conductive metal-containing structure.Type: ApplicationFiled: October 9, 2018Publication date: April 9, 2020Inventor: Chih-Chao Yang
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Publication number: 20200111512Abstract: A semiconductor memory device comprising a substrate including a cell region, first and second contact regions, and a bit peripheral circuit region disposed between the first and second contact regions. A first stack structure is disposed on the cell region and the first contact region. A second stack structure is disposed on the cell region and the second contact region. A peripheral transistor is disposed on the bit peripheral circuit region and is electrically connected to the first and second stack structures. Each of the first and second stack structures comprises semiconductor patterns vertically stacked on the cell region, and conductive lines having connection with the semiconductor patterns and extending along a first direction from the cell region onto corresponding first and second contact regions. The conductive lines have stepwise structures on the first and second contact regions.Type: ApplicationFiled: July 26, 2019Publication date: April 9, 2020Inventors: HUI-JUNG KIM, KEUNNAM KIM, HUNKOOK LEE, YOOSANG HWANG
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Publication number: 20200111513Abstract: The memory device includes a memory cell array including a plurality of memory cells and a voltage generator configured to supply a voltage to the memory cell array. The voltage generator includes a charge pump circuit, a switching circuit, and a stage controller. The charge pump circuit includes a plurality of pump units and is configured to output a pump voltage and a pump current in accordance with a number of pump units that have received an input voltage among the plurality of pump units. The switching circuit is configured to output the pump voltage. The stage controller is configured to receive an input signal corresponding to the pump current and perform a stage control operation of generating a stage control signal for controlling the number of pump units to be driven.Type: ApplicationFiled: July 3, 2019Publication date: April 9, 2020Applicant: Samsung Electronics Co., Ltd.Inventors: Se-heon BAEK, Dae-seok BYEON, Ki-chang JANG, Young-sun MIN
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Publication number: 20200111514Abstract: A packaged semiconductor device includes a data pin, a first memory die, and a second memory die stacked with the first memory die. The first memory die includes a first data interface coupled to the data pin and a first memory core having a plurality of banks. The second memory die includes a second memory core having a plurality of banks. A respective bank of the first memory core and a respective bank of the second memory core perform parallel row access operations in response to a first command signal and parallel column access operations in response to a second command signal. The first data interface of the first die provides aggregated data from the parallel column access operations in the first and second die to the data pin.Type: ApplicationFiled: October 15, 2019Publication date: April 9, 2020Inventor: Yohan Frans
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Publication number: 20200111515Abstract: A data readout apparatus may include a comparison circuit structured to compare a pixel signal with the ramp signal to generate a comparison result, a counter array structured to receive the comparison results to count up with each clock pulse from a first timing until a second timing to convert a counted number of clock pulses into differential data and output the differential data through differential data lines, and a sense amplifier array structured to receive the differential data to sense and amplify the differential data based on a judge clock. The sense amplifier array can include a replica delay structured to delay the judge clock and the precharge pulse signal based on a read out timing and read out the data from the counter array at the read out timing.Type: ApplicationFiled: December 31, 2018Publication date: April 9, 2020Inventors: Min-Seok Shin, Hoe-Sam Jeong
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Publication number: 20200111516Abstract: An apparatus includes: a master die; one or more slave dies; a ZQ resister between a first node and a second node coupled to a voltage terminal; a ZQ pad coupled to each of the first node of the ZQ resister, the master die and the one or more slave dies; and a calibration channel electrically coupling the master die and the one or more slave dies, the calibration channel configured to communicate signals between the master die and the one or more slave dies for coordinating access to the ZQ pad across the master die and the one or more slave dies.Type: ApplicationFiled: November 22, 2019Publication date: April 9, 2020Inventors: Jason M. Johnson, Jung-Hwa Choi
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Publication number: 20200111517Abstract: A semiconductor device is disclosed. The semiconductor device includes a first cell array and a second cell array, a first main word line disposed over the first cell array, a second main word line disposed over the second cell array, and a row decoder block disposed between the first cell array and the second cell array, and configured to include a common signal line that is commonly coupled to the first main word line and the second main word line such that a main word line control signal is simultaneously supplied to the first main word line and the second main word line.Type: ApplicationFiled: December 26, 2018Publication date: April 9, 2020Applicant: SK hynix Inc.Inventors: Jae Hwan SEO, Sung Soo CHI
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Publication number: 20200111518Abstract: Code comparators with nonpolar dynamical switches are provided. An example apparatus comprises: a plurality of row wires; a plurality of column wires; one or more cross-point devices, and a nonpolar volatile two-terminal device formed within a plurality of cross-point devices. Each cross-point device in the plurality of cross-point devices is located at a cross-point between a row in the plurality of row wires and a column in the plurality of column wires; the nonpolar volatile two-terminal device is configured to automatically revert from an ON state to an OFF state, in response to a removal of a bias or signal applied on the nonpolar volatile two-terminal device. The nonpolar volatile two-terminal device is configured to automatically revert from an ON state to an OFF state, in response to a removal of a bias or signal applied on the nonpolar volatile two-terminal device.Type: ApplicationFiled: October 5, 2018Publication date: April 9, 2020Applicant: TETRAMEM INC.Inventor: Ning Ge
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Publication number: 20200111519Abstract: Disclosed herein is a semiconductor device that includes an access control circuit generating an internal command based on a verification result signal and an external command. The external command indicates at least one of a first command that enables the access control circuit to access a first circuit and a second command that enables the access control circuit not to access the first circuit or enables the access control circuit to maintain a current state of the first circuit. The access control circuit, when the verification result signal indicates a first logic level, generates the internal command based on the external command. The access control circuit, when the verification result signal indicates a second logic level, generates the internal command that corresponds to a second command even if the external command indicates a first command.Type: ApplicationFiled: December 10, 2019Publication date: April 9, 2020Inventor: Chikara Kondo
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Publication number: 20200111520Abstract: A semiconductor memory apparatus includes a memory cell unit and an internal voltage stabilization apparatus. The memory cell unit includes a row decoder, a column decoder, and a memory cell array. The internal voltage stabilization apparatus includes an operation termination determination unit configured to determine whether an operation of the semiconductor memory apparatus is terminated on the basis of an external input voltage and output an operation termination command, a termination voltage generation unit configured to generate a termination voltage having a preset voltage value on the basis of a determination result of operation termination by the operation termination determination unit, and a switch unit. The switch unit includes a plurality of switches that are turned in response to the operation termination command, and supplies the termination voltage, input from the termination voltage generation unit, to a plurality of internal nodes of the memory cell array.Type: ApplicationFiled: February 6, 2019Publication date: April 9, 2020Inventors: Chan Min Park, Dae Sun Kim, In Cheol Nam, Chang Soo Lee, Jin Seok Jeong
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Publication number: 20200111521Abstract: A memory device is provided. The memory device comprises at least one word line driver comprising a first and a second switching device, wherein the word line driver is configured to activate a word line electrically coupled to one or more memory cells included in a memory bank. The memory device additionally comprises a memory bank controller operatively coupled to the at least one word line driver. The memory bank controller is configured to provide a word line power supply (PH) signal, a word line ON control (GR) signal, and a word line OFF control (PHF) signal to the at least one word line driver, and to adjust a timing of the PH, the GR, and the PHF signals to reduce or to eliminate a non-conducting stress (NCS) condition, a time dependent temperature instability (TDDB) condition, or a combination thereof, of the first switching device, of the second switching device, or of a combination thereof.Type: ApplicationFiled: October 3, 2018Publication date: April 9, 2020Inventor: Tae H. Kim
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Publication number: 20200111522Abstract: Apparatuses and methods for input receiver circuits and receiver masks for electronic memory are disclosed. Embodiments of the disclosure include memory receiver masks having shapes other than rectangular shapes. For example, a receiver mask according to some embodiments of the disclosure may have a hexagonal shape. Other shapes of receiver masks may also be included in other embodiments of the disclosure. Circuits, timing, and operating parameters for achieving non-rectangular and various shapes of receiver mask are described.Type: ApplicationFiled: October 4, 2018Publication date: April 9, 2020Applicant: MICRON TECHNOLOGY, INC.Inventors: Dean D. Gans, John D. Porter
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Publication number: 20200111523Abstract: A memory device is provided. The memory device receives a main clock signal and provides an internal main clock signal; a data clock buffer to receive a data clock signal; and a latency control circuit configured to generate latency information based on the data clock signal and provide the latency information to a data circuit. The latency control circuit includes: a divider configured to generate divided-by-two clock signals based on the data clock signal; a divider configured to generate divided-by-four clock signals based on a first group of the divided-by-two clock signals; a first synchronization detector configured to output divided-by-two alignment signals indicating whether a second group of divided-by-two clock signals is synchronized with the data clock signal; and a latency selector configured to detect phases of the divided-by-four clock signals based on the divided-by-two alignment signals and adjust a latency of the main clock signal based on the phases.Type: ApplicationFiled: April 19, 2019Publication date: April 9, 2020Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Dong-Keon LEE, Kyung-Soo Ha, Hyong-Ryol Hwang
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Publication number: 20200111524Abstract: Techniques are described herein for mitigating parasitic signals induced by state transitions during an access operation of a selected memory cell in a memory device. Some memory devices may include a plate that is coupled with memory cells associated with a plurality of digit lines and/or a plurality of word lines. Because the plate is coupled with a plurality of digit lines and/or word lines, unintended coupling between various components of the memory device may occur during an access operation. To mitigate parasitic signals induced by the unintended coupling, the memory device may isolate the selected memory cell from a selected digit line during certain portions of the access operation. The memory device may isolate the selected memory cell when the plate transitions from a first voltage to a second, when the selected digit line transitions from a third voltage to a fourth voltage, or a combination thereof.Type: ApplicationFiled: October 14, 2019Publication date: April 9, 2020Inventors: Umberto Di Vincenzo, Lucia Di Martino
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Publication number: 20200111525Abstract: Memory devices and methods of operating memory devices in which refresh management operations can be scheduled on an as-needed basis for those memory portions where activity (e.g., activations in excess of a predetermined threshold) warrants a refresh management operation are disclosed. In one embodiment, an apparatus comprises a memory including a memory location, and circuitry configured to determine a count corresponding to a number of activations at the memory location, to schedule a refresh management operation for the memory location in response to the count exceeding a first predetermined threshold, and to decrease the count by an amount corresponding to the first predetermined threshold in response to executing the scheduled refresh management operation. The circuitry may be further configured to disallow, in response to determining that the count has reached a maximum permitted value, further activations at the memory location until after the count has been decreased.Type: ApplicationFiled: October 9, 2019Publication date: April 9, 2020Inventors: Timothy B. Cowles, Dean D. Gans, Jiyun Li, Nathaniel J. Meier, Randall J. Rooney
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Publication number: 20200111526Abstract: A semiconductor memory device comprising a plurality of memory cells configured to store digital data and an input multiplexer configured to enable the selection of a particular memory cell from the plurality of memory cells. The semiconductor memory device further comprises a read/write driver circuit configured to read data from the selected memory cell and write data to the selected memory cell, and a write logic block configured to provide logical control to the read/write driver circuit for writing data to the selected of memory cell. The read/write driver circuit may be coupled to the read/write input multiplexer by a data line and an inverted data line and the read and the write operations to the selected memory cell occur over the same data line and inverted data line.Type: ApplicationFiled: December 5, 2019Publication date: April 9, 2020Inventors: Chien-Yuan Chen, Che-Ju Yeh, Hau-Tai Shieh, Cheng-Hung Lee, Hung-Jen Liao, Sahil Preet Singh, Manish Arora, Hemant Patel, Li-Wen Wang
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Publication number: 20200111527Abstract: a device is disclosed to include a first write assist unit and a second write assist unit. The first write assist unit provides a first operational voltage and a second operational voltage to a memory cell. The second write assist unit provides a third operational voltage and a fourth operational voltage to the memory cell. During a write operation, the first write assist unit further adjusts the first operational voltage or the second operational voltage while the third operational voltage and the fourth operational voltage are at a same voltage level, and the second write assist unit further adjusts the third operational voltage or the fourth operational voltage while the first operational voltage and the second operational voltage are at a same voltage level.Type: ApplicationFiled: December 5, 2019Publication date: April 9, 2020Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventor: Jaspal Singh SHAH
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Publication number: 20200111528Abstract: The disclosed technology generally relates to memory apparatuses and methods of operating the same, and more particularly to a memory device having a controller configured to cause a write operation to be performed on a variable resistance memory cell, which includes application of two successive access pulses having opposite polarities, and methods of using the same.Type: ApplicationFiled: December 6, 2019Publication date: April 9, 2020Inventors: Paolo Fantini, Daniele Ielmini, Nicola Ciocchini
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Publication number: 20200111529Abstract: A sensing circuit of nonvolatile memory device includes a precharge current generator, an adjusting transistor, and an adaptive control voltage generator. The precharge current generator connected to a sensing node and generates a precharge current provided to a bit-line of the nonvolatile memory device, in response to a precharge signal. The adjusting transistor, connected between the sensing node and a first node, adjusts an amount of the precharge current provided to the bit-line in response to a first control voltage. The adaptive control voltage generator generates a control current proportional to an operating temperature, in response to the precharge signal and a second control voltage and boosts a level of the first control voltage in proportion to the operating temperature. The second control voltage is inversely proportional to the operating temperature.Type: ApplicationFiled: March 27, 2019Publication date: April 9, 2020Inventor: Hyun-Jin SHIN
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Publication number: 20200111530Abstract: Various embodiments include methods and apparatuses, such as memory cells formed on two or more stacked decks. A method includes forming a first deck with first levels of conductor material and first levels of dielectric material over a substrate. Each level of the conductor material is separated from an adjacent level of conductor material by at least one of the first levels of dielectric material. A first opening is formed through the first levels of conductor material and dielectric material. A sacrificial material is formed at least partially filling the first opening. A second deck is formed over the first deck. The second deck has second levels of conductor material and second levels of dielectric material with each level of the conductor material being separated from an adjacent level of conductor material by at least one of the second levels of dielectric material. Additional apparatuses and methods are disclosed.Type: ApplicationFiled: December 9, 2019Publication date: April 9, 2020Inventors: Akira Goda, Roger W. Lindsay
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Publication number: 20200111531Abstract: Provided herein may be a memory controller and a method of operating the same. The memory controller may include a control component configured to control an operation of a semiconductor memory device including a plurality of memory cells in response to a request from a host. The control component may be configured to select a subset of memory cells, among all memory cells in a selected page of the semiconductor memory device, and to determine an optimal read voltage based on the select subset of memory cells.Type: ApplicationFiled: December 6, 2019Publication date: April 9, 2020Inventor: Ji Man HONG
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Publication number: 20200111532Abstract: Provided herein may be a memory controller and a method of operating the same. The memory controller may include a control component configured to control an operation of a semiconductor memory device including a plurality of memory cells in response to a request from a host. The control component may be configured to select a subset of memory cells, among all memory cells in a selected page of the semiconductor memory device, and to determine an optimal read voltage based on the select subset of memory cells.Type: ApplicationFiled: December 6, 2019Publication date: April 9, 2020Inventor: Ji Man HONG
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Publication number: 20200111533Abstract: Provided herein may be a memory controller and a method of operating the same. The memory controller may include a control component configured to control an operation of a semiconductor memory device including a plurality of memory cells in response to a request from a host. The control component may be configured to select a subset of memory cells, among all memory cells in a selected page of the semiconductor memory device, and to determine an optimal read voltage based on the select subset of memory cells.Type: ApplicationFiled: December 6, 2019Publication date: April 9, 2020Applicant: SK hynix Inc.Inventor: Ji Man HONG
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Publication number: 20200111534Abstract: Methods of operating a memory might include sensing a state of each data line of a plurality of data lines while increasing a voltage level applied to each access line of a plurality of access lines commonly connected to a plurality of strings of series-connected memory cells, determining a particular voltage level at which the state of each data line of a first subset of the plurality of data lines has changed, decreasing a voltage level applied to a particular access line of the plurality of access lines, and sensing a state of each data line of a second subset of the plurality of data lines while applying the particular voltage level to the particular access line.Type: ApplicationFiled: October 5, 2018Publication date: April 9, 2020Applicant: MICRON TECHNOLOGY, INC.Inventors: Tommaso Vali, Ramin Ghodsi
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Publication number: 20200111535Abstract: A memory device and an operating method of the memory device is disclosed. The memory device includes a memory cell array including a plurality of memory blocks. The memory device further includes a peripheral circuit for performing an erase voltage application operation, a first erase verify operation, and a second erase verify operation on a selected memory block among the plurality of memory blocks. The memory device also includes a control logic for setting a start erase voltage of an erase operation, based on a result of the first erase verify operation, and controlling the peripheral circuit to perform the second erase verify operation when it is determined that the first erase verify operation on the selected memory block has been passed.Type: ApplicationFiled: May 21, 2019Publication date: April 9, 2020Applicant: SK hynix Inc.Inventors: Yong HAN, Jun Hyuk LEE