Abstract: Provided are an application interface implementation method and apparatus in a host platform layer, a device, and a storage medium, which relate to the field of computer technologies. The implementation scheme includes: the host platform layer acquiring description data of a terminal capability interface; parsing the description data to acquire a communication mode of the terminal capability interface; and configuring a corresponding processor according to the communication mode, configuring a corresponding concept mapping relationship according to the communication mode, or configure a corresponding processor and a corresponding concept mapping relationship according to the communication mode to encapsulate a platform layer interface of the terminal capability interface, where the platform layer interface is configured to process data of communication interactions in a process in which a mini program calls the terminal capability interface through the host platform layer.

Abstract: An example system may be configured to instantiate a first application container based on a plurality of application image layers; and instantiate a second application container based, at least in part, on the plurality of application image layers; wherein a private page cache stores storage information for the plurality of application image layers and is used to provide shared access to the plurality of application image layers by the first application container and the second application container.

Abstract: The described technology relates to a publish-subscribe message framework in which an application, decomposed to a plurality of processing stages, is run by executing respective processing stages of the application asynchronously and simultaneously with each other. Communications between the respective processing stages may exclusively be in accordance with the publish-subscribe execution model. The described publish-sub scribe framework provides for processing stages to be executed in a multi-process and/or multi-threaded manner while also enabling the distribution of the processing stages to respective processing resources in a multi-processor/multi-core processing environment. An example electronic exchange application and a corresponding example exchange gateway application are described.

Abstract: Methods and systems for analyzing data are disclosed. An example method can comprise receiving a first data signal, decoding the first data signal, determining a second data signal based on the decoded first data signal, and determining a modulation error ratio based on a difference between the first data signal and the second data signal.

Abstract: Systems and apparatuses for identifying root causes of events within an computing environment described herein. A causality network may be generated based on detected events in the computing environment. The causality network may be nodes for the events and directed edges showing the casual relations between the nodes. Conditional probability tables (CPTs) for the nodes may show the strength of the causal relations. When an event occurs, computing device may identify the node for the event in the causal network and traverse the causal network until a root cause node is identified. The computing device may output the root cause node and the path of traversal.

Abstract: Embodiments of the present disclosure provide systems, methods, and computer-readable storage media that leverage artificial intelligence and machine learning to identify, diagnose, and mitigate occurrences of network faults or incidents within a network. Historical network incidents may be used to generate a model that may be used to evaluate real-time occurring network incidents, such as to identify a cause of the network incident. Clustering algorithms may be used to identify portions of the model that share similarities with a network incident and then actions taken to resolve similar network incidents in the past may be identified and proposed as candidate actions that may be executed to resolve the cause of the network incident. Execution of the candidate actions may be performed under control of a user or automatically based on execution criteria and the configuration of the fault mitigation system.

Abstract: The present invention relates to an integrity index detecting method for a device by means of multiple control output signals which, after establishing an integrity index reference table based on an integrity reference value set based on information collected from a normal device and a defect reference value set based on information collected from a device before a malfunction occurs, outputs an integrity index value indicating an integrity of the device in real time by applying time information collected from the device in real time to the integrity index reference table to provide the integrity index value to a manager.

Abstract: A computer-implemented method may include: receiving first data that may include information associated with an error in an execution of code; based on the first data, determining: for each contributor in a predetermined list of contributors: a respective familiarity value indicative of an amount of association between the contributor and the error in the code; and a respective set of task management statistics; and an urgency value of the error; using an optimization model, selecting at least one contributor from the predetermined list of contributors to assign to the error, the optimization model based on the respective familiarity values and the respective sets of task management statistics for each contributor, and the urgency value of the error; and transmitting a notification indicative of the error to a computing device associated with the at least one contributor assigned to the error.

Abstract: Anomaly detection and self-healing for robotic process automation (RPA) via artificial intelligence (AI)/machine learning (ML) is disclosed. RPA robots that utilize AI/ML models and computer vision (CV) may interpret and/or interact with most encountered graphical elements via normal learned interactions. However, such RPA robots may occasionally encounter new, unhandled anomalies where graphical elements cannot be identified and/or normal interactions will not work. Such anomalies may be processed by an anomaly handler. The RPA robots may have self-healing functionality that seeks to automatically find information that addresses anomalies.

Abstract: In a kiosk or informational display, an apparatus for detecting and remediating problems, failures, and anomalies includes a data collection agent configured to collect original data over time associated with components, operation, and configuration of the managed computer system, a monitoring and learning module configured to process the original data and generate a historic record that includes time-based data, such as one or more time-based lists, an alert detection system that includes a sensor having associated therewith one of the time-based lists. The sensor is activated when sensor condition(s) are met, which includes evaluating the sensor condition(s) using at least the time-based list and a current-time value of the components, operation, and configuration of the managed computer system. The apparatus includes a remediation action module configured to effect at least one of a plurality of predetermined actions when the sensor is activated.

Abstract: A memory device, such as a MRAM device, includes a plurality of memory macros, where each includes an array of memory cells and a first ECC circuit configured to detect data errors in the respective memory macro. A second ECC circuit that is remote from the plurality of memory macros is communicatively coupled to each of the plurality of memory macros. The second ECC circuit is configured to receive the detected data errors from the first ECC circuits of the plurality of memory macros and correct the data errors.

Abstract: The present disclosure relates to a method for mitigating an error of a quantum circuit in a quantum computer, the method including: detecting a quantum circuit to be mitigated among a plurality of quantum circuits forming the quantum computer; invoking a pre-trained deep learning model for mitigating an error of the plurality of quantum circuits; inferring an error correction value of the detected quantum circuit using the invoked deep learning model; and mitigating an error of the detected quantum circuit based on the inferred error correction value.

Abstract: Aspects of a storage device including a memory and a controller are provided which allow for error detection or data integrity checking during the data transfer of write operations. The memory may include a write enable input. The controller may be configured to generate data integrity information based on at least one data byte to be written to the memory, and to transfer the at least one data byte and the data integrity information to the memory, with the data integrity information being transferred to a write enable input. A data integrity circuit may be configured to receive the at least one data byte and the data integrity information from the controller, and detect whether an error exists in the at least one data byte based on the data integrity information. Accordingly, error detection or data integrity checking of the storage device may be improved.

Abstract: Methods, systems, and devices for performing an error correction operation using a direct-input column redundancy scheme are described. A device that has read data from data planes may replace data from one of the planes with redundancy data from a data plane storing redundancy data. The device may then provide the redundancy data to an error correction circuit coupled with the data plane that stored the redundancy data. The error correction circuit may operate on the redundancy data and transfer the result of the operation to select components in a connected error correction circuit. The components to which the output is transferred may be selected based on data plane replaced by the redundancy data. The device may generate syndrome bits for the read data by performing additional operations on the outputs of the error correction circuit.

Abstract: Systems, apparatus and methods are provided for providing an error correction code (ECC) architecture with flexible memory mapping. An apparatus may include an error correction code (ECC) engine, a multi-channel interface for one or more non-volatile storage devices, a memory including a plurality of memory units, a storage containing a plurality of mapping entries to indicate allocation status of the plurality of memory units and a memory mapping manager. The plurality of memory units may be coupled to the ECC engine and the multi-channel interface. The memory mapping manager may be configured to control allocation of the plurality of memory units and set allocation status in the plurality of mapping entries.

Abstract: Systems, apparatus and methods are provided for providing an error correction code (ECC) architecture with flexible memory mapping. An apparatus may include an error correction code (ECC) engine, a multi-channel interface for one or more non-volatile storage devices, a memory including a plurality of memory units, a storage containing a plurality of mapping entries to indicate allocation status of the plurality of memory units and a memory mapping manager. The plurality of memory units may be coupled to the ECC engine and the multi-channel interface. The memory mapping manager may be configured to control allocation of the plurality of memory units and set allocation status in the plurality of mapping entries.

Abstract: A field programmable gate array (FPGA) for improving the reliability of a key configuration bitstream by reusing a buffer memory includes a configuration buffer, a configuration memory and a control circuit. The configuration memory includes N configuration blocks. The FPGA stores a key configuration chain by using the configuration buffer and ensures correct content of the key configuration chain through an error correcting code (ECC) check function of the configuration buffer, so that when the FPGA runs normally, a control circuit reads the key configuration chain in the configuration buffer at an interval of a predetermined time and writes the key configuration chain into a corresponding configuration block to update the key configuration chain, thereby ensuring accuracy of the content of the key configuration chain and improving running reliability of the FPGA.

Abstract: A processor in a storage network operates by: receiving an access request for a data segment, wherein the data segment is encoded utilizing an error correcting information dispersal algorithm as a set of encoded data slices that are stored in a plurality of storage units of the storage network and wherein each encoded data slice of the set of encoded data slices includes a corresponding checksum of a plurality of checksums; retrieving, from the storage network, a subset of encoded data slices that includes a threshold number of encoded data slices of the set of encoded data slices; determining, based on ones of the plurality of checksums corresponding to the subset of encoded data slices, when the subset of encoded data slices includes at least one corrupted encoded data slice; retrieving from at least one of the plurality of storage units an addition number of encoded data slices required to generate a reconstructed data segment based on the subset of encoded data slices; generating the reconstructed data se

Abstract: Embodiments of the present disclosure relate to a memory system and an operating method thereof. The memory system may include a first processor and a second processor. The first processor is configured to manage or process a main read count table including a plurality of first read count table entries each corresponding to one of a plurality of super memory blocks. The second processor is configured to manage or process, when an error occurs during an operation of reading data stored in one of the plurality of super memory blocks, a partial read count table including a read count table entry including information on a count of the read operation executed during a recovery operation for the error, and transmit an update message to the first processor for updating the main read count table based on the partial read count table.

Abstract: Systems and techniques for transparent dynamic reassembly of computing resource compositions are described herein. An indication may be obtained of an error state of a component of a computing system. An offload command may be transmitted to component management software of the computing system. An indication may be received that workloads to be executed using the component have been suspended. An administrative mode command may be transmitted to the component. The administrative mode command may place the component in partial shutdown to prevent the component from receiving non-administrative workloads. Data of the component may be synchronized with a backup component. Workloads from the component may be transferred to the backup component. An offload release command may be transmitted to the software of the computing system.

Abstract: A power control system for a server is disclosed. The power control system includes a power supply device, configured to provide a main power source and a standby power source; at least a hot swap controller, coupled to the power supply device; at least a peripheral unit, coupled to the power supply device via the hot swap controller; and a motherboard, coupled to the power supply device via the hot swap controller, and includes a logic unit, configured to disable or enable the hot swap controller; and a baseboard management controller, coupled to the logic unit, configured to transmit an AC power cycle signal to the logic unit to disable the hot swap controller, and to transmit a reboot signal to the logic unit to enable the hot swap controller.

Abstract: Methods, apparatus, and processor-readable storage media for monitoring and processing storage resource data using smart tagging techniques are provided herein. An example computer-implemented method includes obtaining data pertaining to multiple storage resources in at least one storage system; generating one or more smart tags related to one or more storage parameters; applying at least one of the one or more smart tags to at least a portion of the data; monitoring at least the portion of the data with the one or more smart tags; generating, based at least in part on the monitoring, at least one alert pertaining to at least one of the multiple storage resources; and performing one or more automated actions based at least in part on the at least one alert.

Abstract: A shared-nothing database system is provided in which parallelism and workload balancing are increased by assigning the rows of each table to “slices”, and storing multiple copies (“duplicas”) of each slice across the persistent storage of multiple nodes of the shared-nothing database system. When the data for a table is distributed among the nodes of a shared-nothing system in this manner, requests to read data from a particular row of the table may be handled by any node that stores a duplica of the slice to which the row is assigned. For each slice, a single duplica of the slice is designated as the “primary duplica”. All DML operations (e.g. inserts, deletes, updates, etc.) that target a particular row of the table are performed by the node that has the primary duplica of the slice to which the particular row is assigned. The changes made by the DML operations are then propagated from the primary duplica to the other duplicas (“secondary duplicas”) of the same slice.

Abstract: Restoring a clustered database having a plurality of nodes each having database from a failed storage device by receiving a request to restore a backup image of a failed shared storage device associated with the clustered database to a time; performing a preflight check including at least one checklist process; terminating the restore when any checklist process fails; when each checklist process succeeds completing the restore by creating at least one flashcopy associated with the backup image, mapping to each of the plurality of nodes an associated portion of the at least one flashcopy, mounting the at least one flashcopy to the node as a diskgroup, and switching the clustered database to run from the diskgroup.

Abstract: A drive recorder includes: a recording control unit that records vehicle information in a first recording medium; a a deterioration detection unit that detects deterioration of the first recording medium; a backup processing unit that performs a backup process of transferring at least a portion of the vehicle information recorded in the first recording medium to a second recording medium in response to detection of deterioration of the first recording medium; a suspension determination unit that determines whether it is possible to suspend recording the vehicle information in the first recording medium, based on the vehicle information; and an initialization processing unit that initializes the first recording medium when it is determined that the backup process is completed and it is possible to suspend recording the vehicle information.

Abstract: A method, computer program product, and computing system for identifying a replication link failure between a first volume of a first storage array and a second volume of a second storage array, wherein a first storage protocol identifier is associated with each of the first volume and the second volume. One of the first volume and the second volume may be defined as inaccessible and the other of the first volume and the second volume as accessible, thus defining an inaccessible volume and an accessible volume. The first storage protocol identifier associated with the inaccessible volume may be replaced with a second storage protocol identifier. Access to the inaccessible volume may be provided via the second storage protocol identifier.

Abstract: Replication of a filesystem or a mount point or share may replicate all data that it consists of irrespective of where the data is stored. Replication protects data irrespective of location. One method is to replicate the filesystem namespace as is while skipping the data outside of the appliance/machine so that replication cost and time are reasonable. The data outside of the machine, like cloud/tape data is protected differently. One example method includes a data protection operation configured to replication a namespace associated with multiple data tiers. During replication, data from one of the tiers is skipped while all of the namespace metadata is replicated. The recovery restores the namespace metadata and the data that was replicated from the other tier. This may be performed in connection with cyber security, for example when replicating multi-tier data to a vault.

Abstract: Methods, systems, and devices for wireless communications are described. The described techniques provide for a first device to perform data validation with one or more other devices. For example, a device may generate data at components associated with the device. To validate at least a portion of the data, the device may establish a connection with other devices. In some examples, the device may determine a portion of the data to validate based on a capability of the other devices to generate data that corresponds to the portion of data. The device may exchange data with the other devices and determine a validity of data generated at the device in response.

Abstract: Online restore operations for a database engine can be performed. A request to restore a database to a previous state can be received. Previously stored content of the database, such as snapshot stored prior to the previous state, can be identified along with log records describing changes to be made to the content prior to the previous state. State information in a query engine can be updated based on the previously stored content and log records so that queries can be processed based on the state information at the database restore to the previous state.

Abstract: Concepts and technologies are disclosed herein for providing a network virtualization policy management system. An event relating to a service can be detected. A first policy that defines allocation of hardware resources to host the virtual network functions can be obtained, as can a second policy that defines deployment of the virtual network functions to the hardware resources. The hardware resources can be allocated based upon the first policy and the virtual network functions can be deployed to the hardware resources based upon the second policy.

Abstract: An Information Handling System (IHS) includes multiple hardware devices, and a baseboard Management Controller (BMC) in communication with the plurality of hardware devices. The BMC includes executable instructions for identifying at least one non-registered hardware device from among the multiple hardware devices that is not registered for use within the IHS by the BMC. For this non-registered hardware device, the BMC generates power profile data. Using the power profile data of the non-registered hardware device, the BMC determines a level of electrical power to sufficiently supply the plurality of hardware devices of the IHS, and controls one or more power supply units to supply the determined level of electrical power to the plurality of hardware devices.

Abstract: Technologies including computer implemented methods and systems are described herein for providing instantiation of virtual machines from backups. Systems and methods disclosed herein do not require restoring the complete contents of a virtual machine from a backup prior to using the virtual machine. Systems and methods presented herein allow creating and running a virtual machine directly from a virtual machine backup. Virtual machines created and maintained by the virtual machine instantiation system may be, in turn, used for backup consistency testing, disaster recovery testing, or granular item-level restore.

Abstract: A merged infrastructure for manufacturing and lifecycle management of both hardware and software is disclosed. In various embodiments, a library comprising a superset of device drivers is stored, the superset including for each of a plurality of supported systems a corresponding set of device drivers for devices comprising that supported system. A context in which a processor is deployed is determined, the context being associated with a specific corresponding one of the plurality of supported systems. The library is used to provision based on the determined context at least a subset of devices accessible by the processor in the context in which the processor is deployed.

Abstract: In various examples, one or more components or regions of a processing unit—such as a processing core, and/or component thereof—may be tested for faults during deployment in the field. To perform testing while in deployment, the state of a component subject to test may be retrieved and/or stored during the test to maintain state integrity, the component may be clamped to communicatively isolate the component from other components of the processing unit, a test vector may be applied to the component, and the output of the component may be compared against an expected output to determine if any faults are present. The state of the component may be restored after testing, and the clamp removed, thereby returning the component to its operating state without a perceivable detriment to operation of the processing unit in deployment.

Abstract: A data processing node includes a management environment, an application environment, and a shared memory segment (SMS). The management environment includes at least one management services daemon (MSD) running on one or more dedicated management processors thereof. One or more application protocols are executed by the at least one MSD on at least one of the dedicated management processors. The management environment has a management interface daemon (MID) running on one or more application central processing unit (CPU) processors thereof. The SMS is accessible by the at least one MSD and the MID for enabling communication of information of the one or more application protocols to be provided between the at least one MSD and the MID. The MID provides at least one of management service to processes running within the application environment and local resource access to one or more processes running on another data processing node.

Abstract: A method for generating an output for performance impact assessment of a change includes determining changes associated with a first managed computer system where corresponding change records includes a respective change time-stamp, determining performance values for a performance metric for predetermined times and associating respective performance time-stamps, selecting one of the changes wherein the selected change has a change time-stamp, identifying first performance values with performance time-stamps that are prior in time to change time-stamp and associating them with a before-change category, identifying second performance values with performance time-stamps that are later in time relative to the change time-stamp and associating them with an after-change category, and generating an output with the first and second performance values (in a tabular or common timeline format) with the first performance values being distinguishable from the second performance values to thereby allow the user to determin

Abstract: Techniques are described providing improved ways to benchmark and validate virtual desktop deployments where targeted workloads are delivered to virtual desktops based on parameters such as the desktop type and origin, and where workload operations can be triggered from the client device. Client instructions for performing workload operations can be encoded into a digital image such as a Quick Response (QR) code on the virtual desktop and inserted into the virtual desktop graphical user interface (GUI). The client decodes the digital image in the received GUI to obtain the instructions and actuate the operations. Completion of operations can be tracked to benchmark desktop performance.

Abstract: This disclosure relates generally to system modeling, and more particularly to systems and methods for modeling computer resource metrics. In one embodiment, a processor-implemented computer resource metric modeling method is disclosed. The method may include detecting one or more statistical trends in aggregated interaction data for one or more interaction types, and mapping each interaction type to one or more devices facilitating the transactions. The method may further include generating one or more linear regression models of a relationship between device utilization and interaction volume, and calculating one or more diagnostic statistics for the one or more linear regression models. A subset of the linear regression models may be filtered out based on the one or more diagnostic statistics. One or more forecasts may be generated using the remaining linear regression models, using which a report may be generated and provided.

Abstract: Embodiments of the invention are directed to techniques for detecting anomalous values in data streams using forecasting models. In some embodiments, a computer can receive a value of a data stream comprising a plurality of data values, where the received value corresponds to a time interval and previously received values each correspond to a previous time interval. Models can be selected based on the time interval, where each of the models has a different periodicity. For each of the selected models, the computer may generate a score by generating a prediction value based on the model and generating the score based on the prediction value and the received value. A final score can then be generated based on the scores. Next, a score threshold can be generated. If the final score exceeds the score threshold, the computer may generate a notification that indicates that the data value is an anomaly.

Abstract: Memory, used by a computer to store data, is generally prone to faults, including permanent faults (i.e. relating to a lifetime of the memory hardware), and also transient faults (i.e. relating to some external cause) which are otherwise known as soft errors. Since soft errors can change the state of the data in the memory and thus cause errors in applications reading and processing the data, there is a desire to characterize the degree of vulnerability of the memory to soft errors. In particular, once the vulnerability for a particular memory to soft errors has been characterized, cost/reliability trade-offs can be determined, or soft error detection mechanisms (e.g. parity) may be selectively employed for the memory. In some cases, memory faults can be diagnosed by redundant execution and a diagnostic coverage may be determined.

Abstract: Methods, apparatus, systems, and articles of manufacture are disclosed to determine refined context for bug detection. At least one non-transitory machine-readable medium includes instructions that, when executed, cause at least one processor to at least classify a node on a graph, the graph to represent a computer program, the node to contain partial bug context corresponding to the computer program; identify a location of a software bug in the computer program, the location based on the node; determine a static bug context of the software bug using the location of the software bug; determine a dynamic bug context of the software bug using the location of the software bug; and determine a refined bug context based on a merge of the static bug context and the dynamic bug context.

Abstract: According to one embodiment, a semiconductor device includes a first system including a first operation circuit, and a second system configured to control a debug operation in the first system. The semiconductor device includes a normal mode and a debug mode. In the debug mode of the semiconductor device, in a case where a first key received from an outside corresponds to a second key stored in the second system, the second system transmits a debug command to the first operation circuit.

Abstract: Disclosed herein is a system and method for bug fix recovery in an electronic device connected to a network. If a bug affecting a deployed electronic device is discovered, bug fix instructions for fixing, mitigating, or recovering from the bug, including rules and executable actions, can be stored in a cloud based server in communication with a deployed electronic device. Each set of instructions is associated with one or more identifiers of devices, firmware versions, and/or software versions that are affected by the bug. The server can be configured to query deployed electronic devices, and/or the deployed electronic devices can be configured to query the server to determine if a bug fix that is relevant to the electronic device has been stored on the server. Instructions can then be transmitted to the electronic device for execution or for display or announcement to a user (if user action is required).

Abstract: Disclosed herein are systems and methods for a system for distributing user requests. The system may comprise a memory storing instructions and at least one processor configured to execute instructions to perform operations.

Abstract: A test environment apparatus having processing circuitry is provided for testing an embedded system-under-test. The processing circuitry may be configured to implement the system-under-test for interaction with external test participants via messaging and control operation of an inner agent and an outer agent. The inner agent may be implemented within a virtual machine that is also implementing the system-under-test and the outer agent may be implemented external to the virtual machine implementing the system-under-test. The inner agent and the outer agent may be controlled to operate collaboratively to trigger captures of snapshots that store current states of the system-under-test at respective times and trigger a rollback of the system-under-test based on a timestamp of a delayed message using a snapshot for a selected time that provides a state of the system-under-test prior to the timestamp to permit subsequent delivery of the delayed message with the system-under-test in a rollback state.

Abstract: Aspects of the disclosure relate to conducting software testing using dynamically masked data. In some embodiments, a computing platform may receive, from a developer computing platform, a test execution request that includes a test code for execution. Subsequently, the computing platform may establish a secure connection to an enterprise data storage database. Upon establishing the secure connection, the computing platform may request confidential data from the enterprise data storage database in connection the test execution request. Thereafter, the computing platform mat execute the test code, which may include receiving encrypted confidential data from the enterprise data storage, decrypting the confidential data, and plugging the confidential data into the test code.

Abstract: Disclosed are various embodiments for self-service integration and feature testing. In one embodiment, a test mode service receives a request to test an integration of a third-party system with a production system. The test mode service enables at least one plugin to test at least one function of the production system. The test mode service executes at least one function using the plugin(s) and data provided by the integration of the third-party system. The test mode service then reports a result of how the production system performs the function(s) associated with the plugin(s) using test data.

Abstract: Methods, apparatus, systems, and articles of manufacture to generate a surrogate model based on traces from a computing unit are disclosed. An example apparatus includes an interface; instructions; and processor circuitry to execute the instructions to generate sequences of events for a platform; train an artificial intelligence (AI)-based model using the sequences of events; generate a surrogate model based on the trained AI-based model; and perform unit testing using the surrogate model.

Abstract: Systems and methods for implementing polymorphic allocators in an operating system are disclosed. An illustrative method includes a method of allocating memory space in a memory by creating a first allocator. In response to receiving a first request to allocate memory space in the memory for a data buffer instance using the first allocator, the method allocates one or more pages of a first region in the memory by populating one or more entries of an allocator table. The one or more entries of the allocator table correspond to the one or more pages of the first region. The entries of the allocator table are indexed by page indexes corresponding to page addresses identifying the pages of the first region in the memory. Each of the populated entries of the allocator table includes a specific allocator identifier identifying a corresponding allocator to that entry.

Abstract: A digital signal processing device includes: a delay means that delays audio data in units of sampling periods; and a control means that writes audio data to a first buffer memory one word at a time in sequence at a sampling period, performs control to burst transfer burst length audio data to a DRAM from the first buffer memory, performs control to burst transfer the burst length audio data to a second buffer memory from the DRAM, and outputs audio data to the delay means from the second buffer memory one word at a time in sequence at the sampling period, in which a delay time of audio data output by the delay means is determined by a combination of a delay time of multiple sampling period units depending on a burst length of the DRAM and a delay time of a sampling period unit of the delay means.