Abstract: Audio objects are associated with positional metadata. A received downmix signal comprises downmix channels that are linear combinations of one or more audio objects and are associated with respective positional locators. In a first aspect, the downmix signal, the positional metadata and frequency-dependent object gains are received. An audio object is reconstructed by applying the object gain to an upmix of the downmix signal in accordance with coefficients based on the positional metadata and the positional locators. In a second aspect, audio objects have been encoded together with at least one bed channel positioned at a positional locator of a corresponding downmix channel. The decoding system receives the downmix signal and the positional metadata of the audio objects. A bed channel is reconstructed by suppressing the content representing audio objects from the corresponding downmix channel on the basis of the positional locator of the corresponding downmix channel.

Abstract: An audio signal encoding method is provided comprising: receiving first and second audio signal frames; processing a second portion of the first audio signal frame and a first portion of the second audio signal frame using an orthogonal transformation to determine in part a first intermediate encoding result; and processing the first intermediate encoding result using an orthogonal transformation to determine a set of spectral coefficients that corresponds to at least a portion of the first audio signal frame.

Abstract: An audio communication endpoint receives a bitstream containing spectral components representing spectral content of an audio signal, wherein the spectral components relate to a first range extending up to a first break frequency, above which any spectral components are unassigned. The endpoint adapts the received bitstream in accordance with a second range extending up to a second break frequency by removing spectral components or adding neutral-valued spectral components relating to a range between the first and second break frequencies. The endpoint then attenuates spectral content in a neighbourhood of the least of the first and second break frequencies for thereby achieving a gradual spectral decay. After this, reconstructing the audio signal is reconstructed by an inverse transform operating on spectral components relating to said second range in the adapted and attenuated received bitstream. At small computational expense, the endpoint may to adapt to different sample rates in received bitstreams.

Abstract: The processing of audio signals during playback is provided, so that audio signals that fall below a specified threshold loudness level are processed to avoid making unwanted background noise audible. N-channel audio is received from a playback volume controller/leveler (101). The level of the audio is compared with a threshold level. If the level is greater than the threshold level, the audio is processed with a first amount of gain in accordance with a first dynamic range control (DRC) compression curve that is tuned for professionally produced audio. If the level is less than or equal to the threshold level, the audio is processed with a second amount of gain in accordance with a second DRC compression curve that is designed to avoid boosting unwanted background noise. After applying the gain to the audio, the audio is sent to a downstream device.

Abstract: A method includes detecting whether there is a very short pitch lag in a speech or audio signal that is shorter than a conventional minimum pitch limitation using a combination of time domain and frequency domain pitch detection techniques. The pitch detection techniques include using pitch correlations in a time domain and detecting a lack of low frequency energy in the speech or audio signal in a frequency domain. The detected very short pitch lag is coded using a pitch range from a predetermined minimum very short pitch limitation that is smaller than the conventional minimum pitch limitation.

Abstract: Provided is a signal processing apparatus that includes a voice quality conversion unit that converts acoustic data of any sound of an input sound source to acoustic data of voice quality of a target sound source different from the input sound source on the basis of a voice quality converter parameter obtained by training using acoustic data for each of one or more sound sources as training data, the acoustic data being different from parallel data or clean data.

Abstract: An audio processing method applied to a first terminal is described, and includes: in response to receiving of audio data input by a user at the first terminal, and determination that a voice change function is turned on, determining change parameters; and based on the change parameters, performing change processing on the audio data.

Abstract: To sufficiently suppress noise and reverberation, a convolutional beamformer for calculating, at each time point, a weighted sum of a current signal and a past signal sequence having a predetermined delay and a length of 0 or more such that it increases a probability expressing a speech-likeness of an estimation signals based on a predetermined probability model is acquired where the estimation signals are acquired by applying the convolutional beamformer to frequency-divided observation signals corresponding respectively to a plurality of frequency bands of observation signals acquired by picking up acoustic signals emitted from a sound source, whereupon target signals are acquired by applying the acquired convolutional beamformer to the frequency-divided observation signals.

Abstract: Methods, apparatus, systems and articles of manufacture are disclosed to reduce noise from harmonic noise sources. An example apparatus includes at least one memory; at least one processor to execute the computer readable instructions to at least: determine a first amplitude value of a frequency component in a frequency spectrum of an audio sample; determine a set of points in the frequency spectrum having at least one of (a) amplitude values within an amplitude threshold of the first amplitude value, (b) frequency values within a frequency threshold of the first amplitude value, or (c) phase values within a phase threshold of the first amplitude value; increment a counter when a distance between (1) a second amplitude value in the set of points and (2) the first amplitude value satisfies a distance threshold; and when the counter satisfies a counter threshold, generate a contour trace based on the set of points.

Abstract: Disclosed are methods, systems, device, and other implementations, including a method that includes receiving an audio signal representation, detecting in the received audio signal representation, using a first learning model, one or more silent intervals with reduced foreground sound levels, determining based on the detected one or more silent intervals an estimated full noise profile corresponding to the audio signal representation, and generating with a second learning model, based on the received audio signal representation and on the determined estimated full noise profile, a resultant audio signal representation with a reduced noise level.

Abstract: Provided is a sound pickup loudspeaker apparatus that has a mechanism for detecting situations in which sound amplification should not be performed and stopping sound amplification from a speaker. The sound pickup loudspeaker apparatus is installed in a vehicle. At least a sound pickup position and a sound amplification position are assumed to be present in the vehicle.

Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for audio-visual speech separation. A method includes: obtaining, for each frame in a stream of frames from a video in which faces of one or more speakers have been detected, a respective per-frame face embedding of the face of each speaker; processing, for each speaker, the per-frame face embeddings of the face of the speaker to generate visual features for the face of the speaker; obtaining a spectrogram of an audio soundtrack for the video; processing the spectrogram to generate an audio embedding for the audio soundtrack; combining the visual features for the one or more speakers and the audio embedding for the audio soundtrack to generate an audio-visual embedding for the video; determining a respective spectrogram mask for each of the one or more speakers; and determining a respective isolated speech spectrogram for each speaker.

Abstract: An embedded sensor can include an audio detector, a digital signal processor, a library, and a rules engine. The digital signal processor can be configured to receive signals from the audio detector and to identify the environment in which the embedded sensor is located. The library can store statistical models associated with specific environments, and the digital signal processor can be configured identify specific events based on detected sounds within the particular environment by utilizing the statistical model associated with the particular environment. The DSP can associate a probability of accuracy for the identified audible event. A rules engine can be configured to receive the probability and transmit a report of the detected audible event.

Abstract: A voice/non-voice determination device robust with respect to an acoustic signal in a high-noise environment is provided. The voice/non-voice determination device includes an acoustic scene classification unit including a first model which receives input of an acoustic signal and outputs acoustic scene information which is information regarding a scene where the acoustic signal is collected, a speech enhancement unit including a second model which receives input of the acoustic signal and outputs speech enhancement information which is information regarding the acoustic signal after enhancement, and a voice/non-voice determination unit including a third model which receives input of the acoustic signal, the acoustic scene information and the speech enhancement information and outputs a voice/non-voice label which is information regarding a label of either a speech section or a non-speech section.

Abstract: A heat-assisted magnetic recording (HAMR) head has a slider with a gas-bearing-surface (GBS). The slider supports a near-field transducer (NFT) with an output tip at the GBS and a main magnetic pole that has a recess in the NFT-facing surface that contains plasmonic material. The plasmonic recess has a front edge at the GBS that has a cross-track width equal to or less than the cross-track width of the widest portion of the NFT output tip, and a back edge recessed from the GBS. A thermal shunt is located between the NFT and the main pole to allow heat to be transferred away from the optical spot generated by the NFT output tip, and is in contact with a region of the plasmonic recess near the back edge.

Abstract: A method and apparatus for generating a time-lapse video are disclosed. In one embodiment, the method comprises: storing each instruction that is executed by a vector graphics application to create artwork on a display of a computer system during one or more editing sessions as part of an undo history; and generating a time-lapse video using the undo history.

Abstract: A graphical user interface for setting speed and direction of video playback may include a timeline representation of video duration. Playback speed and playback direction from a selected point of the video may be determined based on user interaction with the graphical user interface. A portion of the video to which the selected playback speed and selected playback direction is applied may be determined based on user movement of the timeline representation.

Abstract: A method includes: obtaining video data; receiving a target object; processing the video data to obtain one or more first images of the video data that contain an image of the target object and one or more second images of the video data that do not contain the image of the target object; discarding the one or more second images from the video data; generating a background image based on the one or more second images; synthesizing the one or more first images of the video data with the background image to generate one or more synthesized images; obtaining a target image sequence with the one or more synthesized images based on a time order of the one or more first images in the video data; and displaying each of the one or more synthesized images in the target image sequence in a fade-in and fade-out manner.

Abstract: In one aspect, an example method includes: (i) a computing system obtaining media content; (ii) the computing system extracting from the obtained media content, audio content; (iii) the computing system using at least the extracted audio content to obtain sentiment data associated with the audio content; (iv) the computing system using the obtained sentiment data as a basis to modify a video content component of the media content, thereby generating a modified version of the media content; and (v) the computing system outputting for presentation the generated modified media content.

Abstract: Methods, systems, and computer program products for generating revised videos. The method includes, for example, receiving, by one or more processor, first video data of an environment having at least one projection on a screen from a first point of view, and generating, by the one or more processor, revised video data of the environment having the at least one projection on the screen from the first point of view based on the first video data, the revised video data comprising a plurality of frames with the at least one projection on the screen disposed in the first area relative to the environment in a plurality of frames being revised based on data for projecting the at least one projection on the screen in the first video data.

Abstract: An information handling system storage bay accepts 2.5 inch and 3.5 inch storage drives held in a storage drive carrier sized to hold 3.5 inch storage drives and having an adapter that couples to the storage drive carrier to adapt it to hold 2.5 inch drives. The storage drive carrier is manufactured as a contiguous piece from a mold with hard plastic to integrate the adapter so that the adapter breaks free to couple to the storage drive carrier when a small size drive is to be held. Snaps in the contiguous piece couple with the adapter after the adapter is broken free to store the adapter when a larger sized drive is held by the storage drive carrier.

Abstract: A method for writing data to a magnetic data storage medium includes detecting whether the duration, before occurrence of a data transition, of data to be written exceeds a predetermined threshold, and, when the duration, before the occurrence of the data transition, of the data to be written exceeds the predetermined threshold, writing the data by applying an initial pulse and then maintaining a steady-state write current for a defined interval, and when the duration, before the occurrence of the data transition, of the data to be written is at most equal to the predetermined threshold, writing the data by applying the initial pulse without applying a steady-state write current before the data transition. The predetermined threshold may be determined by size of a magnetic bubble formed when writing a single bit to the magnetic data storage medium. A subsequent pulse may be applied following the defined interval.

Abstract: The present disclosure is generally related to a magnetic recording device comprising a magnetic recording head having a first current flow in a cross-track direction through a trailing shield. In one or more embodiments, a second current flows in a cross-track direction around the main pole. The magnetic recording device comprises a main pole disposed between a trailing shield, a leading shield, and side shields. A trailing gap is disposed between the side shields and the trailing shield. A high moment seed layer is disposed between the main pole and the trailing shield. A first insulation layer is disposed within the trailing shield and directs the first current through the trailing shield, guided to the proximity of the main pole. A second insulation layer, disposed below the trailing shield, directs the second current through the trailing shield, or alternatively through the side shields and around the main pole.

Abstract: A plurality of gap patterns are formed on a front surface of a substrate along a direction corresponding to a width direction of a magnetic tape. The first straight line region has a steeper inclined angle with respect to the first imaginary straight line than the second straight line region. Positions of both ends of the first straight line region and positions of both ends of the second straight line region are aligned in a direction corresponding to a width direction of a magnetic tape. Positions of the plurality of gap patterns are aligned in a longitudinal direction of the magnetic tape. A pulse signal is supplied to each of the plurality of gap patterns with a delay of a predetermined time from one side to the other side in a direction in which the plurality of gap patterns are arranged.

Abstract: The present disclosure generally relates to data storage devices, and more specifically, to a magnetic media drive employing a magnetic recording head. The magnetic recording head comprises a main pole and a trailing shield disposed adjacent to the main pole. A recessed edge of the trailing shield has throat heights varying in the cross-track direction. In one embodiment, the central portion of the trailing shield has a first throat height greater than a second throat height of outer portions of the trailing shield. The trailing shield having varying throat heights in the cross-track direction strengthens the writing capability or improves the XTI of the magnetic recording head.

Abstract: Structures including a magnetic-tunnel-junction layer stack and methods of forming such structures. The structure comprises a magnetic-tunneling-junction layer stack including a reference layer, an antiferromagnetic layer, a free layer positioned between the reference layer and the antiferromagnetic layer, and a tunnel barrier layer positioned between the reference layer and the free layer. The antiferromagnetic layer has a static magnetic field with a magnetization, and the antiferromagnetic layer is antiferromagnetically coupled to the free layer.

Abstract: The present disclosure generally relates to a tape drive including a tape head. The tape head comprises two modules, where each module comprises 64 writers, 64 readers, and three pairs of servo readers aligned with the 64 readers in a first row. The three pairs of servo readers comprise a first pair disposed at a first end of the first row, a second pair disposed between two groups of 32 readers, and a third pair disposed at a second end of the first row. The writers are disposed in a second row parallel to the first row, and are each aligned with an adjacent reader. The spacing between each reader and each writer is about 150 ?m to about 200 ?m. Each module is configured to write data to a tape using the 64 writers and to read verify the newly written data using the 64 readers.

Abstract: A near field transducer (NFT) having improved reliability is disclosed. In some embodiments, a NFT includes a resonator body layer having a front side at a first plane that is recessed a first distance from an air bearing surface (ABS), and a peg layer that is a single layer made of a noble metal or alloy thereof. The peg layer includes a peg portion or peg with a front side at the ABS, a back side at the first plane, and two sides aligned orthogonal to the ABS and separated by the first cross-track width. The peg portion or the peg having a single peg grain with or without a desired (111) orientation through laser self-annealing process.

Abstract: Provided are: a magnetic recording medium including a non-magnetic support and a magnetic layer containing a ferromagnetic powder, in which the ferromagnetic powder is an ?-iron oxide powder, a vertical switching field distribution SFD of the magnetic recording medium is 0.20 or more and 3.00 or less at a measurement temperature of 25° C., and an inclination of SFD obtained from SFD at a measurement temperature of 10° C., SFD at a measurement temperature of 25° C., and SFD at a measurement temperature of 40° C. is 0.003° C.?1 or more and 0.080° C.?1 or less; a magnetic tape cartridge including the magnetic recording medium which is a magnetic tape; and a magnetic recording and reproducing device including the magnetic recording medium.

Abstract: A magnetic tape in which a vertical switching field distribution SFD of the magnetic tape is 1.5 or less, and in an environment with a temperature of 32° C. and a relative humidity of 80%, a frictional force F45° on the surface of the magnetic layer with respect to an LTO8 head measured at a head tilt angle of 45° is 4 gf to 15 gf, and a standard deviation of a frictional force F on the surface of the magnetic layer with respect to the LTO8 head measured at each of head tilt angles of 0°, 15°, 30°, and 45° is 10 gf or less.

Abstract: A magnetic tape in which an edge weave amount of a tape edge on at least one side of the magnetic tape is 1.5 ?m or less, and in an environment with a temperature of 32° C. and a relative humidity of 80%, a frictional force F45° on the surface of the magnetic layer with respect to an LTO8 head measured at a head tilt angle of 45° is 4 gf to 15 gf, and a standard deviation of a frictional force F on the surface of the magnetic layer with respect to the LTO8 head measured at each of head tilt angles of 0°, 15°, 30°, and 45° is 10 gf or less.

Abstract: A holographic data storage system comprises an emitter system, a holographic recording medium, and an input waveguide network formed of one or more multimode optical waveguides. The holographic recording medium has multiple recording regions, each optically coupled to a corresponding one of multiple out-coupling regions of the input waveguide network, the holographic data storage system arranged to persistently write data of an input beam, received at any one of the out-coupling regions, to the corresponding recording region. A controller is coupled to at least one of the emitter system and at least one controllable guiding element of the input waveguide network and controls at least one optical characteristic of the input beam or the at least one guiding element, so as to guide the input beam from an in-coupling region to any selected one of the multiple out-coupling regions. Similar waveguide networks are provided for carrying reference and output beams.

Abstract: In a memory array with a cross-point structure, at each cross-point junction a programmable resistive memory element, such as an MRAM memory cell, is connected in series with a threshold switching selector, such as an ovonic threshold switch. The threshold switching selector switches to a conducting state when a voltage above a threshold voltage is applied. When powered down for extended periods, the threshold voltage can drift upward. If the drift is excessive, this can make the memory cell difficult to access and can disturb stored data values when accessed. Techniques are presented to determine whether excessive voltage threshold drift may have occurred, including a read based test and a time based test. Techniques are also presented for initializing a cross-point array, for both first fire and cold start, by using voltage levels shifted from half-select voltage levels used in a standard memory access.

Abstract: Disclosed is a memory device including a magnetic memory element. The memory device includes a memory cell array including a first region and a second region, the second region configured to store a value of a write voltage, the write voltage based on a value of a reference resistor for determining whether a programmed memory cell is in a parallel state or anti-parallel state, a voltage generator configured to generate a code value based on the value of the write voltage, and a write driver configured to drive a write current based on the code value, the write current being a current for storing data in the first region.

Abstract: A flat field transistor (FFT) based dynamic random-access memory (DRAM) (FFT-DRAM) is disclosed. The FFT-DRAM comprises an epitaxially grown source region comprising a source extension and an epitaxial source over and in contact with the source extension. The epitaxially grown source region is over a surface of a semiconductor substrate. The FFT-DRAM further comprises a trench capacitor structurally integrated into the epitaxially grown source region. The trench capacitor has a first terminal formed by the epitaxially grown source region and a second terminal being a conductive material filling one or more trenches of the trench capacitor. The second terminal is connected to a ground terminal or a fixed voltage terminal.

Abstract: To provide a semiconductor device with a novel structure. The semiconductor device includes a plurality of constant current circuits each given a digital signal. The constant current circuits each include a first transistor to a third transistor. The first transistor has a function of making a first current corresponding to set analog potential flow therethrough. The second transistor has a function of controlling the first current flowing between a source and a drain of the first transistor, in response to the digital signal. The third transistor has a function of holding the analog potential supplied to a gate of the first transistor, by being turned off. The first transistor to the third transistor each include a semiconductor layer including an oxide semiconductor in a channel formation region.

Abstract: An electronic device includes an internal mode control circuit suitable for generating a burst control signal, a blocking control signal and an internal voltage control signal based on a refresh cycle when an internal mode is performed in a self-refresh operation, a refresh control circuit suitable for generating a refresh signal for performing a refresh operation every refresh cycle when the self-refresh operation is performed, generating the refresh signal every set cycle based on the burst control signal when the internal mode is performed, and blocking the generation of the refresh signal based on the blocking control signal, and an internal voltage generation circuit suitable for adjusting a level of an internal voltage for the refresh operation based on the internal voltage control signal.

Abstract: A method for refreshing row hammer includes the following operations. A row hammer refresh instruction for a target word line is determined. According to the row hammer refresh instruction, a preset row hammer refresh signal is set to a valid state. The valid state of the preset row hammer refresh signal indicates that the row hammer refresh instruction is performed in a first refresh period. In response to detecting that the row hammer refresh instruction is not completed within the first refresh period, the valid state of the preset row hammer refresh signal will be continued to a next refresh period of the first refresh period.

Abstract: A power management circuit in a low-power double data rate memory is configured to manage a plurality of power supplies memory according to a reference voltage. A low dropout regulator has a first transmitting terminal and a second transmitting terminal. The low dropout regulator adjusts a voltage difference between a first voltage and a second voltage according to the reference voltage. A power network structure is electrically connected to the low dropout regulator. A first power network circuit has a first connecting point, a grid shape and a first unit network space. A second power network circuit has a second connecting point, another grid shape and a second unit network space. The second connecting point is separated from the first connecting point by a distance. The distance is smaller than or equal to one of the first unit network space and the second unit network space.

Abstract: Embodiments of the disclosure are drawn to apparatuses and methods for a multi-bit duty cycle monitor. A clock signal may be provided to a memory in order to synchronize one or more operations of the memory. The clock signal may have a duty cycle which is adjusted by a duty cycle adjustor of the memory. The duty cycle of the adjusted clock signal may be monitored by a multi-bit duty cycle monitor. The multi-bit duty cycle monitor may provide a multi-bit signal which indicates if the duty cycle of the adjusted clock signal is above or below a target duty cycle value (or if the duty cycle is outside tolerances around the target duty cycle). The multi-bit duty cycle monitor may provide the multi-bit signal while access operations of the memory are occurring.

Abstract: An example apparatus includes a processing in memory (PIM) capable device having an array of memory cells and sensing circuitry coupled to the array. The PIM capable includes a row address strobe (RAS) component selectably coupled to the array. The RAS component is configured to select, retrieve a data value from, and input a data value to a specific row in the array. The PIM capable device also includes a RAS manager selectably coupled to the RAS component. The RAS manager is configured to coordinate timing of a sequence of compute sub-operations performed using the RAS component. The apparatus also includes a source external to the PIM capable device. The RAS manager is configured to receive instructions from the source to control timing of performance of a compute operation using the sensing circuitry.

Abstract: A data storage device includes a memory device and a controller coupled to the memory device. The controller is further configured to receive a key value (KV) pair data, determine a size of a value length and a size of a target wordline of the memory device for programming of the KV pair data, determine a size of residual data, store the residual data in a location separate from the target wordline and the KV pair data minus the residual data to the target wordline, and read the residual data from the location separate and the target wordline data in response to a read command for the KV pair data. The size of the value length is greater than the size of the target wordline. The size of the residual data is the size of the value length minus the size of the target wordline.

Abstract: The present disclosure provides a sense amplifier, a memory, and a method for controlling a sense amplifier, relating to the technical field of semiconductor memories. The sense amplifier comprises: an amplification module; and an offset voltage storage unit electrically connected to the amplification module; wherein, in an offset cancellation stage of the sense amplifier, the sense amplifier is configured to comprise a current mirror structure to store an offset voltage of the amplification module in an offset voltage storage unit. The present disclosure can realize the offset cancellation of the sense amplifier.

Abstract: A control amplifying circuit includes a power supply output circuit, an isolation control circuit and an amplifying circuit. The power supply output circuit is configured to receive a power supply switching signal, and select one preset voltage value from at least two preset voltage values according to the power supply switching signal to output as a preset power supply signal. The isolation control circuit is configured to receive a control command signal and the preset power supply signal, and generate an isolation control signal according to the control command signal. The amplifying circuit is configured to receive the isolation control signal and a signal to be processed, and amplify the signal to be processed based on the isolation control signal to obtain a target amplified signal.

Abstract: A memory cell comprises a pair of cross-coupled inverters as a storage element, a first inverter in the pair of cross-coupled inverters having a first output at a first node, a second inverter in the pair of cross-coupled inverters having a second output at a second node. A first complementary transmission gate includes a first nMOS pass gate and a first pMOS pass gate, connected between the first node and a first bit line. A second complementary transmission gate includes a second nMOS pass gate and a second pMOS pass gate, connected between the second node and a second bit line. A first word line is connected to gate conductors of the first and second nMOS pass gates in the first and second complementary transmission gates. A second word line is connected to gate conductors of the first and second pMOS pass gates in the first and second transmission gates.

Abstract: A memory is provided that includes a self-timed memory circuit that controls the isolation of a sense amplifier from a column selected by a column multiplexer until the completion of a bit line voltage difference development delay. The self-timed memory circuit also controls the release of a pre-charge for the sense amplifier responsive to the completion of the bit line voltage difference development delay.

Abstract: A memory apparatus and method of operation are provided. The apparatus includes memory cells each connected to one of a plurality of word lines. The memory cells are disposed in strings and configured to retain a threshold voltage corresponding to one of a plurality of data states. A control means is coupled to the plurality of word lines and the strings and is configured to apply a read voltage to a selected ones of the plurality of word lines during a read operation and ramp down to a discharge voltage at an end of the read operation and apply a ready voltage to the selected ones of the plurality of word lines during a ready period of time following the read operation. The control means is also configured to adjust at least one of the discharge voltage and the ready voltage based on a temperature of the memory apparatus.

Abstract: An in-memory computation (IMC) circuit includes a memory array formed by memory cells arranged in row-by-column matrix. Computational weights for an IMC operation are stored in the memory cells. Each column includes a bit line connected to the memory cells. A biasing circuit is connected between each bit line and a corresponding column output. A column combining circuit combines and integrates analog signals at the column outputs of the biasing circuits. Each biasing circuit operates to apply a fixed reference voltage level to its bit line. Each biasing circuit further includes a switching circuit that is controlled to turn on for a time duration controlled by asps comparison of a coefficient data signal to a ramp signal to generate the analog signal dependent on the computational weight. The ramp signal is generated using a reference current derived from a reference memory cell.

Abstract: A vertical nonvolatile memory device including a memory cell string using a resistance change material is disclosed. Each memory cell string of the nonvolatile memory device includes a semiconductor layer extending in a first direction and having a first surface opposite a second surface, a plurality of gates and a plurality of insulators alternately arranged in the first direction and extending in a second direction perpendicular to the first direction, a gate insulating layer extending in the first direction between the plurality of gates and the semiconductor layer and between the plurality of insulators and the semiconductor layer, and a dielectric film extending in the first direction on the surface of the semiconductor layer and having a plurality of movable oxygen vacancies distributed therein.

Abstract: Ternary content-addressable memory (TCAM) devices are described. The TCAMs described herein are designed to perform write operations—including data writes and mask writes—in a single clock cycle. For example, data input is written in a row of the TCAM during the first portion of a clock cycle, and a mask is written in another row of the TCAM during the second portion of the clock cycle, for example immediately after or after a programmable delay from the data write. In one implementation, a first bus is used both for data write and key search operations, and a second bus is used both for mask write and search masking operations. In another implementation, a first bus is used both for data write and key search operations, a second bus is used for mask write operations, and a third bus is used for search masking operations.