Abstract: A universal language assistive translation and interpretation system that is configured to verify and validate translations and interpretations by way of blockchain technology and smart contracts, multiple cross-format translation and interpretation blockchain validating and recording processes for verifying and validating cross-format translations and interpretations by smart contract and blockchain technology, and several validated cross-format translation and interpretation blockchain access processes for providing cross-format interpretations and translations of inter-communications between users regardless of ability or disability are disclosed.

Abstract: A machine translation system, a ChatOps system, a method for a context-aware language machine identification, and computer program product. One embodiment of the machine translation system may include a density calculator. The density calculator may be adapted to calculate a part of speech (POS) density for a plurality of word tokens in an input text, calculate a knowledge density for the plurality of word tokens, and calculate an information density for the plurality of word tokens using the POS density and the knowledge density. In some embodiments, the machine translation system may further comprise a sememe attacher and a context translator.

Abstract: An arithmetic operation device is provided that removes a part of parameters of a predetermined number of parameters from a first machine learning model which includes the predetermined number of parameters and is trained so as to output second data corresponding to input first data, determines the number of bits of a weight parameter according to required performance related to an inference to generate a second machine learning model, and acquires data output from the second machine learning model so as to correspond to the input first data with a smaller computational complexity than the first machine learning model.

Abstract: A multiplication-accumulation (MAC) includes a multiplication circuit, a pre-processing circuit, and an adder tree. The multiplication circuit performs a multiplication operation on a plurality of weight data and a plurality of vector data each having a floating-point format to output a plurality of multiplication data. The pre-processing circuit performs shifting on mantissa data of the plurality of multiplication data by a difference between first maximum exponent data having a greatest value among the exponent data of the plurality of multiplication data and the remaining exponent data to output a plurality of pre-processed mantissa data. The adder tree adds the plurality of mantissa data to output mantissa addition bits.

Abstract: A semiconductor device includes a dynamic reconfiguration processor that performs data processing for input data sequentially input and outputs the results of data processing sequentially as output data, an accelerator including a parallel arithmetic part that performs arithmetic operation in parallel between the output data from the dynamic reconfiguration processor and each of a plurality of predetermined data, and a data transfer unit that selects the plurality of arithmetic operation results by the accelerator in order and outputs them to the dynamic reconfiguration processor.

Abstract: This device comprises a fast sampler comprising: a truncated table associating with truncated random numbers rmsb coded on Nmsb bits, the only sample k for which, whatever the number rlsb belonging to the interval [0; 2Nr?Nmsb?1], the following condition is met: F(k?1)<(rmsb, rlsb)?F(k), where: (rmsb, rlsb) is the binary number coded on Nr bits and the Nmsb most significant bits of which are equal to the truncated random number rmsb and the (Nr?Nmsb) least significant bits of which are equal to the number rlsb, Nmsb is an integer number lower than Nr, a module for searching for a received truncated random number rmsb in the truncated table, and able to transmit the sample k, associated, by the truncated table, with the received truncated random number rmsb, by way of random number drawn according to the probability distribution ?.

Abstract: A method for generating a random number comprises selecting a group of at least two servers within a network; receiving a server specific string from at least two servers of the group; and using the server specific strings to generate the random number.

Abstract: A system and method of generating a series of random number; from a source of random numbers in a computing system. Steps includes: loading a data loop (a looped array of stored values with an index) with random data from a source of random data; then repeating the following: reading a value from the data loop in relation to the index; operating on the multi-bit value thereby outputting a derived random number; and moving the index in relation to the looped array. The data loop may be a simple feedback loop which may be a shift register loaded by direct memory access (DMA). The operation may be performed by one or more arithmetic logic units (ALU) which may be fed by one or more data feeds and may perform XOR, Mask Generator, Data MUX, and/or MOD.

Abstract: Disclosed is a structure for implementing a Physically Unclonable Function (PUF)-based random number generator and a method for forming the structure. The structure includes same-type, same-design devices in a semiconductor layer. While values of a performance parameter exhibited by some devices (i.e., first devices) are within a range established based on the design, values of the same performance parameter exhibited by other devices (i.e., second devices) is outside that range. A random distribution of the first and second devices is achieved by including randomly patterned dopant implant regions in the semiconductor layer. Each first device is separated from the dopant implant regions such that its performance parameter value is within the range and each second device has a junction with dopant implant region(s) such that its performance parameter value is outside the range or vice versa. A random number generator can be operably connected to the devices to generate a PUF-based random number.

Abstract: The present disclosure provides computing apparatuses, methods and software for generating random numbers. Data is received from an instrument characterising macromolecules in a sample, the data including measurement event information relating to measurements of individual macromolecules recorded over time. For each measurement event in a sequence of measurement events in the data, an event timing representative of the duration of event or the time passing between consecutive events is determined. This is compared with a comparator value to generate a binary output, and a bit value is determined based on the binary output. Data representative of a random number is generated by assembling a vector of bit values determined from the event timings in sequence. The determined sequence of event timings for the sequence of measurement events represents a source of entropy extracted by the comparison step to generate the random number.

Abstract: According to some embodiments, methods and systems may be associated with a cloud computing environment having an integration service (e.g., associated with a Software-as-a-Service or a Platform-as-a-Service). A design microservice may have a User Interface (“UI”) framework and UI components for a first integration developer. A configuration framework may determine a set of configuration values for an integration component of an integration scenario defined by the first integration developer. The configuration framework may then receive, from the first integration developer, a publication indication associated with the integration component. Responsive to the publication indication, the configuration framework may arrange for the set of configuration values for the integration component to be made available to a second integration developer (e.g., via a marketplace platform).

Abstract: Systems, methods, and computer-readable storage media for a framework for a heterogenous set of software services to operate in a uniform manner. A system can store data types representing computational abstractions, where the computer has at least one processor and a plurality of heterogenous data storage engines. The system can build, using the plurality of data types, the computational abstractions, the computational abstractions comprising: operations, environment, an event bus, and a workflow management system. The system can then store and execute these computational abstractions as needed.

Abstract: Various methods and systems for providing a user interface (UI) generation system for processing UI generation data based on a multi-layer architecture and hierarchically interrelated and supervised scene processes are provided. The UI generation system supports generating UIs based on a scene layer, a viewport layer, and a driver layer that each use protocols and data structures to support UI generation, UI fault recovery operations, and distributed UI generation for UI viewing devices. In operation, scene configuration data is communicated to a viewport engine from a scene engine, the viewport engine uses the scene configuration data to construct a scene management data structure that is defined based on hierarchically arranging and supervising different scene processes. The scene management data structure is used to define scene rendering data that is accessed by a driver engine to cause generation of UI display content, locally or remotely based on the scene rendering data.

Abstract: Disclosed are an electronic terminal apparatus and an operating method thereof. The present invention relates to an electronic terminal apparatus equipped with a UI development tool, which is able to provide an automatic UI component creation function through an image analysis of a UI design plan, and an operating method thereof.

Abstract: A method and system for a command processor for efficient processing of a program multi-processor core system with a CPU and GPU. The multi-core system includes a general purpose CPU executing commands in a CPU programming language and a graphic processing unit (GPU) executing commands in a GPU programming language. A command processor is coupled to the CPU and CPU. The command processor sequences jobs from a program for processing by the CPU or the GPU. The command processor creates commands from the jobs in a state free command format. The command processor generates a sequence of commands for execution by either the CPU or the GPU in the command format. A compiler running a meta language converts program data for the commands into a first format readable by the CPU programming language and a second format readable by the GPU programming language.

Abstract: Systems, computer program products, and methods are described herein for retrieval and generation of graphical user interface depicting of graphics associated with rules-based data management. The present invention is configured to electronically receive a request from a user for a chart of process data, wherein the chart of the process data represents the corresponding process data most recently saved in a storage device, electronically receive the process data from a rule data management system and export the chart of the process data. Each of the modules and dependency data are received as inputs, and thereafter the chart displays each of the modules and corresponding module generic descriptions, rule data and corresponding rule generic descriptions, and an execution order.

Abstract: A job decomposition processing method for distributed computing, which comprises: analyzing a source program to be run by program static analysis to determine a function call graph contained in the source program; determining feature information of functions contained in the source program by program dynamics analysis or/and a program intelligent decomposition algorithm, wherein the feature information of the functions is used to characterize relevant information when each function is being running; decomposing the source program based on the feature information of the functions, a function relationship and available resource information of a computing platform to form an execution recommendation for each function on the computing platform, i.e., which hardware resources are used for computing each function; finally inserting a modifier in the source program and starting computation on the computing platform.

Abstract: A method creates a table of keys and values. Each key is an element of an input array which is an input of a machine-learning pre-processing pipeline, and each value is an output of the pipeline. The method measures (1) a hit rate H to the memo table, (2) an average time Ttable to look up the table, (3) an average time Tpipeline to execute the pipeline, and (4) a threshold Telements on a number of elements of the input array. The method looks up the value in the table by using an element of the input array as a key when Tpipeline×H>Ttable and the number of elements in the input array is less than Telements. The method calls the pipeline in place of the lookup for all of the remaining elements in the input array when the value is not in the table.

Abstract: Devices, systems, and methods for providing software to aircraft using a distributed ledger are disclosed. A software delivery system includes aircraft having an engine control system configured to verify and install software utilized by components of the aircraft, an electronic distribution system coupled to the aircraft, an edge manager coupled to the electronic distribution system, and computing devices acting as nodes in a distributed ledger base maintaining a distributed ledger. The electronic distribution system verifies a request for software, requests software, and initiates an installation protocol with the engine control system. The edge manager maintains software. The distributed ledger base is coupled to the aircraft, the electronic distribution system, and the edge manager.

Abstract: Systems, devices, and methods are disclosed to send a signal to deploy a software patch at a compute device, to identify, based on a dependency map, a set of system components on the compute device that are likely to be impacted by the software patch, to monitor a set of parameters for a set of applications on the compute device that interact with a set of system components, to compare values for the set of parameters to one or more predefined criteria and to determine a compatibility classification for the software patch. Systems, devices, and methods are disclosed to update the dependency map based on the compatibility classification to define an updated dependency map, and based on the updated dependency map send a signal to deploy the software patch at a set of compute devices.

Abstract: In a vehicle electronic control system, a center device includes an update data storage unit that stores update data for rewrite targets. Program rewriting to rewrite target electronic control units is one campaign. The center device includes a display control information storage unit that stores display control information necessary to display information related to the campaign on a vehicle side. The center device transmits the update data stored in the update data storage unit and the display control information stored in the display control information storage unit to a vehicle master device.

Abstract: In a vehicle electronic control system, a vehicle master device is configured to acquire data storage bank information including information for specifying which bank is an active bank and information for specifying software versions of an active bank and an inactive bank from a rewrite target ECU that has a non-volatile memory with a plurality of data storage banks and to transmit the data storage bank information acquired by the data storage bank information acquisition unit to a center device. The center device is configured to select update data compliant to the inactive bank on the basis of the software versions and the active bank specified by the data storage bank information received from the vehicle master device and to transmit a distribution package including the update data selected by the update data selection unit to the vehicle master device.

Abstract: An embodiment of the present invention is directed to a system and method for implementing a self-driven change detection release automation. According to an embodiment of the present invention, a software release bot may be created and installed on software running environment. The bot may further detect changes on a server environment. For example, the bot may be integrated with scheduling and other tools where the bot is programmed to wake up at predetermined time intervals, e.g., 15 minutes. According to an embodiment of the present invention, the bot may handle release activities defined in the configuration, e.g., stop, start, send notification, etc. The bot is able to save release events log for change audit.

Abstract: An upgrading method, includes: a server first sends a version check command to a terminal device; then receives feedback data sent by the terminal device based on the version check command; and sends an upgrade command to the terminal device in response to the terminal device being to be upgraded, wherein whether the terminal device is to be upgraded is determined based on the feedback data.

Abstract: Systems and methods for deploying software updates in hybrid workspace environments are described. In some embodiments, an Information Handling System (IHS) may include a processor and a memory coupled to the processor, the memory having program instructions stored thereon that, upon execution, cause the IHS to: consolidate an Operating System (OS) and Basic Input/Output System (BIOS) inventory with a plurality of workspace inventories; resolve dependencies among a plurality of updates based upon the consolidated inventories to identify an order of deployment; and deploy the plurality of updates in the order of deployment.

Abstract: A device for managing update of a vehicle includes a communication device in communication with at least one control device of the vehicle and in communication with an OTA (Over The Air) server for software update of the at least one control device, and a controller that relays communication between the at least one control device and the OTA server, and controls the at least one control device.

Abstract: A software deployment method in a server includes: obtaining a software update for deployment to a plurality of media processing devices; performing a primary deployment phase by: (i) transmitting the software update to selected media processing devices according to a primary deployment rate; (ii) responsive to the transmission, for each selected media processing device, updating a status indicator representing whether deployment of the software update succeeded; and (iii) determining, based on the status indicators, whether an update promotion condition has been satisfied; in response to determining that the update promotion condition has been satisfied, performing a secondary deployment phase by: transmitting the software update to further selected media processing devices according to a secondary deployment rate exceeding the primary deployment rate.

Abstract: Various systems and methods for enabling derivation and distribution of an attestation manifest for a software update image are described. In an example, these systems and methods include orchestration functions and communications, providing functionality and components for a software update process which also provides verification and attestation among multiple devices and operators.

Abstract: Systems and methods for generating dynamically updated metadata using real-time artificial intelligence models. For example, the system may receive a first metadata tag requirement for first metadata of a first media asset. The system may determine a first metadata field for the first metadata based on the first metadata tag requirement. The system may determine a first content population function for the first metadata field. The system may generate the first metadata with the first content population function. The system may generate the first media asset with the first metadata.

Abstract: The disclosure provides for analyzing upgrade and migration readiness. Embodiments include receiving an indication to upgrade a software product and a selected upgrade path identifying a target-upgrade version. Embodiments include accessing an array of pre-upgrade procedures comprising code for identifying one or more conditions that must be met before the software product can be upgraded based on the accessed array being associated with the software product. Embodiments include executing one or more of the pre-upgrade procedures in advance of upgrading the software product. Embodiments include accessing one or more autonomous remediation scripts from the repository based on identification of one or more failed pre-upgrade procedures. Embodiments include executing the one or more autonomous remediation scripts to cure the one or more failed pre-upgrade procedures and initiating an upgrade of the software product based on identifying that the array of pre-upgrade procedures successfully completed execution.

Abstract: Certain aspects of the present disclosure provide techniques for configuring a software application through a remote configuration service. An example method generally includes receiving, from a remote configuration service, a declarative construct. Generally, the declarative construct includes a definition of a workflow in an application to be executed within a player application deployed on a client device. Information associated with the definition of the workflow is extracted by parsing the declarative construct according to a schema defining a format of the declarative construct. The workflow is executed in the player application based on the extracted information defining functionality of the workflow.

Abstract: An extensible platform-as-a-service (PaaS) system is used during the software development lifecycle (SDLC) processes of an application. The system, according to various embodiments, receives indications that changes are made to one or more templates or software bundles stored in a software library and coordinates how changes to a particular template will be applied to applications for an enterprise system. Specifically, the system may identify applications that are using the template and determine an ordering for a plurality of application groups that indicates a sequence in which the updates will be applied to the applications. In this manner, template updates can be automatically and systematically deployed to applications without significant involvement by users of the PaaS system.

Abstract: Discussed are DevOps systems, methods, and apparatuses that provide a solution for organizing, reporting, and facilitating the automation of deploying infrastructure, platform, and application code for an IT enterprise. A logical data model for organizing components of the DevOps approach may include inventories for systems, environments, applications, resources, and deployments. A set of components may be built to provide an organizational structure to collect, report, and facilitate the automation of applications and the deployments of those applications across the enterprise. An artifact inventory may be used to request a deployment of specific versions of artifacts to an environment, providing a complete picture of what the environment should contain after a deployment. This inventory may be linked to business-level system inventory tracking as well as low-level computing resource tracking to provide a complete picture of total cost of ownership.

Abstract: A time period required for analyzing a source code is reduced without reducing analysis accuracy in a source code analysis apparatus that analyzes a source code with a dynamic analysis method. An analysis processing unit extracts, from a post-change source code, an influence function to which an input is given by a change function. An analysis necessity determination processing unit determines whether or not the function is the analysis target function, based on a range of an input value input to the change function and a function included in the influence function. The analysis processing unit performs an analysis of the analysis target function, which is included in the change function and the influence function. An analysis result processing unit outputs an analysis result of the post-change source code, which includes an analysis result of the analysis target function.

Abstract: Aspects of the invention include systems and methods configured to efficiently evaluate the efforts of a code migration (e.g., porting task) between different platforms. A non-limiting example computer-implemented method includes receiving a function of a source platform. The function can include a plurality of fields. An initial vector is constructed for each of the plurality of fields. The initial vector encodes a value of the respective field according to an encoding rule. The initial vectors are merged into a single final vector and the final vector is classified into one of a plurality of system function families of the source platform. A vector of a target platform at a minimum distance to the final vector is identified and an assessment is provided that includes a difficulty in porting a project comprising the function between the source platform and the target platform based at least in part on the minimum distance.

Abstract: Systems, methods, and apparatuses relating to circuitry to implement out-of-order access to a shared microcode sequencer by a clustered decode pipeline are described.

Abstract: Systems, methods, and apparatuses relating to a sign modification field for fused operations in a configurable spatial accelerator are described.

Abstract: This application discloses a mechanism to securely store and compute with a matrix of numbers or any two-dimensional array of binary values in a storage entity called a matrix space. A matrix space is designed to store matrices or arrays of values into arrays of volatile or non-volatile memory cells with accessibility in two or three dimensions. Any row or column or line of storage elements in the storage entity is directly accessible for writing, reading, or clearing via row bit lines and column bit lines, respectively. The elements in rows of the arrays are selected or controlled for access using row address lines and the elements in columns of the arrays are selected or controlled for access using column address lines. Access control methods and mechanisms with keys to secure, share, lock, and unlock regions in the matrix space for matrices and arrays under the control of an operating system or a virtual-machine hypervisor by permitted threads and processes are also disclosed.

Abstract: Techniques are provided to implement hardware accelerated application of preconditioners to solve linear equations. For example, a system includes a processor, and a resistive processing unit coupled to the processor. The resistive processing unit includes an array of cells which include respective resistive devices, wherein at least a portion of the resistive devices are tunable to encode entries of a preconditioning matrix which is storable in the array of cells. When the preconditioning matrix is stored in the array of cells, the processor is configured to apply the preconditioning matrix to a plurality of residual vectors by executing a process which includes performing analog matrix-vector multiplication operations on the preconditioning matrix and respective ones of the plurality of residual vectors to generate a plurality of output vectors used in one or more subsequent operations.

Abstract: The present disclosure discloses a method for vector reading-writing, a vector-register system, a device and a medium. When a vector-writing instruction is obtained, by using a vector-register controller, a to-be-written-vector address space is converted into a to-be-written-vector-register-file bit address, and, for a nonstandard vector, by using a nonstandard-vector converting unit, after the nonstandard vector is converted into a to-be-written nonstandard vector, and, subsequently, writing is performed, to realize the saving of vector data of any format. When a vector-reading instruction is obtained, by using the vector-register controller, according to the to-be-read width and the to-be-read length, after the to-be-read-vector address space is converted into a to-be-read-vector-register-file bit address, and, subsequently, reading is performed, to realize the reading of vector data of any format.

Abstract: A technique for block data transfer is disclosed that reduces data transfer and memory access overheads and significantly reduces multiprocessor activity and energy consumption. Threads executing on a multiprocessor needing data stored in global memory can request and store the needed data in on-chip shared memory, which can be accessed by the threads multiple times. The data can be loaded from global memory and stored in shared memory using an instruction which directs the data into the shared memory without storing the data in registers and/or cache memory of the multiprocessor during the data transfer.

Abstract: Various examples are directed to systems and methods for executing a loop in a reconfigurable compute fabric. A first flow controller may initiate a first thread at a first synchronous flow to execute a first portion of a first iteration of the loop. A second flow controller may receive a first asynchronous message instructing the second flow controller to initiate a first thread at a second synchronous flow to execute a second portion of the first iteration. The second flow controller may determine that the first iteration of the loop is the last iteration of the loop to be executed and initiate the first thread at the second synchronous flow with a last iteration flag set.

Abstract: The present disclosure describes a digital signal processing (DSP) block that includes a plurality of columns of weight registers and a plurality of inputs configured to receive a first plurality of values and a second plurality of values. The first plurality of values is stored in the plurality of columns of weight registers after being received. Additionally, the DSP block includes a plurality of multipliers configured to simultaneously multiply each value of the first plurality of values by each value of the second plurality of values.

Abstract: There is provided a data processing apparatus comprising a plurality of registers, each of the registers having data bits to store data and metadata bits to store metadata. Each of the registers is adapted to operate in a metadata mode in which the metadata bits and the data bits are valid, and a data mode in which the data bits are valid and the metadata bits are invalid. Mode bit storage circuitry indicates whether each of the registers is in the data mode or the metadata mode. Execution circuitry is responsive to a memory operation that is a store operation on one or more given registers.

Abstract: Software instructions are executed on a processor within a computer system to configure a steaming engine with stream parameters to define a multidimensional array. The stream parameters define a size for each dimension of the multidimensional array and a pad value indicator. Data is fetched from a memory coupled to the streaming engine responsive to the stream parameters. A stream of vectors is formed for the multidimensional array responsive to the stream parameters from the data fetched from memory. A padded stream vector is formed that includes a specified pad value without accessing the pad value from system memory.

Abstract: Aspects of the present disclosure relate to an apparatus comprising processing circuitry, prefetch circuitry and prefetch metadata storage comprising a plurality of entries. Metadata items, each associated with a given stream of instructions, are stored in the prefetch metadata storage. Responsive to a given entry of the plurality of entries being associated with the given stream associated with a given metadata item, the given entry is updated. Responsive to no entry of the plurality of entries being associated with the given stream associated with a given metadata item, an entry is selected according to a default replacement policy, the given stream is allocated thereto, and the selected entry is updated based on the given metadata item. Responsive to a switch condition being met, the default selection policy is switched to an alternative selection policy comprising locking one or more entries by preventing allocation of streams to the locked entries.

Abstract: A data processing apparatus is provided. Rename circuitry performs a register rename stage of a pipeline by storing, in storage circuitry, mappings between registers. Each of the mappings is associated with an elimination field value. Operation elimination circuitry replaces an operation that indicates an action is to be performed on data from a source register and stored in a destination register, with a new mapping in the storage circuitry that references the destination register and has the elimination field value set. Operation circuitry responds to a subsequent operation that accesses the destination register when the elimination field value is set; by obtaining contents of the source register, performing the action on the contents to obtain a result, and returning the result.

Abstract: A computer-implemented method includes assigning a first group of one or more units of an instruction pipeline of a processor as a frontend group and assigning a second group of the one or more units of the instruction pipeline of the processor as a backend group. A frontend logout is performed to transfer one or more trace records from the first group to a trace controller during an in-memory trace of an instruction. A backend logout is performed to transfer one or more trace records from the second group to the trace controller during the in-memory trace of the instruction. A next instruction is started in the first group of the instruction pipeline before the backend logout completes.

Abstract: A computer comprising a plurality of processors, each of which are configured to perform operations on data during a compute phase for the computer and, following a pre-compiled synchronisation barrier, exchange data with at least one other of the processors during an exchange phase for the computer, wherein of the processors in the computer is indexed and the data exchange operations carried out by each processor in the exchange phase depend upon its index value.

Abstract: Systems and methods for virtually partitioning an integrated circuit may include identifying dimensional attributes of a target input dataset and selecting a data partitioning scheme from a plurality of distinct data partitioning schemes for the target input dataset based on the dimensional attributes of the target dataset and architectural attributes of an integrated circuit. The methods described herein may also include disintegrating the target dataset into a plurality of distinct subsets of data based on the selected data partitioning scheme and identifying a virtual processing core partitioning scheme from a plurality of distinct processing core partitioning schemes for an architecture of the integrated circuit based on the disintegration of the target input dataset.