Patents Issued in March 7, 2024
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Publication number: 20240077989Abstract: A computing device displays a user interface that includes a first snapshot that is authored by a user of the computing device and displayed on a messaging application of a collaboration platform. The device displays information regarding metadata of one or more originating dashboards corresponding to the one or more snapshot components of the first snapshot. In response to detecting a first user selection of a notification, displayed in the user interface, indicating that the first snapshot has expired, the device transmits one or more identifiers of the one or more originating dashboards to a computer system and receives, from the computing system, updated data for the one or more snapshot components of the first snapshot. The device generates an updated view of the first snapshot according to the received updated data and displays the updated view of the first snapshot in the user interface.Type: ApplicationFiled: August 30, 2023Publication date: March 7, 2024Inventors: Hyeok KIM, Matthew Michael Brehmer
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Publication number: 20240077990Abstract: Systems and methods for generating feedback for a webpage based on visual interactions on the webpage are provided. In example embodiments, a user interface (UI) displaying the webpage is presented. The system receives an indication of a selection of an edit trigger and configures the webpage to receive feedback (e.g., one or more user inputs applied to webpage) from the user in response. The user inputs are received, whereby each user input is associated with an identifier of the webpage and coordinates of a location within the webpage. The system processes the user inputs including generating a feedback preview that displays each of the user inputs organized based on a corresponding feedback type. The feedback preview is displayed to the user for approval. Approval of at least a portion of the feedback on the feedback preview will cause the approved feedback to be transmitted to a corresponding entity.Type: ApplicationFiled: November 10, 2023Publication date: March 7, 2024Inventor: Neeraj Gupta
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Publication number: 20240077991Abstract: The present disclosure generally relates to outputting light and managing controllable devices. In some examples, an electronic device determines whether to associate a remotely controllable external device with a context based on a set of one or more criteria and in response to receiving a request to associate the remotely controllable external device with the context.Type: ApplicationFiled: August 3, 2023Publication date: March 7, 2024Inventor: Eliza J. VON HAGEN
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Publication number: 20240077992Abstract: Provided are an interaction method and apparatus, an electronic device, a storage medium, and a program product. The method includes displaying a gift panel in response to a gift panel display operation for a target object, where the gift panel is configured for a gifting user to select a recipient user corresponding to the target object, the gifting user includes a target user, and the target object is configured to establish, for the recipient user, a first association relationship between the recipient user and the target user; and sending a target gift request to a server in response to a gift operation acting in the gift panel.Type: ApplicationFiled: September 7, 2023Publication date: March 7, 2024Inventors: Yunfei ZHU, Wenjing LIU, Xiongjiu LI, Boyang JIANG, Fu WEN, Sen LIU
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Publication number: 20240077993Abstract: There is provided an information processing method, apparatus, electronic device, and storage medium for information processing. The information processing method includes: receiving first task information; and displaying second task information in a task interface after a first preset control in the first task information is triggered, where participants of the first task information and the second task information are different, and display regions for the participants are different from display regions for executors or creators of corresponding task information. By enabling a user to follow or participate in the first task information in response to an operation on the first preset control in the first task information, and displaying the second task information including following or participation information in the task interface, corresponding users can be informed about the progress of corresponding tasks in time and can receive notifications of the progress of the corresponding tasks in time.Type: ApplicationFiled: November 10, 2023Publication date: March 7, 2024Inventors: Yuanye WU, Ningsha Huang, Yifei Xue, Jian Sun
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Publication number: 20240077994Abstract: The systems and methods disclosed herein provide media guidance in relation to previously-viewed media assets. A request from a user to access a source by which a media asset is currently being transmitted to a plurality of users is received. In response to accessing the source by which the media asset is currently being transmitted, a viewing history associated with the user is accessed to determine whether the media asset has previously been viewed by the user. Responsive to determining that the media asset has previously been viewed by the user, a first play position, at which the user previously stopped viewing the media asset is identified. A transport bar is generated for display by the systems and methods, including a first time indicator corresponding to the first play position, and a second time indicator corresponding to a portion of the media asset currently being transmitted by the source.Type: ApplicationFiled: September 7, 2023Publication date: March 7, 2024Inventor: Andrew Fundament
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Publication number: 20240077995Abstract: Embodiments of the present invention provide a system for dynamically configuring graphical user interface based on tracking response to interface components. The system is configured for determining that a user has accessed an entity application via a user device, presenting a graphical user interface associated with the entity application to the user on the user device, wherein the graphical user interface comprises one or more interface components, monitoring and capturing response of the user via the user device based on presenting the graphical user interface, gauging the response of the user via an artificial intelligence engine, and dynamically configuring the graphical user interface based on gauging the response of the user.Type: ApplicationFiled: September 1, 2022Publication date: March 7, 2024Applicant: BANK OF AMERICA CORPORATIONInventors: Katherine Kei-Zen Dintenfass, Christine D. Black, Jinna Zevulun Kim, Jo-Ann Taylor, Vijaya L. Vemireddy
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Publication number: 20240077996Abstract: A medical treatment system includes a transparent display located between a patient and a medical staff and configured to display, a plurality of interface, first and second gaze trackers respectively mounted on both sides of the transparent display to detect pupils of the medical staff and patient and configured to acquire positional coordinates of the pupils of the medical staff and patient in a three-dimensional space, a region setting unit configured to set a gaze exchange region based on an intersection point where a virtual connection line between the positional coordinates of the pupils of the medical staff and patient intersects a plane of the transparent display, and a control unit configured to rearrange the plurality of interface windows by moving at least one interface window overlapping the gaze exchange region outside the gaze exchange region.Type: ApplicationFiled: December 30, 2021Publication date: March 7, 2024Applicant: SEOUL NATIONAL UNIVERSITY HOSPITALInventor: Hyoun Joong KONG
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Publication number: 20240077997Abstract: The present invention provides a method and system for the diagnosis and analysis of medical images. More specifically, the system of the present invention focuses on the usage of wearable devices in the field of Pathology and around creating a workflow for the pathologists that helps them analyse, diagnose, and sign off a case using digital technology and wearable devices. The system of the present invention comprises a wearable device, a cloud-based computing platform, data storage, a plurality of interaction modules, and a processing module. The wearable device extends the field of vision by creating a more immersive experience for better diagnosis of the pathological case.Type: ApplicationFiled: August 25, 2023Publication date: March 7, 2024Applicant: PathForce Technologies, Inc.Inventors: Mohit A. Kale, Michael F. Colaco
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Publication number: 20240077998Abstract: According to an aspect, a method includes installing an application on a computing device, determining whether to activate a compatibility mode for the application, in response to activating the compatibility mode, determining a restriction to a change to an application window size or shape of a user interface of the application, and rendering a user interface object defining a plurality of predefined sizing options for the user interface of the application.Type: ApplicationFiled: November 9, 2023Publication date: March 7, 2024Inventors: Sanjay Nathwani, Ben McCanny, Kazuki Takise
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Publication number: 20240077999Abstract: A computing device identifies a plurality of metrics corresponding to one or more data sources. The device receives a first user input to add a first data visualization to a first visualization card in a first scene of the interactive presentation. In response to the first user input, and in accordance with a determination that the graphical user interface includes a prior scene having a second visualization card with a second data visualization, the device computes, for each metric, a respective parameter that measures a variability of values of the respective metric. The device identifies a subset of metrics based on the computed parameters and identifies a first metric to which the second data visualization corresponds. The device determines whether the first subset of metrics includes the first metric and displays a plurality of the generated data visualizations in accordance with the determination.Type: ApplicationFiled: January 27, 2023Publication date: March 7, 2024Inventors: Matthew Michael BREHMER, Arjun SRINIVASAN
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Publication number: 20240078000Abstract: The content management device includes a content playback time adjacency determiner, a common scroll message setting operation acceptor, and a playback controller. The content playback time adjacency determiner determines whether playback times of a first piece of content and a second piece of content are adjacent. The operation acceptor accepts an operation to set a common scroll message that is the same for the first piece of content and the second piece of content when the playback times of the first piece of content and the second piece of content are determined to be adjacent by the adjacency determiner. The playback controller continuously plays back the common scroll message across the playback time of the first piece of content and the playback time of the second piece of content when the common scroll message is set to the first piece of content and the second piece of content.Type: ApplicationFiled: August 15, 2023Publication date: March 7, 2024Applicant: SHARP KABUSHIKI KAISHAInventor: Yohko SEIKE
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Publication number: 20240078001Abstract: A computing device receives user selection of a first data element from a first data dashboard that is displayed on the computing device. The user selection designates the first data element as a first snapshot component of a first snapshot. In response to receiving the user selection, the computing device displays, in a first user interface, a plurality of component properties for the first snapshot component. The computing device receives, via the first user interface, user specification of first values for at least a first subset of component properties of the plurality of component properties. In accordance with receiving the user specification, the computing device updates the first snapshot component according to the first values, generates a first snapshot that includes the first snapshot component, and causes the first snapshot to be displayed as a message on a messaging application executed by an electronic device.Type: ApplicationFiled: August 30, 2023Publication date: March 7, 2024Inventors: Hyeok KIM, Matthew Michael Brehmer
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Publication number: 20240078002Abstract: The present disclosure generally relates to methods for managing charging of an electronic device.Type: ApplicationFiled: September 1, 2023Publication date: March 7, 2024Inventors: Edward CHAO, Patrick L. COFFMAN, Cyril DE LA CROPTE DE CHANTERAC, Kevin M. LYNCH, Conor J. O'REILLY, Michael S. SOETAERT, Kartik R. VENKATRAMAN
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Publication number: 20240078003Abstract: An information processing apparatus sets, to visible, a display attribute of one UI screen among a plurality of UI screens arranged in multiple layers in a web page, and set, to invisible, the display attribute of the other UI screens, and controls to display, on a display unit, a UI screen among the plurality of UI screens that has the display attribute set to visible by the setting unit. In response to an instruction to switch a UI screen displayed on the display unit, the information processing apparatus changes the display attribute of the UI screen among the plurality of UI screens displayed before switching, from visible to invisible, and changes the display attribute of a UI screen displayed after switching, from invisible to visible.Type: ApplicationFiled: August 29, 2023Publication date: March 7, 2024Inventor: KOICHI YAMAMOTO
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Publication number: 20240078004Abstract: The present disclosure pertains to techniques for reducing inaccuracies in context aware policies (CAP) with real-time feedforward validation in extended reality environments. In a particular aspect, a extended reality system is configured to author, by a user using the head-mounted device, a rule or policy or context aware policy (CAP) including one or more target actions and triggering context instances, capture, using one or more sensors, context history records for the user, render, by the head-mounted device, one or more validation scenes based on the rule or policy or CAP and the context history records, validate, by the user using the head-mounted device, the one or more validation scenes within an extended reality environment, and update, by the user using the head-mounted device, the rule or policy or CAP based on the validation.Type: ApplicationFiled: September 7, 2023Publication date: March 7, 2024Applicant: Meta Platforms Technologies, LLCInventors: Xun Qian, Kashyap Todi, Tanya Renee Jonker, Tianyi Wang, Anna Camilla Martinez, Felix Izarra, Ting Zhang, Ruta Parimal Desai, Yan Xu, Frances Cin-Yee Lai, Tianyi Yang
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Publication number: 20240078005Abstract: A building framework is disclosed herein comprising a first structural member, a second structural member, and a third structural member disposed between the first and second structural members, a first web member connecting the first and third structural members in a spaced apart relationship, and a second web member connecting the second and third structural members in a spaced apart relationship. The first web member is positioned relative to the second web member such that the shortest distance between the first web member and second web member is greater than or equal to 5 times the thickness of the third structural member. Additional products, systems, and methods also are disclosed.Type: ApplicationFiled: November 1, 2023Publication date: March 7, 2024Applicant: J. David Wright LLCInventor: John David Wright
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Publication number: 20240078006Abstract: A device with a touch-sensitive display may be unlocked via gestures performed on the touch-sensitive display. The device is unlocked if contact with the display corresponds to a predefined gesture for unlocking the device. The device displays one or more unlock images with respect to which the predefined gesture is to be performed in order to unlock the device. The performance of the predefined gesture with respect to the unlock image may include moving the unlock image to a predefined location and/or moving the unlock image along a predefined path. The device may also display visual cues of the predefined gesture on the touch screen to remind a user of the gesture.Type: ApplicationFiled: April 26, 2023Publication date: March 7, 2024Inventors: Imran CHAUDHRI, Bas ORDING, Freddy Allen ANZURES, Marcel VAN OS, Scott FORSTALL, Greg CHRISTIE
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Publication number: 20240078007Abstract: The present disclosure relates to an information processing apparatus, an information processing method, and a program that enable appropriate recording of information written on a writing object. A region setting unit sets, in a writing image that shows the writing object on which written information is written, a writing region that includes the written information, and a recording control unit controls recording of the writing image in response to a change in the writing region. The present disclosure can be applied to, for example, a board writing recording system.Type: ApplicationFiled: October 2, 2020Publication date: March 7, 2024Inventor: NAOKI NOMURA
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Publication number: 20240078008Abstract: Methods, devices and systems for providing a graphical user interface (GUI) including a representation of a keyboard are disclosed. Some examples may involve controlling a display system to present the GUI, including the representation of the keyboard, in at least a portion of an active force sensor area. Some examples may involve receiving, from a touch sensor system, an indication of a touch in a keyboard location of the GUI and receiving, from a force sensor system, an indication of an applied force. Some examples may involve determining whether the applied force is at or above a first force threshold and controlling keyboard functionality corresponding with the GUI according to whether the applied force is at or above the first force threshold.Type: ApplicationFiled: September 2, 2022Publication date: March 7, 2024Inventors: Raj KUMAR, Deepak Rajendra KARNIK, Seong Jun MA, Jeffrey Osbeli FRANCO
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Publication number: 20240078009Abstract: A data storage device includes a host interface for coupling the data storage device to a host system. The data storage device also includes a device memory and a controller. The controller is configured to determine if a retrim is needed for the data storage device. In accordance with a determination that the retrim is needed, the controller is configured to identify a time to initiate a new trim on the data storage device, and cause the new trim on the data storage device at the time identified.Type: ApplicationFiled: September 1, 2022Publication date: March 7, 2024Applicant: Western Digital Technologies, Inc.Inventors: Eran EREZ, Joseph R. MEZA, Dylan B. FAIRCHILD
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Publication number: 20240078010Abstract: A method for efficient journal truncation is provided. A method for journal truncation includes maintaining a journal in a memory of a computing system including a plurality of records. Each record indicates a transaction in an ordered data structure. The method includes maintaining a truncation queue in the memory including one or more entries. Each entry in the truncation queue includes a physical on-disk offset associated with a different record of the plurality of records. The method includes determining to truncate the journal and truncating records, of the plurality of records, from the journal starting from a beginning record in the journal up to the record with the physical on-disk offset associated a least recent entry of the one or more entries in the truncation queue, where the truncating includes removing the records from the memory.Type: ApplicationFiled: September 1, 2022Publication date: March 7, 2024Inventors: Wenguang WANG, Jiaqi Zuo, Hardik Singh Negi, Eric Knauft, Junlong Gao
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Publication number: 20240078011Abstract: A host system includes an interface for coupling the host system to a data storage device. The host system also includes one or more processors, and memory storing one or more programs for execution by the one or more processors. The one or more programs include instructions for: determining if a retrim is needed for the data storage device; and in accordance with a determination that the retrim is needed: identifying a time to initiate a new trim on the data storage device; and causing the new trim on the data storage device at the time identified.Type: ApplicationFiled: July 12, 2023Publication date: March 7, 2024Applicant: Western Digital Technologies, Inc.Inventors: Eran EREZ, Joseph R. MEZA, Dylan B. FAIRCHILD
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Publication number: 20240078012Abstract: There is provided an apparatus, method and medium. The apparatus comprises a store buffer to store a plurality of store requests, where each of the plurality of store requests identifies a storage address and a data item to be transferred to storage beginning at the storage address, where the data item comprises a predetermined number of bytes. The apparatus is responsive to a memory access instruction indicating a store operation specifying storage of N data items, to determine an address allocation order of N consecutive store requests based on a copy direction hint indicative of whether the memory access instruction is one of a sequence of memory access instructions each identifying one of a sequence of sequentially decreasing addresses, and to allocate the N consecutive store requests to the store buffer in the address allocation order.Type: ApplicationFiled: September 6, 2022Publication date: March 7, 2024Inventors: ABHISHEK RAJA, Yasuo ISHII
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Publication number: 20240078013Abstract: A credit regulation and monitoring module receives a command for an application that is to be executed. In response to the command, credit amount for execution of the command is calculated. Further, an outstanding credit amount is determined based on an outstanding credit table and the other commands being executed. It is determined whether the credit amount and the outstanding credit are below a threshold value. If so, the command is executed and an outstanding credit table is updated to reduce the amount of credit available according to the credit amount allocated to the command.Type: ApplicationFiled: September 14, 2023Publication date: March 7, 2024Applicant: QoS Tech LLCInventor: Timothy L. Canepa
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Publication number: 20240078014Abstract: Handling frequently accessed pages is disclosed. An indication is received of a stalling event caused by a requested portion of memory being inaccessible. It is determined that the requested portion of memory is a frequently updated portion of memory. The stalling event is handled based at least in part on the determination that the requested portion of memory is a frequently updated portion of memory.Type: ApplicationFiled: October 23, 2023Publication date: March 7, 2024Inventors: Isaac R. Nassi, Kleoni Ioannidou, Michael Berman, I-Chun Fang, Mark Hill, Brian Moffet, Jeffrey Paul Radick, David P. Reed, Keith Reynolds
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Publication number: 20240078015Abstract: Disclosed are systems and methods for large write planning for performance consistency and resource usage efficiency. A method is implemented using one or more controllers for one or more storage devices. The method includes receiving, via a host interface, a notification of a write data burst. The method also includes computing available spaces in a plurality of memories and a write ratio, to handle the write data burst to the plurality of memories, based on the notification. The method also includes receiving, via the host interface, the write data burst. The method also includes, in response to receiving the write data burst, toggling writes between the plurality of memories, based on the available spaces and the write ratio.Type: ApplicationFiled: September 1, 2022Publication date: March 7, 2024Applicant: Western Digital Technologies, Inc.Inventors: ERAN EREZ, JOSEPH R. MEZA, NICHOLAS J. THOMAS
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Publication number: 20240078016Abstract: Conventional high performance computer connections are electron-based systems, which require the memory packages to be as close as mechanically possible to the computation engine. Low power and high bandwidth communication, e.g. photonic, links can drastically change the architecture of high-performance computers by eliminating the bottlenecks in communication.Type: ApplicationFiled: December 30, 2022Publication date: March 7, 2024Inventors: David Cureton BAKER, Ari NOVACK, Donovan POPPS, Benjamin Wiley MELTON, Bryan COPE, Mark BAUR, Anahita SHAYESTEH
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Publication number: 20240078017Abstract: A data processing system includes a data processor and a memory controller receiving memory access requests from the data processor and generating at least one memory access cycle to a memory system in response to the receiving. The memory controller includes a command queue and a sparse element processor. The command queue is for receiving and storing the memory access requests including a first memory access request including a small element request. The sparse element processor is for causing the memory controller to issue a second memory access request to the memory system in response to the first memory access request with a density greater than a density indicated by the first memory access request.Type: ApplicationFiled: July 27, 2023Publication date: March 7, 2024Applicant: Advanced Micro Devices, Inc.Inventors: Vignesh Adhinarayanan, Niti Madan, Marjan Fariborz
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Publication number: 20240078018Abstract: Disclosed is a method of operating a storage device which includes a storage controller and a non-volatile memory device. The method includes providing a first request indicating a word line sequential read operation of a target memory block of the non-volatile memory device, providing first word line read data corresponding to memory cells of a first word line of the target memory block based on the first request, providing second word line read data corresponding to memory cells of a second word line of the target memory block based on the first request, the second word line being adjacent to the first word line, calculating a first word line gap value based on the first word line read data and the second word line read data, and performing a first reliability operation of the target memory block based on the first word line gap value.Type: ApplicationFiled: March 28, 2023Publication date: March 7, 2024Inventors: Jinyoung Lee, Woohyun Kang, Youngjoo Seo, Hyunkyo Oh, Heewon Lee, Donghoo Lim, Jin Gu Jeong
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Publication number: 20240078019Abstract: According to one embodiment, a controller creates a virtual controller based on an attached state of the namespace with respect to the storage area of the nonvolatile memory based on reception of a first command requesting connection from a first host. The controller executes processing related to an operation of the namespace requested by a second command related to the operation of the namespace based on an attached state of the namespace in the virtual controller when the second command is received from the first host.Type: ApplicationFiled: March 13, 2023Publication date: March 7, 2024Applicant: Kioxia CorporationInventor: Tatsuya SASAKI
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Publication number: 20240078020Abstract: Methods, systems, and devices for write booster pinning are described. In some examples, a memory device may receive one or more commands (e.g., write commands) while operating in a first mode (e.g., a write booster mode). Some write commands may include an indication to pin the data to one or more SLCs. For example, a first write command may be associated with first data and a first indicator and a second write command may be associated with second data. Both the first data and the second data may be written to one or more SLCs. When maintenance operations are performed on the SLCs, the second data may be moved (e.g., written) to one or more MLCs. Additionally or alternatively, the memory system may receive one or more commands to unpin data (e.g., the first data) such that it may be moved to one or more MLCs during subsequent maintenance operations.Type: ApplicationFiled: September 6, 2022Publication date: March 7, 2024Inventors: Reshmi Basu, Jonathan S. Parry, Yanhua Bi
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Publication number: 20240078021Abstract: Methods, systems, and devices for adaptive temperature protection for a memory controller are described. In some cases, a memory system may include a set of temperature sensors distributed across the memory system. The set of temperature sensors may be used to monitor or model the temperature of one or more sections of the memory system. Upon determining that the temperature of a section exceeds a threshold, the memory system may employ one or more mitigation techniques to reduce the temperature or the rate of change of the temperature of the section. For example, the memory system may reduce a clock frequency corresponding to the section, while maintaining separate clock frequencies for other sections of the memory system. Additionally or alternatively, the memory system may transfer data or other information from the section to a separate section.Type: ApplicationFiled: September 6, 2022Publication date: March 7, 2024Inventors: Federica Cresci, Massimiliano Patriarca
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Publication number: 20240078022Abstract: Methods, systems, and devices for memory system logical unit number (LUN) procedures are described. A memory system may receive an indication to convert a LUN for storing LBAs associated with an application from a first type to a second type, where the second type is associated with a higher performance defragmentation process than the first type. The memory system may perform defragmentation on data associated with the LUN based on converting the LUN to the second type. The memory system may determine whether the LBAs stored in the LUN are ordered based on the defragmentation, and the memory system may operate (e.g., execute) the application based on the LBAs being ordered.Type: ApplicationFiled: September 6, 2022Publication date: March 7, 2024Inventors: Zhou Zhou, Li Xin Zhao, Yanhua Bi
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Publication number: 20240078023Abstract: A storage device and a method thereof determine a candidate memory block satisfying a set condition among a plurality of memory blocks when the temperature of a memory is equal to or higher than a first temperature as a target memory block. The target memory block is used to determine whether to apply a thermal throttling mode to a target operation to be executed on the memory when the temperature of the memory is equal or higher than a second temperature in order to avoid unnecessary thermal throttling.Type: ApplicationFiled: December 27, 2022Publication date: March 7, 2024Inventor: Chi Eun KIM
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Publication number: 20240078024Abstract: Methods, systems, and devices for a light hibernation mode for memory are described. A memory system may include volatile memory and non-volatile memory and may be configured to operate according to a first mode of operation (e.g., associated with relatively high power consumption), a light hibernation mode (e.g., a second mode associated with decreased power consumption in comparison to the first mode), and a full hibernation mode (e.g., a third mode of operation associated with decreased power consumption in comparison to the light hibernation mode). While operating according to the light hibernation mode, the memory system may maintain a greater quantity of data in the volatile memory relative to the full hibernation mode, which may avoid at least some power consumption related to data transfers between the volatile memory and non-volatile memory that may occur in connection with entering and exiting the full hibernation mode.Type: ApplicationFiled: April 28, 2021Publication date: March 7, 2024Inventor: Liang Ge
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Publication number: 20240078025Abstract: A data storage device includes a memory device and a controller. The controller is configured to assert a strobe cycle having a plurality of strobes to the memory device, where a die of the memory device may be associated with one or more strobes of the plurality of strobes. The controller is further configured to determine whether the die of the memory device requires additional power and adjust a strobe length of time of the corresponding strobe when the die of the memory device requires additional power. The controller is further configured to decrease a strobe length of time of one or more strobes that do not require additional power. By utilizing a time division peak power management (TD-PPM) feature by dynamically changing a strobe length of time of each strobe of the plurality of strobes, performance and latency of the data storage device may be improved.Type: ApplicationFiled: September 6, 2022Publication date: March 7, 2024Applicant: Western Digital Technologies, Inc.Inventors: Shay BENISTY, Yossi Yoseph HASSAN
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Publication number: 20240078026Abstract: The present disclosure generally relates to improving adaptive tuning of different clock rates of a memory device. Rather than clock rates only being determined off of one parameter such as workload, the clock rates now will be determined using multiple parameters. The tuning may be based on system parameters to allow the system to withstand challenges that arise during the operation. The clock frequency table is maintained in the device controller. The table holds the clock frequency of each component. The disclosure proposes modifying the table according to different system environment parameters to maintain performance or reduce power consumption. Adaptive tuning allows a more flexible system design that can adapt according to the current system status. Adaptive tuning also reduces peak power consumption, improves performance, and better quality of service (QoS) compatibility characteristics.Type: ApplicationFiled: September 7, 2022Publication date: March 7, 2024Applicant: Western Digital Technologies, Inc.Inventors: Shay BENISTY, Ariel NAVON, Alexander BAZARSKY, David AVRAHAM
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Publication number: 20240078027Abstract: A storage device, including: a nonvolatile memory device including a plurality of memory cells; and a controller configured to perform a write operation on at least one write unit included in the plurality of memory cells, and to perform an erase operation on at least one erase unit included in the plurality of memory cells, wherein the controller is further configured to: allocate a plurality of zones to a storage space of the nonvolatile memory device based on a request received from an external host device, select two or more erase units from among a plurality of erase units included in the plurality of memory cells to be allocated to each of the plurality of zones based on a zone map table, fixedly and sequentially manage logical addresses of data written in the plurality of zones, wherein the nonvolatile memory device includes a plurality of memory chips, wherein each memory chip of the plurality of memory chips includes a plurality of memory blocks, wherein each memory block of the plurality of memory bType: ApplicationFiled: August 28, 2023Publication date: March 7, 2024Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: KUI-YON MUN, JOOYOUNG HWANG, Gyeongmin KIM, KEUNSAN PARK, JOON-WHAN BAE
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Publication number: 20240078028Abstract: Technology is disclosed herein for managing timing parameters when programming memory cells. Timing parameters used sub-clocks in an MLC program mode may also be used for those same sub-clocks in a first SLC program mode. However, in a second SLC program mode a different set of timing parameters may be used for that set of sub-clocks. Using the same set of timing parameters for the MLC program mode and the first SLC program mode saves storage space. However, the timing parameters for the MLC program mode may be slower than desired for SLC programming. A different set of timing parameters may be used for the second SLC program mode to provide for faster program operation. Moreover, the different set of timing parameters used for the faster SLC program mode do not require storage of a separate set of timing parameters.Type: ApplicationFiled: September 1, 2022Publication date: March 7, 2024Applicant: SanDisk Technologies LLCInventors: Chin-Yi Chen, Muhammad Masuduzzaman, Xiang Yang
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Publication number: 20240078029Abstract: Memory calibration with a margin check is disclosed. A memory subsystem includes a memory and a memory controller coupled to the memory. The memory controller includes a calibration circuit configured to perform, during an initialization process, horizontal memory calibrations for ones of a plurality of performance states and to determine and store, in a storage circuit, information indicative of a set of differences between calibration results for pairs of the plurality of performance states. The memory controller is further configured to, subsequent to the initialization process and in response to a change from a first one of the plurality of performance states to a second one of the plurality of performance states set initial memory parameters for the second performance state based on the set of differences. Thereafter, operation begins in the second performance state without performing an initial horizontal calibration.Type: ApplicationFiled: September 1, 2022Publication date: March 7, 2024Inventors: Robert E. Jeter, Jingkui Zheng, Ritesh J. Shah, Veera Chockalingam, Naveen Kumar Korada
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Publication number: 20240078030Abstract: Apparatuses and methods related to port arbitration of a memory system are described. A memory system can receive a first number of transactions and a second transaction from a first traffic stream and a third number of transactions and a fourth transaction from a second traffic stream. The memory system can process the first number of transactions at least partially concurrently with the third number of transactions. Responsive to a total quantity of transactions of the first number of transactions and the second transaction being at least a threshold quantity of transactions, the second transaction can be processed by the memory system and, subsequent to processing the second transaction, the fourth transaction can be processed by the memory system.Type: ApplicationFiled: September 6, 2022Publication date: March 7, 2024Inventors: Patrick A. La Fratta, Shashank Adavally, Jeffrey L. Scott, Robert M. Walker
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Publication number: 20240078031Abstract: Methods, systems, and devices for dividing blocks for special functions are described. Some memory systems may be configured to assign a block of the memory system as a special function block configured with a first portion for storing information associated with a first function of the memory system and a second portion for storing information associated with a second function of the memory system; write a first set of information to the first portion of the block based at least in part on assigning the block as the special function block, the first set of information associated with the first function of the memory system; and write a second set of information to the second portion of the block based at least in part on assigning the block as the special function block, the second set of information associated with the second function of the memory system.Type: ApplicationFiled: September 6, 2022Publication date: March 7, 2024Inventors: Deping He, Xing Wang
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Publication number: 20240078032Abstract: A data storage device includes a memory device and a controller to the memory device. The controller is configured to receive key value (KV) pair data having a key and a value from a host device and generate a mapping in a key-to-physical (K2P) table corresponding to the received KV pair data. The mapping includes a first slot for storing a physical address corresponding to the value and a second slot for storing a physical address corresponding to metadata associated with the KV pair data. When the associated metadata is sent to the data storage device, which may be non-concurrent to transferring the KV pair data, the mapping of the associated metadata is linked to a same key as the mapping of the KV pair data. Thus, using the mapping, the key of the KV pair data is associated with the KV pair data and the associated metadata.Type: ApplicationFiled: September 6, 2022Publication date: March 7, 2024Applicant: Western Digital Technologies, Inc.Inventor: Ramanathan MUTHIAH
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Publication number: 20240078033Abstract: The memory sub-systems of the present disclosure selects, for memory scans, a memory block which has a highest page fill ratio. In one embodiment, the memory sub-system identifies a number of block stripes located on a logical unit (LU) identified by a logical unit number (LUN), where the LU is one of a plurality of LUs of a memory device. The sub-system determines a fill ratio for each of the plurality of block stripes. The sub-system selects, among the block stripes, a block stripe with a highest fill ratio. The sub-system identifies, from the selected block stripe, a memory block of the LU. The sub-system performs a memory scan operation on the memory block of the memory device.Type: ApplicationFiled: November 8, 2023Publication date: March 7, 2024Inventors: Alex J. Wesenberg, Johnny A. Lam, Michael Winterfeld
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Publication number: 20240078034Abstract: A memory system is provided and includes memory chips in each of which a first state output pin is arranged and a memory controller in which a first state input pin connected to a first channel including first ways respectively connected to the first state output pins arranged in the memory chips is arranged. The memory controller checks a first internal state of each of the memory chips, based on one or more of a chip enable signal and a CE reduction command of the memory chips, and a second signal received through the first state input pin as a result of an AND operation of first signals output through the first state output pins, during a state check interval for checking respective states of the memory chips.Type: ApplicationFiled: November 10, 2023Publication date: March 7, 2024Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Seong-hoon WOO, Hak-sun KIM, Kwang-Jin LEE, Su-chang JEON
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Publication number: 20240078035Abstract: An apparatus has processing circuitry with one or more execution units to perform operations in response to instructions. The apparatus also has registers to store data accessed by the processing circuitry and forwarding circuitry to forward results of the operations from the execution units to be written back to the registers and to the execution units for use as operands of further operations. The apparatus also has write-back reschedule circuitry which for each operation causes an execution unit performing the operation to stall the operation prior to a write-back stage of the execution unit and determine, based on monitoring subsequent operations whether to forward the result of the operation to be written back to a register or to forward the result to an execution unit. The write-back reschedule circuitry also controls the forwarding circuitry to forward the result according to the determination.Type: ApplicationFiled: September 1, 2022Publication date: March 7, 2024Inventors: Xiaoyang SHEN, Zichao XIE, Leonardo INTESA
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Publication number: 20240078036Abstract: A memory module can include a hybrid media controller coupled to a volatile memory, a non-volatile memory, a non-volatile memory buffer and a set of memory mapped input/output (MMIO) register. The hybrid media controller can be configured for reading and writing data to a volatile memory of a memory mapped space of a memory module. The hybrid media controller can also be configured for reading and writing bulk data to a non-volatile memory of the memory mapped space. The hybrid media controller can also be configured for reading and writing data of a random-access granularity to the non-volatile memory of the memory mapped space. The hybrid media controller can also be configured for self-indexed moving data between the non-volatile memory and the volatile memory of the memory module.Type: ApplicationFiled: December 24, 2020Publication date: March 7, 2024Inventors: Dimin NIU, Tianchan GUAN, Hongzhong ZHENG, Shuangchen LI
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Publication number: 20240078037Abstract: Methods, systems, and devices for multi-host communications are described. In some examples, a memory system may be coupled with multiple host systems. The memory system may facilitate communications between the multiple host systems For example, a first host system may be coupled with a first buffer of the memory system and a second host system may be coupled with a second buffer of the memory system. The first host system may have read and write access to the first buffer and read access to the second buffer. In response to a write operation being initiated by the first host system, data may be written to the first buffer. The second host system may read the data written to the first buffer. The second host system may take an action or respond based on the data read from the first buffer.Type: ApplicationFiled: September 7, 2022Publication date: March 7, 2024Inventors: Gaurav Sinha, Marco Redaelli, Shivamurthy Shastri
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Publication number: 20240078038Abstract: According to one aspect of the present disclosure, a method of controlling a memory is provided. The method may include performing a read operation based on a read voltage corresponding to a target logical page to obtain a hard read value and a soft read value of the target logical page. The method may include storing the hard read value, the soft read value, and inhibition information into three latches in a page buffer respectively. The method may include obtaining hard data of the target logical page based on the hard read value of the target logical page. The method may include obtaining soft data of the target logical page based on the hard data and the soft read value of the target logical page. The memory may include a plurality of memory cells, each configured to store N-bit data, where N is an integer greater than 1.Type: ApplicationFiled: August 25, 2023Publication date: March 7, 2024Inventor: Jianjie LI