Patents Issued in March 7, 2024
  • Publication number: 20240078139
    Abstract: In some aspects, techniques may include monitoring a primary load of a datacenter and a reserve load of the datacenter. The primary load and reserve load can be monitored by a computing device. The primary load of the datacenter can be configured to be powered by one or more primary generator blocks having a primary capacity, and the reserve load of the datacenter can be configured to be powered by one or more reserve generator blocks having a reserve capacity. Also, the techniques may include detecting that the primary load of the datacenter exceeds the primary capacity. In addition, the techniques may include connecting the reserve generator blocks to at least one of the primary generator blocks and the primary load using a computing device switch.
    Type: Application
    Filed: September 6, 2022
    Publication date: March 7, 2024
    Applicant: Oracle International Corporation
    Inventors: Roy Mehdi Zeighami, Craig Alderson Pennington
  • Publication number: 20240078140
    Abstract: According to some embodiments, systems and methods are provided, including a repository storing at least an Application Programming Interface (API) mapping table; a memory storing processor-executable program code; and a processing unit to execute the processor-executable program code to: receive an input of one or more legacy API identification elements for a legacy API; determine whether the received legacy API identification elements correspond to a standard legacy API; in a case the received legacy API identification elements do correspond to a standard legacy API, determine whether a corresponding updated API is available; in a case the corresponding updated API is available, determine whether the legacy API includes at least one extension; and in a case the legacy API does include at least one extension, generate an updated corresponding API extension, and transmit the corresponding updated API and the updated corresponding API extension to the user. Numerous other aspects are provided.
    Type: Application
    Filed: September 6, 2022
    Publication date: March 7, 2024
    Inventors: Garima SRIVASTAVA, Jenifer SAM
  • Publication number: 20240078141
    Abstract: A method for providing ingestion checkpointing from an event topic is disclosed. The method includes polling, via an event consumer, a message broker to initiate consumption of events from the event topic, the event topic relating to event storage; checkpointing, based on a result of the polling, the consumption of the events by writing corresponding data in multiple stages to a checkpointing durable store; inserting an event pending status for each of the events in an events time bucket table; committing, via the event consumer, the consumption of the events; initiating event processing for the events; and updating the events time bucket table with an event complete status when consumption of the events are completed.
    Type: Application
    Filed: September 6, 2022
    Publication date: March 7, 2024
    Applicant: JPMorgan Chase Bank, N.A.
    Inventors: Maxwell EVERS, Prakash RAVI, Amit Kumar MESHRAM, Indrajit BISWAS, Pravallika SANTHIL
  • Publication number: 20240078142
    Abstract: Systems and methods for managing user engagement during collaboration sessions in heterogenous computing platforms are described. In some embodiments, an Information Handling System (IHS) may include a heterogeneous computing platform comprising a plurality of devices and a memory coupled to the heterogeneous computing platform, where the memory includes a plurality of sets of firmware instructions, where each set of firmware instructions, upon execution by a respective device, enables the respective device to provide a corresponding firmware service, and where at least one of the plurality of devices operates as an orchestrator configured to receive a user engagement cue during a collaboration session and process the user engagement cue.
    Type: Application
    Filed: September 2, 2022
    Publication date: March 7, 2024
    Applicant: Dell Products, L.P.
    Inventors: Daniel L. Hamlin, Srikanth Kondapi, Todd Erick Swierk
  • Publication number: 20240078143
    Abstract: Systems and methods for managing performance during collaboration sessions in heterogenous computing platforms are described. In some embodiments, an Information Handling System (IHS) may include a heterogeneous computing platform comprising a plurality of devices and a memory coupled to the heterogeneous computing platform, where the memory includes a plurality of sets of firmware instructions, where each set of firmware instructions, upon execution by a respective device, enables the respective device to provide a corresponding firmware service, and where at least one of the plurality of devices operates as an orchestrator configured to: receive, during a collaboration session, contextual data usable to identify at least one of: user presence, or user engagement; and modify an IHS performance setting based, at least in part, upon the contextual data.
    Type: Application
    Filed: September 2, 2022
    Publication date: March 7, 2024
    Applicant: Dell Products, L.P.
    Inventors: Daniel L. Hamlin, Srikanth Kondapi, Todd Erick Swierk
  • Publication number: 20240078144
    Abstract: Systems and methods include reception of an indication of a first event associated with a first object instance.
    Type: Application
    Filed: September 7, 2022
    Publication date: March 7, 2024
    Inventors: Michael HETTICH, Andre KLAHRE, Alexander KOENIG
  • Publication number: 20240078145
    Abstract: A method and a system for providing a shared state module that acts as a common interface for facilitating data sharing among microservice front-end modules that are being used in conjunction with one another within a single application are provided. The method includes: receiving an input that includes information that relates to a set of microservice modules to be utilized for constructing an application; uploading each of the set of microservice modules and a shared state module that is configured to facilitate data sharing; transmitting, to each of the set of microservice modules, an instruction that provides access to the shared state module; and when a particular microservice module requests a subset of data that is accessible via the shared state module, causing the requested subset of data to be received by the particular microservice module.
    Type: Application
    Filed: September 6, 2022
    Publication date: March 7, 2024
    Applicant: JPMorgan Chase Bank, N.A.
    Inventors: Evan BECHTOL, Mubeen HYDER
  • Publication number: 20240078146
    Abstract: System and unique iterative method for picturing website user identity and behavior related to purchasing targeted goods and services is disclosed. A five-computer identity-sensing network, and a depiction of Internet activity to increase accuracy of user identification. Identification is improved using two principal means: first, at least two independent computers to identify a visitor; second, pictorial, historic behavior to augment standard software-provided identity data. A mobile smartphone integrates the immobile digital elements.
    Type: Application
    Filed: September 3, 2022
    Publication date: March 7, 2024
    Inventor: Roy M. Halvorsen
  • Publication number: 20240078147
    Abstract: Systems, methods, and computer readable media are described for remotely changing settings on augmented reality (AR) wearable devices. Embodiments are disclosed that enable a user to change settings of an AR wearable device on a user interface (UI) provided by a host client device that can communicate wirelessly with the AR wearable device. The host client device and AR wearable device provide remote procedure calls (RPCs) and an application program interface (API) to access settings and determine if settings have been changed. The API enables the host client device to determine the settings on the AR wearable device without any prior knowledge of the settings on the AR wearable device. The RPCs and the API enable the host client device to automatically update the settings on the AR wearable device when the user changes the settings on the host client device.
    Type: Application
    Filed: September 6, 2022
    Publication date: March 7, 2024
    Inventors: Piotr Gurgul, Sharon Moll
  • Publication number: 20240078148
    Abstract: One example of the present disclosure includes a system that can access a server stub defining a server stub program. The server stub program can be configured to operate as a remote procedure call (RPC) interface for receiving a RPC request from a client program. The RPC request can include a data object in a first format. The system can also generate translator code defining a translation engine. The translator code can be generated based on the server stub. The translation engine can convert the data object from the first format associated with the RPC interface into a second format compatible with a server program. The server program can be separate from the server stub program and the translation engine.
    Type: Application
    Filed: September 7, 2022
    Publication date: March 7, 2024
    Inventors: Ronald Sigal, Alessio Soldano
  • Publication number: 20240078149
    Abstract: A method, computer system, and computer program product for data monitoring management are provided. A first invalid zero value candidate from a data stream is received. A memory location for the first invalid zero value candidate is received. At a first time an access connection to the memory location is established. At a second time subsequent to the first time the access connection to the memory location is checked. Based on the checking, a determination is made whether the first invalid zero value candidate contains an invalid zero value.
    Type: Application
    Filed: September 7, 2022
    Publication date: March 7, 2024
    Inventors: Bo Chen Zhu, Cheng Fang Wang, Ai Ping Feng, Xinzhe Wang, Yan Ting Li, Hong Yan Gu
  • Publication number: 20240078150
    Abstract: A device, system and method for resolving errors between a client device, an intermediation server and a provider system. An error-resolving computing device, receives an error indication indicative of a type of an error between an intermediation server and a provider system, the error occurring in conjunction with the intermediation server acting as an intermediary between a client device and the provider system. The error-resolving computing device retrieves, from a memory, code associated with the type of the error, the code comprising one or more of programming code and machine learning code, which, when executed, instructs the error-resolving computing device to respond to the type of the error. The error-resolving computing device executes the code to respond to the type of the error. The error-resolving computing device provides, to the intermediation server, one or more status indications indicative of a state of responding to the error.
    Type: Application
    Filed: September 6, 2022
    Publication date: March 7, 2024
    Inventors: Rodolphe Gregory Alexandre TEXIER, Alexandra SORRENTINIO, Alexandra IMBERT, Pierre BRUN, Jeremy TEYSSEDRE, Reda JEBARI
  • Publication number: 20240078151
    Abstract: A data security method and data security system configured to applied to a memory controller are provided. The data security method comprises: receiving a data writing request, wherein the data writing request comprises data to be written to a storage module and a storage address of the data; acquiring verification information of the data; and writing the data into the storage address, and writing the verification information into a redundant ECC bit corresponding to the data. The data security method and data security system according to the present disclosure can achieve the secure storage and reading of the data without extra space overhead, while maintaining high bandwidth and throughput.
    Type: Application
    Filed: September 4, 2023
    Publication date: March 7, 2024
    Applicant: Montage Electronics (Shanghai) Co., Ltd.
    Inventors: Yang CHAO, Zhaohui DU, Men LONG, Xiaoyan LI, Dajiang ZHONG
  • Publication number: 20240078152
    Abstract: Apparatus for quantum error correction is disclosed. The apparatus includes an array of processing cores, each processing core comprising: a processor on a first chip; and a processor cache on the first chip; and a bus for interconnecting neighbouring processing cores in the array of processing cores; wherein each processing core includes: control code which, when executed by the processor, causes the processor to access a processor cache of at least one neighbouring processing core.
    Type: Application
    Filed: July 11, 2023
    Publication date: March 7, 2024
    Inventor: Austin Greig Fowler
  • Publication number: 20240078153
    Abstract: Memory devices, systems including memory devices, and methods of operating memory devices are described, in which a host device may access a group of memory cells (e.g., portion of an array configurable to store ECC parity bits) otherwise reserved for ECC functionality of a memory device. The memory device may include a register to indicate whether its ECC functionality is enabled or disabled. When the register indicates the ECC functionality is disabled, the memory device may increase a storage capacity available to the host device by making the group of memory cells available for user-accessible data. Additionally or alternatively, the memory device may store metadata associated with various operational aspects of the memory device in the group of memory cells. Moreover, the memory device may modify a burst length to accommodate additional information to be stored in or read from the group of memory cells.
    Type: Application
    Filed: May 8, 2023
    Publication date: March 7, 2024
    Inventors: Aaron Jannusch, Brett K. Dodds, Debra M. Bell, Joshua E. Alzheimer, Scott E. Smith
  • Publication number: 20240078154
    Abstract: A method for execution by one or more computing devices includes selecting a first routing path from a plurality of routing paths to a set of storage units based on routing path performance information, where the first routing path has a performance level greater than a first performance threshold. The method further includes selecting a second routing path from the plurality of routing paths based on the routing path performance information, where the second routing path has a performance level less than or equal to the first performance threshold. The method further includes sending a first subset of encoded data slices to the set of storage units via the first routing path for storage therein. The method further includes sending a second subset of encoded data slices to the set of storage units via the second routing path for storage therein.
    Type: Application
    Filed: November 1, 2023
    Publication date: March 7, 2024
    Applicant: Pure Storage, Inc.
    Inventors: Gary W. Grube, Timothy W. Markison, S. Christopher Gladwin, Greg R. Dhuse, Andrew D. Baptist, Ilya Volvovski, Jason K. Resch
  • Publication number: 20240078155
    Abstract: The present application discloses a multi-time programmable electronic fuse apparatus, including: a one-time programmable cell module, a parsing module and a multi-time programmable cell module. The one-time programmable cell module is configured to store one-time programmable data, the multi-time programmable cell module includes a storage cell array capable of reading and writing data multiple times and is configured to store multi-time programming data. The parsing module is configured to read the one-time programming data transmitted from the one-time programmable cell module, to write the parsed initialization data into the multi-time programmable cell module upon reading the initialization data; to parse the fix data to obtain a fix location and a fix value upon reading the fix data, and to replace data stored in the corresponding fix location in the storage cell array with the fix value.
    Type: Application
    Filed: December 31, 2021
    Publication date: March 7, 2024
    Inventors: LI TONG, CHANGBING ZHAO
  • Publication number: 20240078156
    Abstract: Techniques for UNDO and REDO operations in a computer-user interface are disclosed. The techniques enables users to configure entities for UNDO and REDO operations. The techniques also enable users to roll back individual entity to an immediate previous state in one UNDO operation and subsequently to the other previous states. Other entities are not affected by the UNDO operations to the entity.
    Type: Application
    Filed: September 6, 2022
    Publication date: March 7, 2024
    Applicant: Oracle International Corporation
    Inventors: Satish Chandra Oruganti, Ganesh Kumar Gupta, Michael Patrick Rodgers
  • Publication number: 20240078157
    Abstract: In connection with a data distribution architecture, client-side “deduplication” techniques may be utilized for data transfers occurring among various file system nodes. In some examples, these deduplication techniques involve fingerprinting file system elements that are being shared and transferred, and dividing each file into separate units referred to as “blocks” or “chunks.” These separate units may be used for independently rebuilding a file from local and remote collections, storage locations, or sources. The deduplication techniques may be applied to data transfers to prevent unnecessary data transfers, and to reduce the amount of bandwidth, processing power, and memory used to synchronize and transfer data among the file system nodes. The described deduplication concepts may also be applied for purposes of efficient file replication, data transfers, and file system events occurring within and among networks and file system nodes.
    Type: Application
    Filed: October 31, 2023
    Publication date: March 7, 2024
    Inventors: Matthew Dornquast, Brian Bispala, Damon Allison, Brad Armstrong, Marshall Scorcio, Rory Lonergan, Peter John Lindquist, Christopher Parker
  • Publication number: 20240078158
    Abstract: Systems and methods for memory serviceability mitigation are described. In some embodiments, an Information Handling System (IHS) may include a processor and a memory coupled to the processor, the memory having program instructions stored thereon that, upon execution, cause the IHS to: after failure of a memory device, notify a cloud service and enter a mitigation mode of operation with respect to the memory device, receive a message from the cloud service indicative of the provisioning of a replacement memory device, and, in response to the message and upon detection of a chassis intrusion event, leave the mitigation mode of operation with respect to the replacement memory device.
    Type: Application
    Filed: September 7, 2022
    Publication date: March 7, 2024
    Applicant: Dell Products, L.P.
    Inventors: Balasingh Ponraj Samuel, Michael Wayne Arms, Vivek Viswanathan Iyer
  • Publication number: 20240078159
    Abstract: A multichannel apparatus for exchanging channels and an operating method of the multichannel apparatus are provided. The apparatus includes reception nodes configured to receive input signals of an analog domain, main signal processors configured to perform a signal processing operation on the input signals, and auxiliary signal processors configured to replace the main signal processors and perform at least a portion of the signal processing operation in response to a replacement condition being satisfied. The reception nodes, the main signal processors, and the auxiliary signal processors are implemented in a single integrated circuit (IC) package.
    Type: Application
    Filed: September 1, 2023
    Publication date: March 7, 2024
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hyeokki HONG, Chisung BAE, Kitae PARK
  • Publication number: 20240078160
    Abstract: Techniques are provided for on-demand serverless disaster recovery. A primary node may host a primary volume. Snapshots of the primary volume may be backed up to an object store. In response to failure, a secondary node and/or an on-demand volume may be created on-demand. The secondary node may provide clients with failover access to the on-demand volume while a restore process restores a snapshot of the primary volume to the on-demand volume. In some embodiments, there was no secondary node and/or on-demand volume while the primary node was operational. This conserves computing resources that would be wasted by otherwise hosting the secondary node and/or on-demand volume while clients were able to access the primary volume through the primary node. Modifications directed to the on-demand volume are incrementally backed up to the object store for subsequently restoring the primary volume after recovery.
    Type: Application
    Filed: November 13, 2023
    Publication date: March 7, 2024
    Inventors: Dnyaneshwar Nagorao Pawar, Sumith Makam, Roopesh Chuggani`, Tijin George
  • Publication number: 20240078161
    Abstract: A method includes determining a system aspect of a system for business environment evaluation. The method further includes determining at least one evaluation perspective for use in performing the business environment evaluation on the system aspect. The method further includes determining at least one evaluation viewpoint for use in performing the business environment evaluation on the system aspect. The method further includes obtaining business environment data regarding the system aspect in accordance with the at least one evaluation perspective and the at least one evaluation viewpoint. The method further includes calculating a business environment rating as a measure of system business environment maturity for the system aspect based on the business environment data, the at least one evaluation perspective, the at least one evaluation viewpoint, and at least one evaluation rating metric.
    Type: Application
    Filed: November 13, 2023
    Publication date: March 7, 2024
    Applicant: UncommonX Inc.
    Inventors: Raymond Hicks, Ryan Michael Pisani, Thomas James McNeela
  • Publication number: 20240078162
    Abstract: A system and method for determining and generating a visualization of processor utilization is described. The system accesses a source data set that indicates processor utilization rates of a plurality of servers over a plurality of sampling periods. The system defines a target data set that includes a plurality of processor utilization range buckets corresponding to the plurality of sampling periods. The system updates the target data set based on the source data set. A graphical user interface (GUI) is generated based on the updated target data set and includes a stacked area chart indicating percentages of samples corresponding to the processor utilization range buckets over time. The system distributes, based on the updated target data set, a load of from a first server to a second server based on the processor utilization range bucket of the first server and the processor utilization range bucket of the second server.
    Type: Application
    Filed: November 10, 2023
    Publication date: March 7, 2024
    Inventors: Robert Martin TOUGHER, Randy Lehner, Daniel Christopher Gidycz
  • Publication number: 20240078163
    Abstract: A system to deploy virtual sensors to a machine learning project and translate data of the machine learning project is provided. The system can deploy, for a machine learning project, a plurality of virtual sensors at a first location of a plurality of locations to detect metadata of a data source of the machine learning project, at a second location of the plurality of locations to detect deployment information of a model trained for the machine learning project, and at a third location of the plurality of locations to detect learning session information for creation of the model. The system can collect, via the plurality of virtual sensors, data for the machine learning project. The system can translate, for render on a computing system, the data collected via the plurality of virtual sensors into a plurality of graphics.
    Type: Application
    Filed: November 10, 2023
    Publication date: March 7, 2024
    Applicant: DataRobot, Inc.
    Inventors: Jeremy Achin, Michael Schmidt, Dmitry Zahanych, Alexander Jason Conway, Benjamin Taylor, Michael William Gilday, Uros Perisic, Andrii Chulovskyi, Romain Briot, Sully Matthew Sullenberger
  • Publication number: 20240078164
    Abstract: Methods, systems, and devices for managing software agent health are described. A software platform may output multiple requests to one or more software agents. Each request may be associated with operation of a respective software agent. The software platform may obtain statistics for each software agent in response to the multiple requests. The statistics may corresponds to a respective performance of each software agent of the one or more software agents. The software platform may output a recommendation for each software agent, of the one or more software agents, based on the statistics and one or more rules configured at the software platform.
    Type: Application
    Filed: September 7, 2022
    Publication date: March 7, 2024
    Inventors: Kunal Sinha, Andrey Omelchak
  • Publication number: 20240078165
    Abstract: Synchronizing context information between a plurality of electronic devices associated with a user, each device including one or more processors, communication interfaces, and memory or storage, can be performed by at least one of the devices and can include subscribing to one or more contexts, each context corresponding one or more properties, statuses, or other information corresponding to another of the plurality of electronic devices; and receiving periodic updates of the one or more subscribed contexts from a data store shared or distributed among the plurality of devices, wherein receiving periodic updates comprises pulling the periodic updates from the data store or receiving pushed updates from the data store. The subscribed contexts can be filtered based on at least one of relevance or importance, wherein the relevance or importance of each context controls the frequency, scheduling, and prioritization of updates for that context.
    Type: Application
    Filed: September 20, 2022
    Publication date: March 7, 2024
    Inventors: Gina B. Lu, Aaron Cotter, Alexander D. Palmer, Kartik R. Venkatraman
  • Publication number: 20240078166
    Abstract: A diagnosis device according to one embodiment of the present invention includes: a signal strength acquisition unit that acquires the signal strength of each of a plurality of nodes that divide a touch panel; and a noise level determination unit that determines a noise level on the basis of the state of the signal strengths under a touch detection threshold, among the acquired signal strengths.
    Type: Application
    Filed: January 19, 2022
    Publication date: March 7, 2024
    Inventors: Hiroyuki KATAYA, Yasumichi SAKODA
  • Publication number: 20240078167
    Abstract: A method of validating a regulated application by generating, on a local data processing system, an automated agent to oversee a validation process of the regulated application on the local data processing system regardless of a local or web-based nature of the regulated application.
    Type: Application
    Filed: September 2, 2022
    Publication date: March 7, 2024
    Applicant: Minitab, LLC
    Inventors: Dawn Elaine Keller, Martin Dean Johnson, Jeremy C. Zerbe, Duane Long, Michael J. Yeaney
  • Publication number: 20240078168
    Abstract: A method comprises obtaining a test specification document of a user, wherein the test specification document comprises a test scheme based on a natural language; recommending, to the user and based on a first test step in the test scheme, a test interface set comprising a plurality of test interfaces for implementing a second test step, performing, by the user, a selection operation on the test interfaces in the test interface set; and generating, based on the selection operation, one or more test cases.
    Type: Application
    Filed: November 10, 2023
    Publication date: March 7, 2024
    Inventors: Ruiyuan Wan, Le Zhou, Maogui Li, Liping Xu, Shunbin Wang, Ji Wu, Kaiqi Liu
  • Publication number: 20240078169
    Abstract: A method for providing test and regression automation via a cloud native elastic tool is disclosed. The method includes obtaining test configurations, the test configurations corresponding to a test suite; parsing the test configurations to identify testing conditions for the test suite; automatically determining testing parameters for executing the test suite based on the identified testing conditions; executing the test suite based on the automatically determined testing parameters in a computing environment, the computing environment including a distributed computing environment; verifying results of the executing; and generating a report for the test suite, the report including information that corresponds to the automatically determined testing parameters, an execution status, and a verification result.
    Type: Application
    Filed: October 19, 2022
    Publication date: March 7, 2024
    Applicant: JPMorgan Chase Bank, N.A.
    Inventors: Anand SIRVISETTI, Swathi YENUMULA, Abdul Subhan Shoukat GHOUSE, Pawan KUMAR, Shravan MURIKI
  • Publication number: 20240078170
    Abstract: A setting method of in-memory computing simulator includes: performing a plurality of test combinations by an in-memory computing device and recording a plurality of first estimation indices corresponding to the plurality of test combinations respectively, wherein each of the plurality of test combinations includes one of a plurality of neural network models and one of a plurality of datasets, executing a simulator according to the plurality of test combinations by a processing device and recording a plurality of second estimation indices corresponding to the plurality of test combinations respectively, wherein the simulator has a plurality of adjustable settings; calculating a correlation sum according to the plurality of first estimation indices and the plurality of second estimation indices by the processing device, and performing an optimal algorithm to search an optimal parameter in the setting space constructed by the plurality of settings so that the correlation sum is maximal.
    Type: Application
    Filed: November 21, 2022
    Publication date: March 7, 2024
    Inventors: Ke-Han Li, Chih-Fan Hsu, Yu-Sheng Lin, Wei-Chao CHEN
  • Publication number: 20240078171
    Abstract: A model validation system is described that is configured to automatically validate model artifacts corresponding to models. For a model artifact being validated, the model validation system is configured to dynamically determine the validation checks to be performed for the model artifact, where the validation checks include various validation checks to be performed at the model artifact level and also for individual components included in the model artifact. The checks to be performed are dynamically determined based upon the attributes of the model artifact and of the components within the model artifact. The system is configured to generate a validation report that comprises information regarding the checks performed and the results generated from performing the various validation checks. The validation report may also include information suggesting actions for passing checks that result in a failed check, or for improving the scores of certain validation checks.
    Type: Application
    Filed: November 13, 2023
    Publication date: March 7, 2024
    Applicant: Oracle International Corporation
    Inventors: Bryan James Phillippe, Hari Bhaskar Sankaranarayanan, Jean-Rene Gauthier
  • Publication number: 20240078172
    Abstract: Disclosed herein are system, method, and computer program product embodiments for performing Telecom Day 0 tasks as concrete examples of the general model-based, event-driven, policy-controlled platform that generates a customized DevOp automation plan from a generic template, which describes a single platform-based workflow for automating related DevOps tasks end-to-end (e.g., across stages and teams) and top-to-bottom (e.g., across all layers—application, infrastructure and network) for an efficient, seamless, transparent and scalable process. The single, platform-based process commences with a submission that is the onboarding of a new or updated code-package or a composition of objects as a service (higher-level object). The single, platform-based process ends with the registration of the application in a catalog or returns the submission to the submitter for re-working. These capabilities automate continuous delivery, enabling agile development with a consistent developer experience.
    Type: Application
    Filed: September 7, 2022
    Publication date: March 7, 2024
    Inventors: Dave DUGGAL, William MALYK
  • Publication number: 20240078173
    Abstract: A training operation may be performed by a memory controller to provide a system clock signal and a data clock signal having a desired temporal (e.g., phase) relationship to one another. The system clock and data clock signals may be provided to a memory. In some examples, the memory controller may provide a command to the memory to put the memory in a training mode. Once in the training mode, the memory controller may provide a write command and toggle the data clock signal a number of times. If the memory provides one output, the memory controller may adjust the relationship between the data clock and system clock signals. If the memory provides another output, the memory controller may maintain the relationship between the data clock and system clock signals and exit the training mode.
    Type: Application
    Filed: July 17, 2023
    Publication date: March 7, 2024
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: OSAMU NAGASHIMA, YOSHINORI MATSUI, KEUN SOO SONG, HIROKI TAKAHASHI, SHUNICHI SAITO
  • Publication number: 20240078174
    Abstract: An information storage device includes a storage unit, a control unit, an allocation information storage unit, a QoS parameter storage unit, and a monitoring result storage unit. The control unit creates and manages a logical storage area using the storage area of the storage unit when a storage area allocation request is received. The allocation information storage unit stores allocation information related to logical storage areas. The QoS parameter storage unit stores quality requests expected to be satisfied for a communication for using the logical storage area. The control unit monitors the operating state and characteristics of the storage unit and the communication status, and stores the results in the monitoring result storage unit. The control unit derives internal QoS parameters to be set in the information storage device from the information stored in the allocation information storage unit, the QoS parameter storage unit, and the monitoring result storage unit.
    Type: Application
    Filed: September 5, 2023
    Publication date: March 7, 2024
    Inventors: Takeshi ISHIHARA, Yohei HASEGAWA, Kenta YASUFUKU, Shohei ONISHI, Yoshiki SAITO, Junpei KIDA
  • Publication number: 20240078175
    Abstract: Conventional high performance computer connections are electron-based systems, which require the memory packages to be as close as mechanically possible to the computation engine. Low power and high bandwidth communication, e.g. photonic, links can drastically change the architecture of high-performance computers by eliminating the bottlenecks in communication. A computer system comprises: a plurality of memory aggregation devices configured to retrieve data from and store data in a plurality of random access memory modules forming a unified contiguous memory address space disaggregated from a processing unit; a plurality of computational devices configured for simultaneously launching a plurality of data signals including memory read and/or write requests for the data to the plurality of memory aggregation devices; and a plurality of communication links coupling each of the plurality of memory aggregation devices to each of the plurality of computational devices for transferring the data therebetween.
    Type: Application
    Filed: January 13, 2023
    Publication date: March 7, 2024
    Inventors: David Cureton BAKER, Ari NOVACK, Donovan POPPS, Benjamin Wiley MELTON, Bryan COPE, Mark BAUR, Anahita SHAYESTEH
  • Publication number: 20240078176
    Abstract: Methods, systems, and devices for data organization for logical to physical table compression are described. The memory system may identify a region that includes one or more logical addresses associated with discontinuous corresponding physical addresses. The memory system may include a plurality of regions of logical addresses and a plurality of memory cells arranged according to a plurality of physical addresses. The memory system may determine a period of inactivity of access operations on the plurality of memory cells and rearrange, during the period of inactivity, information stored within the discontinuous corresponding physical addresses to be within continuous physical addresses of the plurality of physical addresses.
    Type: Application
    Filed: May 5, 2021
    Publication date: March 7, 2024
    Inventor: Yanhua Bi
  • Publication number: 20240078177
    Abstract: Techniques for predictively configuring a cache are provided. A method includes (1) identifying, via one or more processors, a workflow configured to interact with a cache paired to a cloud storage system; (2) predicting, via the one or more processors, an expected input output operations (IOPS) pattern for transactions generated by the workflow, wherein the IOPS pattern is indicative of a proportion of read operations to write operations; and (3) configuring, via the one or more processors, one or more cache management workers based upon the expected IOPS pattern.
    Type: Application
    Filed: August 31, 2023
    Publication date: March 7, 2024
    Inventors: Jeffrey Hibser, Mohammad Amer Ghazal, Steven Engelhardt, Ankit Khandelwal, Ranga Sankar
  • Publication number: 20240078178
    Abstract: Providing adaptive cache bypass in processor-based devices is disclosed. In some aspects, a processor-based device comprises a processor that comprises a cache. The processor is configured to calculate a cache result rate based on a first one or more outcomes of a corresponding first one or more cache requests to a cache region of the cache during a sampling period. The processor is further configured to determine that the cache result rate fails to satisfy a cache result requirement. The processor is also configured to, responsive to determining that the cache result rate fails to satisfy the cache result requirement, restrict access to the cache region of the cache subsequent to the sampling period.
    Type: Application
    Filed: September 2, 2022
    Publication date: March 7, 2024
    Inventor: Suryanarayana Murthy Durbhakula
  • Publication number: 20240078179
    Abstract: A method for efficient write-back for journal truncation is provided. A method includes maintaining a journal in a memory of a computing system including a plurality of records. Each record indicates a transaction associated with one or more pages in an ordered data structure and maintaining a dirty list including an entry for each page indicated by a record in the journal. Each entry in the dirty list includes a respective first log sequence number (LSN) associated with a least recent record of the plurality of records that indicates the page and a respective second LSN associated with a most recent record of the plurality of records that indicates the page. The method includes determining to truncate the journal. The method includes identifying one or more records, of the plurality of records, from the journal to write back to a disk, where the identifying is based on the dirty list.
    Type: Application
    Filed: September 1, 2022
    Publication date: March 7, 2024
    Inventors: Jiaqi ZUO, Junlong Gao, Wenguang Wang, Eric Knauft, Hardik Singh Negi
  • Publication number: 20240078180
    Abstract: Described herein is a computer memory system comprising a plurality of memory banks or other memory structures and circuitry configured to implement a hash function that produces output values that evenly distribute strided memory accesses across the plurality of memory structures. The memory banks can be cache memory banks that may include a plurality of cache lines, cache sets, or cache ways. The memory banks can also be DRAM memory banks accessed through different memory channels. The hash function facilitates the even distribution across memory structures in the face of a plurality of different strided memory access patterns.
    Type: Application
    Filed: November 15, 2023
    Publication date: March 7, 2024
    Applicant: Intel Corporation
    Inventor: William Zorn
  • Publication number: 20240078181
    Abstract: The described technologies enable a computing device to allocate at least a portion of its persistent memory as volatile memory during runtime. At least some implementations create a file in the persistent memory of the computing device. The file is created in the persistent memory of the computing device during runtime of a virtual machine (VM) hosted by the computing device. The file may be allocated to the VM. The file allocated to the VM may be used as volatile memory. For example, the VM may use the file to store temporary data (e.g., volatile data). In some implementations, the temporary data is associated with an application executing in the VM.
    Type: Application
    Filed: September 13, 2023
    Publication date: March 7, 2024
    Inventors: Neal Robert CHRISTIANSEN, Scott Chao-Chueh LEE
  • Publication number: 20240078182
    Abstract: Techniques for parallel processing based on parallel processing with switch block execution are disclosed. An array of compute elements is accessed. Each compute element within the array of compute elements is known to a compiler and is coupled to its neighboring compute elements within the array of compute elements. Control for the compute elements is provided on a cycle-by-cycle basis. Control is enabled by a stream of wide control words generated by the compiler. A plurality of compute elements is initialized within the array with a switch statement. The switch statement is mapped into a primitive operation in each element of the plurality of compute elements. The initializing is based on a control word from the stream of control words. Each of the primitive operations is executed in an architectural cycle. A result is returned for the switch statement. The returning is determined by a decision variable.
    Type: Application
    Filed: November 13, 2023
    Publication date: March 7, 2024
    Applicant: Ascenium, Inc.
    Inventor: Peter Foley
  • Publication number: 20240078183
    Abstract: Systems and methods for processing storage transactions are disclosed. A transaction between a storage device and a host computing device is identified. The storage device determines that the transaction satisfies a criterion, and inserts data into a packet associated with the transaction. The data may be for identifying a memory subsystem of the host computing device. The storage device transmits the packet, including the data, to the host computing device for storing the packet in the memory subsystem based on the data.
    Type: Application
    Filed: October 13, 2022
    Publication date: March 7, 2024
    Inventors: Ramdas P. Kachare, Jimmy Lau, Tinh Lac, Mounica Behara, Vinit Apte
  • Publication number: 20240078184
    Abstract: The present disclosure generally relates to utilizing a transparent host memory buffer (HMB) where the host device is granted access to the HMB to obtain data from a mapping table. The data storage device stores the mapping table in HMB and then allows the host device to view the mapping table and retrieve information. The host device sends a command to the data storage device that includes not only a read command, but also mapping table info specific to the read command. Additionally, an indication of the mapping table version from where the information is also provided. The data storage device, upon receiving the command, confirms the version of the information is the most recent version and then, if confirmed, utilizes the mapping information provided with the command. In so doing, accessing the HMB after receiving the command will not be necessary.
    Type: Application
    Filed: July 25, 2023
    Publication date: March 7, 2024
    Applicant: Western Digital Technologies, Inc.
    Inventor: Vijay SIVASANKARAN
  • Publication number: 20240078185
    Abstract: Apparatuses, systems, and techniques of using parallel processor(s), such as one or more graphics processing units, to process packets (e.g., in real time). In at least one embodiment, a processor (e.g., a parallel processing unit, a central processing unit, and/or the like) detects when packet data has been stored in a memory accessible by the parallel processing unit. Then, the parallel processing unit may process the packet data to produce output data.
    Type: Application
    Filed: September 19, 2022
    Publication date: March 7, 2024
    Inventor: Elena Agostini
  • Publication number: 20240078186
    Abstract: A method of operating a cache system is disclosed. When it is desired to evict a cache entry from the cache, a cache entry to evict from the cache is selected using an age of any compression block that the cache is caching data for, and the selected cache entry is evicted from the cache.
    Type: Application
    Filed: August 9, 2023
    Publication date: March 7, 2024
    Applicant: Arm Limited
    Inventor: Olof Henrik Uhrenholt
  • Publication number: 20240078187
    Abstract: The disclosed embodiments relate to per-process configuration caches in storage devices.
    Type: Application
    Filed: November 2, 2023
    Publication date: March 7, 2024
    Inventor: Dmitri Yudanov
  • Publication number: 20240078188
    Abstract: Apparatuses and methods of directly accessing a memory space of a storage device by a host are provided. In one embodiment, a method of driverless access of a non-volatile memory of a non-volatile memory device by a host includes initializing a PCIe memory space mapping a portion of the non-volatile memory of the non-volatile memory device to a host memory space. The non-volatile memory is mapped through a PCIe link between the host and the non-volatile memory device. Load/store commands are sent to the PCIe memory space for driverless access. The method further includes negotiating an alignment size of the minimum transaction packet size to complete the load/store commands.
    Type: Application
    Filed: April 26, 2023
    Publication date: March 7, 2024
    Applicant: Western Digital Technologies, Inc.
    Inventors: Shay BENISTY, Alon MARCU, Ariel NAVON