Including Change In A Growth-influencing Parameter (e.g., Composition, Temperature, Concentration, Flow Rate) During Growth (e.g., Multilayer Or Junction Or Superlattice Growing) Patents (Class 117/56)
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Patent number: 11063073Abstract: A method of fabricating a curved focal plane array (FPA) includes forming an epitaxial layer including a semiconductor on a release layer. The release layer includes a two-dimensional (2D) material and is disposed on a first substrate. The method also includes forming a metal layer on the epitaxial layer and transferring the epitaxial layer and the metal layer to a second substrate including an elastomer. The method also includes fabricating a plurality of photodetectors from the epitaxial layer and bending the second substrate to form the curved FPA.Type: GrantFiled: February 23, 2018Date of Patent: July 13, 2021Assignee: Massachusetts Institute of TechnologyInventors: Kyusang Lee, Jeehwan Kim
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Patent number: 10996102Abstract: Systems, methods, and devices of the various embodiments may provide a fast and precise methods for continuously monitoring and measuring the absolute wavelength of monochromatic radiation sources, such as lasers, etc., irrespective of the temporal profile of the source (i.e., continuous wave, modulated, or pulsed). Radiation power measurement may also be enabled by the various embodiment methods. The various embodiment methods may utilize high-speed low-noise detection to enable fast and accurate measurements. High-precision wavelength and power measurement may be achieved in the various embodiments to monitor radiation source jitters and fluctuations, without relying on frequency transforms or dispersive optics. Both wavelength and power may be measured simultaneously or sequentially in various embodiments.Type: GrantFiled: May 17, 2018Date of Patent: May 4, 2021Assignee: UNITED STATES OF AMERICA AS REPRESENTED BY THE ADMINISTRATOR OF NASAInventors: Tamer Refaat, Mulugeta Petros, Upendra N. Singh
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Patent number: 10829868Abstract: A manufacturing method of an SiC composite substrate 10 that includes a single crystal SiC layer 12 on a polycrystalline SiC substrate 11. After manufacturing a single crystal SiC layer supporting body 14 by providing the single crystal SiC layer 12 on one surface of a holding substrate 21 including Si. A polycrystalline SiC is deposited on the single crystal SiC layer 12 through chemical vapor deposition to manufacture an SiC laminated body 15 laminated with the single crystal SiC layer 12 and the polycrystalline SiC layer 11 having a thickness t on the holding substrate 21?. At the same time, the single crystal SiC layer supporting body 14 is heated at a temperature less than 1,414 degrees Celsius, and a portion of the thickness t of the polycrystalline SiC is deposited. Then, the holding substrate 21? is physically and/or chemically removed.Type: GrantFiled: September 9, 2016Date of Patent: November 10, 2020Assignees: SHIN-ETSU CHEMICAL CO., LTD., CUSIC INC.Inventors: Shoji Akiyama, Yoshihiro Kubota, Hiroyuki Nagasawa
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Patent number: 10074540Abstract: A stacked III-V semiconductor diode having a p+ substrate with a dopant concentration of 5*1018 to 5*1020 cm?3, a layer thickness of 50-500 ?m, and formed of a GaAs compound, an n?-layer with a dopant concentration of 1014-1016 cm?3, a layer thickness of 10-300 ?m, and formed of a GaAs compound, an n+ layer with a dopant concentration of at least 1019 cm?3, a layer thickness less than 2 ?m and formed of a GaAs compound, wherein the n? layer and the n+ layer are materially connected to one another, a doped intermediate layer with a layer thickness of 5-50 ?m and a dopant concentration of 1015-1017 cm?3 is placed between the p+ substrate and the n? layer, and the intermediate layer is materially connected to the p+ substrate and to the n? layer.Type: GrantFiled: November 14, 2017Date of Patent: September 11, 2018Assignee: 3-5 Power Electronics GmbHInventor: Volker Dudek
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Patent number: 10020637Abstract: To improve characteristics of a semiconductor device (semiconductor laser), an active layer waveguide (AWG) comprised of InP is formed over an exposed part of a surface of a substrate having an off angle ranging from 0.5° to 1.0° in a [1-1-1] direction from a (100) plane to extend in the [0-1-1] direction. A cover layer comprised of p-type InP is formed over the AWG with a V/III ratio of 2000 or more. Thereby, it is possible to obtain excellent multiple quantum wells (MQWs) by reducing a film thickness variation of the AWG. Moreover, the cover layer having side faces where a (0-11) plane almost perpendicular to a substrate surface mainly appears can be formed. A sectional shape of a lamination part of the cover layer and the AWG becomes an approximately rectangular shape. Therefore, an electrification region can be enlarged and it is possible to reduce a resistance of the semiconductor device.Type: GrantFiled: June 1, 2017Date of Patent: July 10, 2018Assignee: RENESAS ELECTRONICS CORPORATIONInventors: Satoshi Ae, Shoutarou Kitamura, Tetsuro Okuda, Suguru Kato, Isao Watanabe
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Patent number: 9447517Abstract: Provided is an inexpensive seed material for liquid phase epitaxial growth of silicon carbide. A seed material 12 for liquid phase epitaxial growth of a monocrystalline silicon carbide includes a surface layer containing a polycrystalline silicon carbide with a 3C crystal polymorph. Upon Raman spectroscopic analysis of the surface layer with an excitation wavelength of 532 nm, a peak other than a TO peak and an LO peak is observed as a peak derived from the polycrystalline silicon carbide with a 3C crystal polymorph.Type: GrantFiled: June 29, 2011Date of Patent: September 20, 2016Assignee: TOYO TANSO CO., LTD.Inventors: Satoshi Torimi, Satoru Nogami, Tsuyoshi Matsumoto
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Patent number: 9388506Abstract: The present invention provides a semiconductor crystal removal apparatus which realizes effective removal of a semiconductor crystal from a crucible through rapid melting of a solidified flux, and a method for producing a semiconductor crystal. The semiconductor crystal removal apparatus includes a crucible support for supporting a crucible so that the opening of the crucible is directed downward; a heater for heating the crucible supported on the crucible support; and a semiconductor crystal receiving net for receiving a semiconductor crystal falling from the opening of the crucible. The semiconductor crystal removal apparatus further includes a determination portion for determining removal of the semiconductor crystal on the basis of a change in weight through falling of the semiconductor crystal.Type: GrantFiled: June 14, 2013Date of Patent: July 12, 2016Assignee: Toyoda Gosei Co., Ltd.Inventors: Shiro Yamazaki, Seiji Nagai, Miki Moriyama
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Patent number: 9118163Abstract: Methods and apparatus for generating terahertz radiation are disclosed herein. In addition, methods for forming orientation-patterned nonlinear semiconductor crystals are disclosed herein. For example, according to an example implementation, a method for generating terahertz radiation may include: providing an optical pulse having a wavelength less than approximately 1.0 ?m; and illuminating an orientation-patterned nonlinear semiconductor crystal with the optical pulse.Type: GrantFiled: March 15, 2013Date of Patent: August 25, 2015Assignee: The Board of Trustees of the University of AlabamaInventors: Seongsin Kim, Patrick Kung
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Patent number: 9028611Abstract: A method for producing a Group III nitride semiconductor includes reacting a molten mixture containing at least a Group III element and an alkali metal with a gas containing at least nitrogen, to thereby grow a Group III nitride semiconductor crystal on the seed crystal. The method includes forming a template substrate including a sapphire substrate and a first Group III nitride semiconductor layer as the seed crystal which is formed by vapor phase growth and which includes a c-plane as a main plane is employed, and the template substrate is placed and maintained in the molten mixture under conditions where crystal growth of the Group III nitride semiconductor is inhibited, to thereby partially melt back a plurality of separated parts of the first Group III nitride semiconductor layer to such a depth that the sapphire substrate is partially exposed.Type: GrantFiled: December 22, 2010Date of Patent: May 12, 2015Assignee: Toyoda Gosei Co., Ltd.Inventor: Shiro Yamazaki
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Patent number: 8945302Abstract: Method for crystal growth from a surfactant of a metal-nonmetal (MN) compound, including the procedures of providing a seed crystal, introducing atoms of a first metal to the seed crystal thus forming a thin liquid metal wetting layer on a surface of the seed crystal, setting a temperature of the seed crystal below a minimal temperature required for dissolving MN molecules in the wetting layer and above a melting point of the first metal, each one of the MN molecules being formed from an atom of a second metal and an atom of a first nonmetal, introducing the MN molecules which form an MN surfactant monolayer, thereby facilitating a formation of the wetting layer between the MN surfactant monolayer and the surface of the seed crystal, and regulating a thickness of the wetting layer, thereby growing an epitaxial layer of the MN compound on the seed crystal.Type: GrantFiled: March 4, 2012Date of Patent: February 3, 2015Assignee: Mosaic Crystals Ltd.Inventor: Moshe Einav
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Patent number: 8940095Abstract: An apparatus for growth of uniform multi-component single crystals is provided. The single crystal material has at least three elements and has a diameter of at least 50 mm, a dislocation density of less than 100 cm?2 and a radial compositional variation of less than 1%.Type: GrantFiled: November 4, 2011Date of Patent: January 27, 2015Assignee: Rensselaer Polytechnic InstituteInventor: Partha Dutta
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Publication number: 20150017466Abstract: A self-aligned tunable metamaterial is formed as a wire mesh. Self-aligned channel grids are formed in layers in a silicon substrate using deep trench formation and a high-temperature anneal. Vertical wells at the channels may also be etched. This may result in a three-dimensional mesh grid of metal and other material. In another embodiment, metallic beads are deposited at each intersection of the mesh grid, the grid is encased in a rigid medium, and the mesh grid is removed to form an artificial nanocrystal.Type: ApplicationFiled: March 11, 2013Publication date: January 15, 2015Inventors: Arturo A. Ayon, Ramakrishna Kotha, Diana Strickland
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Patent number: 8926750Abstract: A method for synthesizing ZnO, comprising continuously circulating a growth solution that is saturated with ZnO between a warmer deposition zone, which contains a substrate or seed, and a cooler dissolution zone, which is contains ZnO source material.Type: GrantFiled: November 27, 2013Date of Patent: January 6, 2015Assignee: The Regents of the University of CaliforniaInventors: Jacob J. Richardson, Frederick F. Lange
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Patent number: 8906158Abstract: Disclosed is a method for producing a compound semiconductor epitaxial substrate having a pn junction by selective growth which is characterized by using a base substrate having an average residual strain of not more than 1.0×10?5.Type: GrantFiled: August 23, 2005Date of Patent: December 9, 2014Assignee: Sumitomo Chemical Company, LimitedInventors: Kenji Kohiro, Kazumasa Ueda, Masahiko Hata
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Publication number: 20140352748Abstract: A thermoelectric material including: a two dimensional nanostructure having a core and a shell on the core. Also, a thermoelectric element and a thermoelectric apparatus including the thermoelectric material, and a method of preparing the thermoelectric material.Type: ApplicationFiled: November 13, 2013Publication date: December 4, 2014Applicants: Industry-Academic Cooperation Foundation, Yonsei University, Samsung Electronics Co., Ltd.Inventors: Jong-wook ROH, Weon-ho SHIN, Jung-young CHO, Kyu-hyoung LEE, Un-yong JEONG
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Patent number: 8758508Abstract: The invention relates to a method for forming a thin film of molecular organic semiconductor material (OSCM), said film being intended to be integrated into a device for applications in electronics or optoelectronics, which includes the following steps: step (c) of supplying a defined quantity of the molecular OSCM in the form of a melt to the surface of a substrate so as to form a thin film; and a step (d) of cooling according to a defined temperature profile in order to solidify the thin film, characterized in that the temperature of the substrate surface is equal to or above the melting point of the molecular OSCM at the moment of implementing step (a) and in that the temperature profile of step (b) comprises: a first part corresponding to a sufficiently slow controlled cooling of the molecular OSCM down to a temperature close to the crystallization temperature of the molecular OSCM, so as to cause only a single seed to appear in the thin film in melt form; and a second part corresponding to controlled cooType: GrantFiled: October 24, 2008Date of Patent: June 24, 2014Assignees: Centre National de la Recherche Scientifique (CNRS), Commissariat a l'Energie Atomique et aux Energies AlternativesInventors: Patrice Rannou, Benjamin Grevin
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Patent number: 8668774Abstract: A method for synthesizing ZnO, comprising continuously circulating a growth solution that is saturated with ZnO between a warmer deposition zone, which contains a substrate or seed, and a cooler dissolution zone, which is contains ZnO source material.Type: GrantFiled: April 15, 2010Date of Patent: March 11, 2014Assignee: The Regents of the University of CaliforniaInventors: Jacob J. Richardson, MaryAnn E. Lange
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Patent number: 8574362Abstract: The present invention relates to a method for manufacturing an ultra low defect semiconductor single crystalline ingot, which uses a Czochralski process for growing a semiconductor single crystalline ingot through a solid-liquid interface by dipping a seed into a semiconductor melt received in a quartz crucible and slowly pulling up the seed while rotating the seed, wherein a defect-free margin is controlled by increasing or decreasing a heat space on a surface of the semiconductor melt according to change in length of the single crystalline ingot as progress of the single crystalline ingot growth process.Type: GrantFiled: October 2, 2008Date of Patent: November 5, 2013Assignee: Siltron, Inc.Inventors: Young-Ho Hong, Hyon-Jong Cho, Sung-Young Lee, Seung-Ho Shin, Hong-Woo Lee
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Publication number: 20130244016Abstract: At least two types of dielectric materials such as oxide nanosheets having a layered perovskite structure that differ from each other are laminated, and the nanosheets are bonded to each other via an ionic material, thereby producing a superlattice structure-having ferroelectric thin film. Having the layered structure, the film can exhibit ferroelectricity as a whole, though not using a ferroelectric material therein. Accordingly, there is provided a ferroelectric film based on a novel principle, which is favorable for ferroelectric memories and others and which is free from a size effect even though extremely thinned.Type: ApplicationFiled: October 4, 2011Publication date: September 19, 2013Inventors: Minoru Osada, Takayoshi Sasaki
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Publication number: 20120329658Abstract: Provided is a method of forming a ceramic wire. In the method, a ceramic precursor film is deposited on a wire substrate. Then, the wire substrate on which the ceramic precursor film is deposited is treated by heating. For treating the wire substrate by heating, a temperature of the wire substrate and/or an oxygen partial pressure of the wire substrate are controlled such that the ceramic precursor film is in a liquid state and an epitaxy ceramic film is formed from the liquid ceramic precursor film on the wire substrate.Type: ApplicationFiled: August 3, 2010Publication date: December 27, 2012Inventors: Seung-Hyun Moon, Hun-Ju Lee, Sang-Im Yoo, Hong-Soo Ha
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Publication number: 20120304916Abstract: A method of producing an SiC single crystal is provided in which an SiC single crystal is grown on a first seed crystal held at a lower end of a seed crystal holder, by immersing the first seed crystal in a source material melt in a crucible; this method of producing an SiC single crystal is characterized by carrying out a treatment that promotes the growth of a polycrystal in a region outside the first seed crystal.Type: ApplicationFiled: February 17, 2011Publication date: December 6, 2012Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHAInventor: Tomokazu Ishii
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Patent number: 8323404Abstract: A group III nitride crystal containing therein an alkali metal element comprises a base body, a first group III nitride crystal formed such that at least a part thereof makes a contact with the base body, the first group III nitride crystal deflecting threading dislocations in a direction different from a direction of crystal growth from the base body and a second nitride crystal formed adjacent to the first group III nitride crystal, the second nitride crystal having a crystal growth surface generally perpendicular to the direction of the crystal growth.Type: GrantFiled: November 20, 2006Date of Patent: December 4, 2012Assignee: Ricoh Company, Ltd.Inventors: Hirokazu Iwata, Seiji Sarayama, Akihiro Fuse
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Patent number: 8246745Abstract: A method and device for producing metal foils using the foil-casting principle includes the steps of filling a casting frame with liquid metal, moving a substrate through the bottom of the casting frame, with the substrate belt being at a lower temperature than the melting point of the liquid metal in the bottom of the casting frame, so that a bottom layer of the liquid metal crystallizes on the substrate and a metal foil is formed on the substrate on one side of the casting frame. The method further includes the steps of measuring at least one of a thickness and weight of the metal foil, and adjusting the contact surface area between the liquid metal and the substrate as a function of the measured value for the thickness and/or weight of the foils produced.Type: GrantFiled: April 26, 2005Date of Patent: August 21, 2012Assignee: RGS Development B.V.Inventors: Axel Georg Schönecker, Karl Ingo Steinbach
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Patent number: 8210906Abstract: A wafer slicing method includes winding a wire around rollers and pressing the wire against an ingot while supplying slurry to the rollers. A previously conducted experiment provides a supply temperature profile of the slurry during the slicing process and the relationship to the axial displacement of the rollers. This relationship is used to implement slurry delivery during the slicing process. The resultant wafers are bowed in a uniform direction. This slicing method provides excellent reproducibility in addition to producing wafers that are bowed in a uniform direction.Type: GrantFiled: August 22, 2007Date of Patent: July 3, 2012Assignee: Shin-Etsu Handotai Co., Ltd.Inventors: Hiroshi Oishi, Daisuke Nakamata
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Patent number: 8201947Abstract: A wavelength converter includes a supporting substrate and a ferroelectric substrate, the ferroelectric substrate includes at least one waveguide facing the supporting substrate and at least one wavelength-filtering pattern positioned between the waveguide and the supporting substrate, the waveguide includes a plurality of inverted domains and non-inverted domains configured to convert an infrared light into a green light, and the infrared light emitted from the semiconductor laser enters the waveguide of the wavelength converter. For example, the wavelength-filtering pattern includes a Bragg grating.Type: GrantFiled: December 3, 2009Date of Patent: June 19, 2012Assignee: HC Photonics Corp.Inventors: Yi Zhong Chen, Shang Ling Liu, Ming Hsien Chou
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Publication number: 20120003446Abstract: A nitride crystal which encircles an outer periphery of a seed crystal, the nitride crystal in an embodiment includes: a first partial region, and a second partial region that has optical characteristics different from those of the first partial region and has optical characteristics which indicate the crystal orientation.Type: ApplicationFiled: June 21, 2011Publication date: January 5, 2012Applicants: OSAKA UNIVERSITY, RICOH COMPANY, LTD.Inventors: Takashi SATOH, Seiji Sarayama, Hirokazu Iwata, Yusuke Mori, Yasuo Kitaoka
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Patent number: 8052793Abstract: A method for producing a silicon carbide single crystal, which comprises bringing a silicon carbide single crystal substrate into contact with a melt prepared by melting a raw material containing Si and C, and growing a silicon carbide single crystal on the substrate, the method including performing a cycle comprising the following steps (a) and (b): a) a step of bringing the seed crystal substrate into contact with the surface of the melt, growing a single crystal, and separating the seed crystal substrate from the surface of the melt thereby interrupting the growth of the single crystal, and b) a step of bringing the seed crystal substrate into contact with the surface of the melt and growing a single crystal, at least one time, wherein the seed crystal is a 6H-silicon carbide single crystal or a 15R-silicon carbide single crystal and the resulting single crystal is a 4H-silicon carbide single crystal.Type: GrantFiled: June 16, 2006Date of Patent: November 8, 2011Assignee: Toyota Jidosha Kabushiki KaishaInventor: Hidemitsu Sakamoto
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Publication number: 20110209659Abstract: A method for controlling the relative and absolute growth rates of all possible crystallographic planes of a group-III nitride crystal during ammonothermal growth. The growth rates of the various exposed crystallographic planes of the group-III nitride crystal are controlled by modifying the environment and/or conditions within the reactor vessel, which may be subdivided into a plurality of separate zones, wherein each of the zones has their own environment and conditions. The environment includes the amount of atoms, compounds and/or chemical complexes within each of the zones, along with their relative ratios and the relative motion of the atoms, compounds and/or chemical complexes within each of the zones and among the zones. The conditions include the thermodynamic properties each of the zones possess, such as temperatures, pressures and/or densities.Type: ApplicationFiled: November 4, 2009Publication date: September 1, 2011Applicant: THE REGENTS OF THE UNIVERSITY OF CALIFORNIAInventors: Siddha Pimputkar, Derrick S. Kamber, James S. Speck, Shuji Nakamura
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Publication number: 20110212013Abstract: A method for adding hydrogen-containing and/or nitrogen-containing compounds to a nitrogen-containing solvent used during ammonothermal growth of group-Ill nitride crystals to offset decomposition products formed from the nitrogen-containing solvent, in order to shift the balance between the reactants, i.e. the nitrogen-containing solvent and the decomposition products, towards the reactant side.Type: ApplicationFiled: November 4, 2009Publication date: September 1, 2011Applicant: THE REGENTS OF THE UNIVERSITY OF CALIFORNIAInventors: Siddha Pimputkar, Derrick S. Kamber, James S. Speck, Shuji Nakamura
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Patent number: 8002893Abstract: In a Czochralski (CZ) single crystal puller equipped with a cooler and a thermal insulation member, which are to be disposed in a CZ furnace, smooth recharge and additional charge of material are made possible. Further, elimination of dislocations from a silicon seed crystal by use of the Dash's neck method can be performed smoothly. To these ends, there is provided a CZ single crystal puller, wherein a cooler and a thermal insulation member are immediately moved upward away from a melt surface during recharge or additional charge of material or during elimination of dislocations from a silicon seed crystal by use of the Dash's neck method.Type: GrantFiled: December 23, 2008Date of Patent: August 23, 2011Assignee: Komatsu Denshi Kinzoku Kabushiki KaishaInventors: Daisuke Ebi, Kentaro Nakamura, Kengo Hayashi, Yoshinobu Hiraishi, Shigeo Morimoto, Hiroshi Monden
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Publication number: 20110155046Abstract: In the Na flux method, a target semiconductor layer is separated from a sapphire substrate of a template substrate. The template substrate formed of the sapphire substrate and a GaN layer is placed in a Ga—Na molten mixture. The temperature the molten mixture and the nitrogen pressure are adjusted to 850° C. and 2.5 MPa, respectively. Under the conditions, a part of the GaN layer is melted back until the surface of the sapphire substrate is exposed, so that the remaining portion of the GaN layer is left in the form of a plurality of upright columns. Then, the pressure is elevated to 3 MPa, whereby a target GaN layer is grown on the processed GaN layer. Through lowering temperature, stress due to the difference in linear expansion coefficient and lattice constant between sapphire and GaN is generated, to thereby generate cracks in the processed GaN layer. By virtue of the cracking, the target GaN layer is separated from the sapphire substrate.Type: ApplicationFiled: December 22, 2010Publication date: June 30, 2011Applicant: Toyoda Gosei Co., Ltd.Inventor: Shiro Yamazaki
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Patent number: 7875115Abstract: This disclosure is aimed at providing a method for producing an epitaxial wafer allowing uniform occurrence of oxygen precipitate in a substrate plane in the radial direction in a base plate and excelling in the crystal quality of an epi-layer. A method for the production of an epitaxial wafer, characterized by using as a substrate a base plate of nitrogen- and carbon-added silicon single crystal having a nitrogen concentration of 5×1014 to 5×1015 atoms/cm3 and a carbon concentration of 1×1016 to 1×1018 atoms/cm3, having a crystal growth condition during the production of silicon single crystal in a range in which the whole surface of substrate becomes an OSF region, and being pulled at a cooling speed of not less than 4° C./minute between 1100 and 1000° C. during the growth of crystal, and depositing the silicon single crystal layer on the surface of the substrate by the epitaxial method.Type: GrantFiled: January 12, 2007Date of Patent: January 25, 2011Assignee: Siltronic AGInventors: Katsuhiko Nakai, Koji Fukuhara
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Patent number: 7704318Abstract: When growing a silicon single crystal free of grown-in defects based on the CZ method, the crystal is pulled out at a critical pulling rate at which a ring-shaped OSF occurrence region vanishes in a center portion of the crystal by using a hot zone structure in which a temperature gradient Gc in a center portion of the crystal is equal to or greater than a temperature gradient Ge in a peripheral portion of the crystal, while supplying an inert gas including hydrogen to an interior of a pulling furnace. The critical pulling rate at which the ring-shaped OSF occurrence region vanishes in the center portion of the crystal is increased, and single crystals free of grown-in defects in which dislocation clusters and COPs can be grown by pulling at a pulling rate higher than that of the prior art.Type: GrantFiled: February 25, 2004Date of Patent: April 27, 2010Assignee: Sumco CorporationInventors: Masataka Hourai, Wataru Sugimura, Toshiaki Ono, Tadami Tanaka
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Patent number: 7605062Abstract: A doped semiconductor junction for use in an electronic device and a method for making such junction is disclosed. The junction includes a first polycrystalline semiconductor layer doped with donors or acceptors over a substrate such that the first doped semiconductor layer has a first polarity, the first layer including fused semiconductor nanoparticles; and a second layer in contact with the first semiconductor layer over a substrate to form the semiconductor junction.Type: GrantFiled: February 26, 2007Date of Patent: October 20, 2009Assignee: Eastman Kodak CompanyInventor: Keith B. Kahen
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Publication number: 20090223440Abstract: A process for making gallium nitride crystals comprising the steps of charging a reaction vessel with a layer of one selected from a Group IA element nitride, a Group IIA element nitride, and combinations thereof, adding a layer of gallium, applying nitrogen pressure to prevent dissociation or decomposition, forming in situ a gallium nitride source by heating the charged reaction vessel to render the one selected from the group reacted with the gallium, forming in situ a solvent comprising the gallium and the one selected from the group released by an exchange reaction between the gallium and the one selected from the group, providing a temperature when formed gallium nitride will be dissolved in the formed solvent and providing a temperature difference in the solvent between the formed gallium nitride source and the growing single crystal gallium nitride, and growing a single crystal gallium nitride.Type: ApplicationFiled: March 4, 2008Publication date: September 10, 2009Inventors: Boris Feigelson, Rachel M. Frazier
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Publication number: 20090155580Abstract: To provide a semiconductor substrate of high quality suitable for fabricating an electronic device or an optical device. The present invention provides a method for producing a semiconductor substrate for an electronic device or an optical device, the method including reacting nitrogen (N) with gallium (Ga), aluminum (Al), or indium (In), which are group III elements, in a flux mixture containing a plurality of metal elements selected from among alkali metals and alkaline earth metals, to thereby grow a group III nitride based compound semiconductor crystal. The group III nitride based compound semiconductor crystal is grown while the flux mixture and the group III element are mixed under stirring.Type: ApplicationFiled: April 5, 2007Publication date: June 18, 2009Inventors: Naoki Shibata, Koji Hirata, Shiro Yamazaki, Katsuhiro Imai, Makoto Iwai, Takatomo Sasaki, Yusuke Mori, Fumio Kawamura
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Patent number: 7517406Abstract: Proposed is a technique of producing a magnetic garnet material of which the light absorption characteristics worsen little even though it is produced through LPE. The crucible for LPE is formed of a material containing Au. The amount of Au to be taken in single crystal formed in an Au crucible is smaller than that of Pt to be taken therein formed in a Pt crucible. As compared with Pt, the influence of Au on magnetic garnet film that increases the insertion loss in the film is small.Type: GrantFiled: December 21, 2007Date of Patent: April 14, 2009Assignee: TDK CorporationInventors: Atsushi Ohido, Tamotsu Sugawara, Kazuhito Yamasawa, Shinichiro Kakei, Kazuya Shimakawa, Katsunori Hosoya
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Patent number: 7494903Abstract: A method is disclosed for making a doped semiconductor transport layer for use in an electronic device comprising: growing in-situ doped semiconductor nanoparticles in a colloidal solution; depositing the in-situ doped semiconductor nanoparticles on a surface; and annealing the deposited in-situ doped semiconductor nanoparticles so that the organic ligands boil off the surface of the in-situ doped semiconductor nanoparticles.Type: GrantFiled: January 29, 2007Date of Patent: February 24, 2009Assignee: Eastman Kodak CompanyInventor: Keith B. Kahen
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Publication number: 20080290300Abstract: A crystallization apparatus is provided. In the crystallization apparatus, a light intensity distribution formed by a light modulation device or a metal aperture and transferred to a processed substrate can be visualized. The crystallization apparatus has an ultraviolet (UV) irradiation system and a visible light irradiation system. The UV irradiation system irradiates pulses of laser beam in the UV range to the processed substrate. The visible light irradiation system continuously irradiates a visible light laser beam on the same irradiated region on the processed substrate. In a melted region resulted from the uniform irradiation of the laser beam in the UV range, the light intensity distribution of the visible laser beam is used to form crystal growth. The crystallization apparatus irradiates pulses of the laser beam in the UV range to melt the processed substrate, and continuously irradiates the visible light laser beam to crystallize the processed substrate.Type: ApplicationFiled: October 29, 2007Publication date: November 27, 2008Applicant: SHIMADZU CORPORATIONInventors: Noritaka AKITA, Yoshio TAKAMI
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Patent number: 7375011Abstract: A method of making an ex-situ doped semiconductor transport layer for use in an electronic device includes: growing a first set of semiconductor nanoparticles having surface organic ligands in a colloidal solution; growing a second set of dopant material nanoparticles having surface organic ligands in a colloidal solution; depositing a mixture of the first set of semiconductor nanoparticles and the second set of dopant material nanoparticles on a surface, wherein there are more semiconductor nanoparticles than dopant material nanoparticles; performing a first anneal of the deposited mixture of nanoparticles so that the organic ligands boil off the surfaces of the first and second set of nanoparticles; performing a second anneal of the deposited mixture so that the semiconductor nanoparticles fuse to form a continuous semiconductor layer and the dopant material atoms diffuse out from the dopant material nanoparticles and into the continuous semiconductor layer.Type: GrantFiled: February 22, 2007Date of Patent: May 20, 2008Assignee: Eastman Kodak CompanyInventor: Keith B. Kahen
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Patent number: 7351283Abstract: A crystalline thin structure (104, 204, 404) is grown on a surface (108, 228) of a substrate (112, 208, 400) by depositing molecules (136, 220) from a molecular precursor to a lateral growth front (144, 224) of the structure using a crystal grower (116, 200). In one embodiment, the crystal grower comprises a solution (124) containing the molecular precursor in a solvent (140). Molecules are added to the lateral growth front by moving one or both of the free surface (120, 120?) of the solution and deposition surface relative to the other at a predetermined rate. In another embodiment, the crystal grower comprises a mask (212) that includes at least one opening (216). Precursor molecules are vacuum deposited via a molecular beam (236) at the growth front (228) of the crystalline thin structure (204) as one or both of the opening and surface are moved relative to the other at a predetermined rate.Type: GrantFiled: March 11, 2005Date of Patent: April 1, 2008Assignee: The University of Vermont and State Agricultural CollegeInventor: Randall L. Headrick
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Publication number: 20080041300Abstract: A high quality single-crystalline polyalkylthiophene structure can be easily prepared by the inventive method which comprises: (i) dissolving polyalkylthiophene in an organic solvent at a temperature ranging from 50 to 100° C., sequentially quenching the polyalkylthiophene solution at a temperature ranging from 25 to 40° C. and then at ?5 to 15° C., to obtain a self-seeding polyalkylthiophene solution; and (ii) applying the self-seeding polyalkylthiophene solution obtained in step (i) to one surface of a nano-template having a hydrophobic supramolecule coating layer formed thereon to induce self-assembly and crystallization of polyalkylthiophene on the surface.Type: ApplicationFiled: August 20, 2007Publication date: February 21, 2008Inventors: Kilwon Cho, Do Hwan Kim
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Patent number: 7294200Abstract: A method for producing a nitride semiconductor crystal comprising steps (a), (b) and (c), which steps follow in sequence as follows: a step (a) for forming fine crystal particles made of a nitride semiconductor on a substrate; a step (b) for forming a nitride semiconductor island structure having a plurality of facets inclined relative to a surface of the substrate using the fine crystal particles as nuclei; and a step (c) for causing the nitride semiconductor island structure to grow in a direction parallel with a surface of the substrate to merge a plurality of the nitride semiconductor island structures with each other, thereby forming a nitride semiconductor crystal layer having a flat surface; the steps (a)-(c) being continuously conducted in the same growing apparatus.Type: GrantFiled: March 26, 2003Date of Patent: November 13, 2007Assignee: Hitachi Cable, Ltd.Inventors: Hajime Fujikura, Kazuyuki Iizuka
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Publication number: 20070187668Abstract: A single crystal substrate and method of fabricating the same are provided. The single crystal substrate includes an insulator having a window exposing a portion of a substrate, a selective epitaxial growth layer formed on the portion of the substrate exposed through the window and a single crystalline layer formed on the insulator and the selective epitaxial growth layer using the selective epitaxial growth layer as an epitaxial seed layer.Type: ApplicationFiled: November 13, 2006Publication date: August 16, 2007Inventors: Takashi Noguchi, Hans S. Cho, Wenxu Xianyu, Huaxiang Yin
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Patent number: 7077901Abstract: A process for producing a single crystal silicon wafer, comprising the steps of forming a porous layer on a single crystal silicon substrate comprising a silicon whose concentration of mass number 28 silicon isotope is less than 92.5% on an average; dissolving a starting silicon whose concentration of mass number 28 silicone isotope whose mass number is more than 98% on an average in a melt for liquid-phase epitaxy until said starting silicon becomes to be a supersaturated state in said melt under reductive atmosphere maintained at high temperature: immersing said single crystal silicon substrate in said melt to grow a single crystal silicon layer on the surface of said porous layer of said single crystal silicon substrate; and peeling said single crystal silicon layer from a portion of said porous layer.Type: GrantFiled: March 31, 2003Date of Patent: July 18, 2006Assignee: Canon Kabushiki KaishaInventors: Katsumi Nakagawa, Takao Yonehara, Kazuaki Ohmi, Shoji Nishida
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Patent number: 7048797Abstract: A liquid-phase growth process for continuously growing a crystal film on a plurality of substrates with respect to their one side surfaces, characterized in that said plurality of substrates are kept afloat on the surface of a flowing solution for liquid-phase epitaxy which comprises a crystallizing material dissolved in a solvent in a supersaturated state and which is flowing in a solution flow passage, and while said plurality of substrates being moved by virtue of said flowing solution in said solution flow passage, a crystal film is grown on the surfaces of said plurality of substrates which are in contact with said flowing solution. A liquid-phase growth apparatus suitable for practicing said liquid-phase growth process.Type: GrantFiled: September 22, 2003Date of Patent: May 23, 2006Assignee: Canon Kabushiki KaishaInventors: Masaki Mizutani, Takehiko Yoshino, Shoji Nishida
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Patent number: 6951585Abstract: A liquid-phase growth method for immersing a polycrystalline substrate in a melt in a crucible wherein crystal ingredients are dissolved, thereby growing poly crystals upon the substrate, comprises a first step for growing poly crystals to a predetermined thickness, and a second step for melting back a part of the poly crystals grown in the first step in the melt, wherein the relative position between the substrate and melt is changed between the first step and second step, bringing melt with different temperature into contact with the polycrystalline surface. The obtained poly crystals have properties rivaling those of poly crystals used in conventional solar cells but with little risk of trouble such as line breakage of grid electrodes in application to solar cells, and can be obtained in great quantities at low costs.Type: GrantFiled: March 27, 2003Date of Patent: October 4, 2005Assignee: Canon Kabushiki KaishaInventors: Katsumi Nakagawa, Shunichi Ishihara, Hiroshi Sato, Shoji Nishida, Yasuyoshi Takai
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Patent number: 6902619Abstract: The invention provides a method of growing semiconductor epitaxial layers on a substrate comprising the steps of providing a substrate, providing at least a first growth solution and optionally one or more further growth solutions, and (i) exposing the substrate to the first growth solution, the growth solution being under a supersaturated condition such that a first layer grows on the surface of the substrate; and, (ii) optionally exposing the substrate to one or more further growth solutions, the further growth solutions being under a supersaturated condition such that one or more further layers grow on the surface of the first layer; and (iii) varying the pressure of the system to change the degree of supersaturation of the first growth solution or one or more further growth solutions to affect the growth of the first layer or one or more further layers.Type: GrantFiled: June 28, 2001Date of Patent: June 7, 2005Assignee: NTU Ventures PTE. Ltd.Inventors: Yuen Chuen Chan, Xiangjun Mao
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Patent number: 6875270Abstract: The invention relates to a Bi-substituted rare earth-iron garnet single-crystal film and a method for producing it, and also to a Faraday rotator comprising it. Its object is to provide a magnetic garnet single-crystal film which hardly cracks while it grows or is cooled or polished and worked, and to provide a method for producing it. Its object is also to provide a Faraday rotator produced at high yield by working the magnetic garnet single-crystal film which hardly cracks while it grows or is cooled or polished and worked. In a method for producing a magnetic garnet single-crystal film by growing a Bi-substituted magnetic garnet single crystal in a mode of liquid-phase epitaxial growth, the lattice constant of the growing magnetic garnet single crystal is so controlled that it does not vary or gradually decreases with the growth of the single-crystal film, and then increases with it.Type: GrantFiled: February 9, 2001Date of Patent: April 5, 2005Assignee: TDK CorporationInventors: Atsushi Ohido, Kazuhito Yamasawa
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Patent number: 6542299Abstract: A material for a bismuth substituted garnet thick film comprising Gd, Yb, Bi, Fe and Al as the main ingredient grown by a liquid phase growing method on a garnet substrate in which the composition of the garnet thickness is represented by the general formula: Gd3-x-yYbxBiyFe5-zAl2O12 (0<x≦0.5, 0.85≦y≦1.55 and 0.15≦z≦0.65), and each of boron oxide (B2O3) and lead oxide (PbO) is contained by from 0 to 4.0 wt % (not including 0) in the garnet thick film.Type: GrantFiled: June 5, 2001Date of Patent: April 1, 2003Assignee: NEC Tokin CorporationInventors: Tadakuni Sato, Kazumitsu Endo