Silicon From Liquid Or Supercritical State {c30b 29/06} Patents (Class 117/931)
  • Patent number: 8858707
    Abstract: A method for making silicon nanorods is provided. In accordance with the method, Au nanocrystals are reacted with a silane in a liquid medium to form nanorods, wherein each of said nanorods has an average diameter within the range of about 1.2 nm to about 10 nm and has a length within the range of about 1 nm to about 100 nm.
    Type: Grant
    Filed: April 14, 2010
    Date of Patent: October 14, 2014
    Assignee: Merck Patent GmbH
    Inventors: Andrew T. Heitsch, Colin M. Hessel, Brian A. Korgel
  • Patent number: 8858706
    Abstract: A single-crystal manufacturing apparatus according to the Czochralski method, including: a crucible that contains a raw material; a main chamber configured to accommodate a heater for heating and melting the raw material; and a pulling chamber configured to pull and accommodate a grown single crystal, the pulling chamber being continuously provided above the main chamber; an inner shield provided between the heater and the main chamber and for insulating heat radiated from the heater, and a supporting member for supporting the inner shield from below. The inner shield is supported at three or more supporting points contacting the supporting member, and a lower end of the inner shield except at the supporting points does not contact the supporting member.
    Type: Grant
    Filed: November 9, 2010
    Date of Patent: October 14, 2014
    Assignee: Shin-Etsu Handotai Co., Ltd.
    Inventors: Toshiro Shimada, Kosei Sugawara
  • Patent number: 8696808
    Abstract: Each region, which should be left on a substrate after patterning, of a semiconductor film is grasped in accordance with a mask. Then, each region to be scanned with laser light is determined so that at least the region to be obtained through the patterning is crystallized, and a beam spot is made to hit the region to be scanned, thereby partially crystallizing the semiconductor film. Each portion with low output energy of the beam spot is shielded by a slit. In the present invention, the laser light is not scanned and irradiated onto the entire surface of the semiconductor film but is scanned such that at least each indispensable portion is crystallized to a minimum. With the construction described above, it becomes possible to save time taken to irradiate the laser light onto each portion to be removed through the patterning after the crystallization of the semiconductor film.
    Type: Grant
    Filed: September 5, 2006
    Date of Patent: April 15, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hisashi Ohtani, Masaaki Hiroki, Koichiro Tanaka, Aiko Shiga, Satoshi Murakami, Mai Akiba
  • Patent number: 8404043
    Abstract: A high-quality polycrystalline bulk semiconductor having a large crystal grain size is produced by the casting method in which growth is regulated so as to proceed in the same plane direction, i.e., the {110}; plane or {112} plane is disclosed. The process, which is for producing a polycrystalline bulk semiconductor, comprises: a step in which a melt of a semiconductor selected among Si, Ge, and SiGe is held in a crucible; a step in which a bottom part of the crucible is cooled to give a temperature gradient and that part of the melt which is located directly on the crucible bottom is rapidly cooled in the beginning of growth to supercool the melt around the crucible bottom; a step in which the crucible is cooled to grow nuclei on the crucible bottom due to the supercooled state of the melt around the crucible bottom and thereby grow dendritic crystals along the crucible bottom; and a step in which a polycrystalline bulk of the semiconductor is then grown on the upper side of the dendritic crystals.
    Type: Grant
    Filed: May 30, 2008
    Date of Patent: March 26, 2013
    Assignee: Tohoku University
    Inventors: Kozo Fujiwara, Kazuo Nakajima
  • Patent number: 8012255
    Abstract: An improvement to a method and an apparatus for growing a monocrystalline silicon ingot from silicon melt according to the CZ process. The improvement performs defining an error between a target taper of a meniscus and a measured taper, and translating the taper error into a feedback adjustment to a pull-speed of the silicon ingot. The conventional control model for controlling the CZ process relies on linear control (PID) controlling a non-linear system of quadratic relationship defined in the time domain between the diameter and the pull-speed. The present invention transforms the quadratic relationship in the time domain between the diameter and the pull-speed into a simile, linear relationship in the length domain between a meniscus taper of the ingot and the pull-speed.
    Type: Grant
    Filed: July 31, 2008
    Date of Patent: September 6, 2011
    Assignees: Sumco Phoenix Corporation, Sumco Corporation
    Inventors: Benno Orschel, Joel Kearns, Keiichi Takanashi, Volker Todt
  • Patent number: 7942965
    Abstract: A method of fabricating silicon parts are provided herein. The method includes growing a silicon sample, machining the sample to form a part, and annealing the part by exposing the part sequentially to one or more gases. Process conditions during silicon growth and post-machining anneal are designed to provide silicon parts that are particularly suited for use in corrosive environments.
    Type: Grant
    Filed: March 19, 2007
    Date of Patent: May 17, 2011
    Assignee: Applied Materials, Inc.
    Inventors: Elmira Ryabova, Jie Yuan, Jennifer Sun
  • Patent number: 7909930
    Abstract: A method for producing a silicon single crystal by the Czochralski method with carbon-doping comprising: charging a polycrystalline silicon material and any one of a carbon dopant selected from the group consisting of an organic compound, an organic compound and a silicon wafer, carbon powder and a silicon wafer, an organic compound and carbon powder, and an organic compound and carbon powder and a silicon wafer into a crucible and melting the polycrystalline silicon material and the carbon dopant; and then growing a silicon single crystal from the melt of the polycrystalline silicon material and the carbon dopant. And a carbon-doped silicon single crystal produced by the method. Thereby, there is provided a method for producing a silicon single crystal with carbon-doping in which the crystal can be doped with carbon easily at low cost, and carbon concentration in the crystal can be controlled precisely.
    Type: Grant
    Filed: March 31, 2005
    Date of Patent: March 22, 2011
    Assignee: Shin-Etsu Handotai Co., Ltd.
    Inventors: Ryoji Hoshi, Naoki Nagai, Izumi Fusegawa
  • Patent number: 7799130
    Abstract: A silicon single crystal ingot growing apparatus for growing a silicon single crystal ingot based on a Czochralski method The silicon single crystal ingot growing apparatus includes a chamber; a crucible provided in the chamber, and for containing a silicon melt; a heater provided at the outside of the crucible and for heating the silicon melt; a pulling unit for ascending a silicon single crystal grown from the silicon melt; and a plurality of magnetic members provided at the outside of the chamber and for asymmetrically applying a magnetic field to the silicon melt Such a structure can uniformly controls an oxygen concentration at a rear portion of a silicon single crystal ingot using asymmetric upper/lower magnetic fields without replacing a hot zone In addition, such a structure can controls a flower phenomenon generated on the growth of the single crystal by the asymmetric magnetic fields without a loss such as the additional hot zone (H/Z) replacement, P/S down, and SR variance.
    Type: Grant
    Filed: July 27, 2006
    Date of Patent: September 21, 2010
    Assignee: Siltron, Inc.
    Inventors: Young Ho Hong, Man Seok Kwak, Ill-Soo Choi, Hyon-Jong Cho, Hong Woo Lee
  • Patent number: 7754009
    Abstract: Unpolished semiconductor wafers are produced by: (a) pulling a single crystal of a semiconductor material, (b) grinding the single crystal round, (c) separating a semiconductor wafer from this crystal, (d) rounding the edge of the semiconductor wafer, (e) surface-grinding at least one side of the semiconductor wafer, (f) treating the semiconductor wafer with an etchant, and (g) cleaning the semiconductor wafer. The unpolished semiconductor wafers have, on at least the front side, a reflectivity of 95% or more, a surface roughness of 3 nm or less, have a thickness of 80-2500 ?m, an overall planarity value GBIR of 5 ?m or less with an edge exclusion of 3 mm and a photolithographic resolution of at least 0.8 ?m, and which furthermore contain a native oxide layer with a thickness of 0.5-3 nm on both sides.
    Type: Grant
    Filed: September 28, 2006
    Date of Patent: July 13, 2010
    Assignee: Siltronic AG
    Inventors: Wolfgang Hensel, Rudolf Lehner, Helmut Schwenk
  • Patent number: 7704318
    Abstract: When growing a silicon single crystal free of grown-in defects based on the CZ method, the crystal is pulled out at a critical pulling rate at which a ring-shaped OSF occurrence region vanishes in a center portion of the crystal by using a hot zone structure in which a temperature gradient Gc in a center portion of the crystal is equal to or greater than a temperature gradient Ge in a peripheral portion of the crystal, while supplying an inert gas including hydrogen to an interior of a pulling furnace. The critical pulling rate at which the ring-shaped OSF occurrence region vanishes in the center portion of the crystal is increased, and single crystals free of grown-in defects in which dislocation clusters and COPs can be grown by pulling at a pulling rate higher than that of the prior art.
    Type: Grant
    Filed: February 25, 2004
    Date of Patent: April 27, 2010
    Assignee: Sumco Corporation
    Inventors: Masataka Hourai, Wataru Sugimura, Toshiaki Ono, Tadami Tanaka
  • Patent number: 7582160
    Abstract: In silicon single crystal growth by the Czochralski method using a quartz crucible, a silicon single crystals with a uniform distribution of oxygen concentration can be produced in high yield without being affected by changes of crystal diameter and initial amount of melt feedstock. The oxygen concentration is adjusted by estimating oxygen concentration during growth on the basis of a relationship among three parameters: crucible rotation rate (?), crucible temperature (T), and the ratio (?) of contact area of molten silicon with the inner wall of the crucible and with atmospheric gas, and by associating the temperature (T) with the ratio (?) by the function 1/?×Exp(?E/T) where E is the dissolution energy (E) of quartz into molten silicon to control at least one of the rotation rate (?) and temperature (T) to conform the estimated oxygen concentration to a target concentration.
    Type: Grant
    Filed: June 13, 2006
    Date of Patent: September 1, 2009
    Assignee: Siltronic AG
    Inventors: Yutaka Kishida, Seiki Takebayashi, Teruyuki Tamaki
  • Patent number: 7422630
    Abstract: Concentration of metal element which promotes crystallization of silicon and which exists within a crystal silicon film obtained by utilizing the metal element is reduced. A first heat treatment for crystallization is implemented after introducing nickel to an amorphous silicon film 103. Then, laser light is irradiated to diffuse the nickel element concentrated locally. After that, another heat treatment is implemented within an oxidizing atmosphere at a temperature higher than that of the previous heat treatment. A thermal oxide film 106 is formed in this step. At this time, the nickel element is gettered to the thermal oxide film 106. Then, the thermal oxide film 106 is removed. Thereby, a crystal silicon film 107 having low concentration of the metal element and a high crystallinity can be obtained.
    Type: Grant
    Filed: June 5, 2006
    Date of Patent: September 9, 2008
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Satoshi Teramoto, Jun Koyama, Yasushi Ogata, Masahiko Hayakawa, Mitsuaki Osame
  • Patent number: 7413604
    Abstract: The present invention provides a process for producing a polycrystal silicon film which comprises a step of forming a polycrystal silicon film by light irradiation of a silicon film set on a substrate, and a step of selecting substrate samples having an average grain size in a plane of the sample of 500 nm or more. According to the present invention, stable production of a high-performance poly-silicon TFT liquid crystal display becomes possible.
    Type: Grant
    Filed: September 17, 2004
    Date of Patent: August 19, 2008
    Assignee: Hitachi, Ltd.
    Inventors: Kazuo Takeda, Masakazu Saito, Yukio Takasaki, Hironobu Abe, Makoto Ohkura, Yoshinobu Kimura, Takeo Shiba
  • Publication number: 20070269361
    Abstract: The present invention relates to a single crystal silicon ingot or wafer wherein the lateral incorporation effect of intrinsic point defects has been manipulated such that the formation of agglomerated intrinsic point defects and/or oxygen precipitate clusters in a ring extending radially inward from about the lateral surface of the ingot segment is limited.
    Type: Application
    Filed: May 18, 2007
    Publication date: November 22, 2007
    Applicant: MEMC ELECTRONIC MATERIALS, INC.
    Inventor: Milind S. Kulkarni
  • Patent number: 7294197
    Abstract: Metallurgical grade silicon or high purity silicon beads developed from a fluidized bed process are melted in a cooled aluminum crucible, such that a non wetted interface is created between the molten silicon and a cooled supporting substrate that includes a surface layer of substantially inert aluminum oxide. It is believed that the molten silicon does not wet the surface of the supporting substrate and the surface of the supporting substrate does not chemically interact with the silicon. It is shown that, in spite of the enormous temperature difference, molten silicon (ca. 1450° C.) can be stabilized, by appropriate energy control, in direct (but non-wetted) contact with cold (ca. 40° C.) material such as aluminum.
    Type: Grant
    Filed: August 13, 2004
    Date of Patent: November 13, 2007
    Inventor: Nicholas Gralenski
  • Patent number: 7132091
    Abstract: A single crystal silicon ingot having a constant diameter portion that contains arsenic dopant atoms at a concentration which results in the silicon having a resistivity that is less than about 0.003 ?·cm.
    Type: Grant
    Filed: September 27, 2002
    Date of Patent: November 7, 2006
    Assignee: MEMC Electronic Materials, Inc.
    Inventors: Milind Kulkarni, Mohsen Banan, Christopher V. Luers
  • Patent number: 7067006
    Abstract: A method of forming a single crystalline structure having a substantially linear response at least over the wave lengths of 1,200 to 1,700 nanometers, the resulting structure and its use as an optical media or a barrier coating. Thus, maximum obtainable optical transmission with zero attenuation is provided. There is no intrinsic material absorption.
    Type: Grant
    Filed: October 5, 2002
    Date of Patent: June 27, 2006
    Assignee: CZT Inc.
    Inventor: Susana Curatolo
  • Patent number: 7025827
    Abstract: A doped semiconductor wafer of float zone-pulled semiconductor material contains a dopant added to a molten material and has a radial macroscopic resistance distribution of less than 12% and striations of ?10% to +10%. There is also a process for producing a doped semiconductor wafer by float zone pulling of a single crystal and dividing up the single crystal, in which process, during the float zone pulling, a molten material which is produced using an induction coil is doped with a dopant. It is exposed to at least one rotating magnetic field and is solidified. The single crystal which is formed during the solidification of the molten material is rotated. The single crystal and the magnetic field are rotated with opposite directions of rotation and the magnetic field has a frequency of 400 to 700 Hz.
    Type: Grant
    Filed: April 10, 2003
    Date of Patent: April 11, 2006
    Assignee: Siltronic AG
    Inventors: Rolf Knobel, Wilfried Von Ammon, Janis Virbulis, Manfred Grundner
  • Patent number: 6969425
    Abstract: Layers of boron-doped silicon having reduced out-of-plane curvature are disclosed. The layers have substantially equal concentrations of boron near the top and bottom surfaces. Since the opposing concentrations are substantially equal, the compressive stresses on the layers are substantially balanced, thereby resulting in layers with reduced out-of-plane curvature.
    Type: Grant
    Filed: January 17, 2003
    Date of Patent: November 29, 2005
    Assignee: Honeywell International Inc.
    Inventors: Cleopatra Cabuz, Max C. Glenn, Francis M. Erdmann, Robert D. Horning
  • Patent number: 6946029
    Abstract: An inexpensive sheet with excellent evenness and a desired uniform thickness can be obtained by cooling a base having protrusions, dipping the surfaces of the protrusions of the cooled base into a melt material containing at least one of a metal material and a semiconductor material for crystal growth of the material on the surfaces of the protrusions. In addition, by rotating a roller having on its peripheral surface protrusions and a cooling portion for cooling said protrusions, the surfaces of the cooled protrusions can be dipped into a melt material containing at least one of a metal material and a semiconductor material for crystal growth of the material on the surfaces of the protrusions. Thus, a sheet with a desired uniform thickness can be obtained without slicing process.
    Type: Grant
    Filed: February 25, 2004
    Date of Patent: September 20, 2005
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Yoshihiro Tsukuda, Hiroshi Taniguchi, Kozaburou Yano, Kazuto Igarashi, Hidemi Mitsuyasu, Tohru Nunoi
  • Patent number: 6905771
    Abstract: A silicon wafer is doped with boron and germanium in a range that satisfies a relational expression defined by: ?0.8×10?3?4.64×10?24×[Ge]?2.69×10?23×[B]?1.5×10?3. This can reduce the miss-fit dislocation which might be induced when an epitaxial layer is grown over the silicon wafer that has been added with boron in high concentration. It is to be noted that in the above relational expression, the [B] denotes a boron concentration, while the [Ge] denotes a germanium concentration and a concentration unit is indicated by atoms/cm3.
    Type: Grant
    Filed: November 10, 2003
    Date of Patent: June 14, 2005
    Assignee: Sumitomo Mitsubishi Silicon Corporation
    Inventors: Toshiaki Ono, Tadami Tanaka, Masataka Hourai
  • Patent number: 6878451
    Abstract: There are provided silicon single crystal, silicon wafer, and epitaxial wafer having a sufficient gettering effect suitable for a large-scale integrated device. The silicon single crystal which is suitable for an epitaxial wafer is grown with nitrogen doping at a concentration of 1×1013 atoms/cm3 or more, or with nitrogen doping at a concentration of 1×1012 atoms/cm3 and carbon doping at a concentration of 0.1×1016-5×1016 atoms/cm3 and/or boron doping at a concentration of 1×1017 atoms/cm3 or more. The silicon wafer is produced by slicing from the silicon single crystal, and an epitaxial layer is grown on a surface of the silicon wafer to produce the epitaxial wafer. The present invention provides an epitaxial wafer for a large-scale integrated device having no defects in a device-active region and having an excellent gettering effect without performance of an extrinsic or intrinsic gettering treatment, which is a factor for increasing the number of production steps and production costs.
    Type: Grant
    Filed: March 11, 2003
    Date of Patent: April 12, 2005
    Assignee: Sumitomo Mitsubishi Silicon Corporation
    Inventors: Eiichi Asayama, Masataka Horai, Hiroki Murakami, Takayuki Kubo
  • Patent number: 6866713
    Abstract: The present invention provides for a process for preparing a single crystal silicon ingot by the Czochralski method. The process comprises selecting a seed crystal for Czochralski growth wherein the seed crystal comprises vacancy dominated single crystal silicon.
    Type: Grant
    Filed: October 28, 2002
    Date of Patent: March 15, 2005
    Assignee: MEMC Electronic Materials, Inc.
    Inventors: Hariprasad Sreedharamurthy, Mohsen Banan
  • Patent number: 6780238
    Abstract: A silicon wafer is provided having controlled distribution of defects, in which denuded zones having a sufficient depth inward from the surface of the wafer are combined with a high gettering effect in a bulk region of the wafer. In the silicon wafer, oxygen precipitates, which act as intrinsic gettering sites, show vertical distribution. The oxygen precipitate concentration profile from the top to the bottom surfaces of the wafer includes first and second peaks at first and second predetermined depths from the top and bottom surfaces of the wafer, denuded zones between the top and bottom surfaces of the wafer and each of the first and second peaks, and a concave region between the first and second peaks, which corresponds to a bulk region of the wafer. For such an oxygen precipitate concentration profile, the wafer is exposed to a rapid thermal annealing process in a gas mixture atmosphere comprising ammonia (NH3) and argon (Ar) at temperatures below about 1200° C.
    Type: Grant
    Filed: September 4, 2002
    Date of Patent: August 24, 2004
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Jea-gun Park
  • Publication number: 20030175532
    Abstract: There are provided silicon single crystal, silicon wafer, and epitaxial wafer having a sufficient gettering effect suitable for a large-scale integrated device. The silicon single crystal which is suitable for an epitaxial wafer is grown with nitrogen doping at a concentration of 1×1013 atoms/cm3 or more, or with nitrogen doping at a concentration of 1×1012 atoms/cm3 and carbon doping at a concentration of 0.1×1016-5×1016 atoms/cm3 and/or boron doping at a concentration of 1×1017 atoms/cm3 or more. The silicon wafer is produced by slicing from the silicon single crystal, and an epitaxial layer is grown on a surface of the silicon wafer to produce the epitaxial wafer.
    Type: Application
    Filed: March 11, 2003
    Publication date: September 18, 2003
    Applicant: SUMITOMO METAL INDUSTRIES, LTD.
    Inventors: Eiichi Asayama, Masataka Horai, Hiroki Murakami, Takayuki Kubo
  • Patent number: 6620998
    Abstract: The invention teaches a method and apparatus for the generation of electric power by recycling the heat generated by various industrial processes. Thermophotovoltaic cells are used to convert the heat radiated from the industrial apparatus used to perform the various processes into electricity. Arrays of thermophotovoltaic cells placed around the apparatus, which may optionally be surrounded by an infrared (IR) emitter. The emitter serves to convert the IR radiation of the initial heat source into IR radiation having a more uniform wavelength. The cell arrays are spaced outward from a convection barrier tube and a short pass filter that may be placed around the IR emitter. A heat sink may be placed outside of the perimeter formed by the array of thermophotovoltaic cells, this serves to cool the thermophotovoltaic arrays, and also increases the power density of the cells, which in turn improves the power generation capacity of the array.
    Type: Grant
    Filed: October 25, 2001
    Date of Patent: September 16, 2003
    Assignee: SEH America, Inc.
    Inventor: Neil F. Salstrom
  • Patent number: 6607593
    Abstract: When a crystalline nucleus generated from an under-cooled silicon droplet is grown up to a mono-crystalline silicon ball, a critical under-cooling &Dgr;Tcr is determined in response to a diameter d of the silicon droplet so as to satisfy the relationships of (d=5 mm, &Dgr;Tcr=100K), (d=3 mm, &Dgr;Tcr=120K) and (d=1 mm, &Dgr;Tcr=150K). A crystal grown up from the crystalline nucleus at an under-cooling &Dgr;T less than the critical under-cooling &Dgr;Tcr is a mono-crystalline silicon ball with high quality free from cracks or twins.
    Type: Grant
    Filed: July 27, 2001
    Date of Patent: August 19, 2003
    Assignee: Agency of Industrial Science and Technology
    Inventors: Kazuhiko Kuribayashi, Tomotsugu Aoyama
  • Patent number: 6599603
    Abstract: The present invention provides a CZ silicon wafer, wherein the wafer includes rod-like void defects and/or plate-like void defects inside thereof, and a CZ silicon wafer, wherein the silicon wafer includes void defects inside the wafer, a maximum value of a ratio between long side length L1 and short side length L2 (L1/L2) in an optional rectangle circumscribed the void defect image projected on an optional {110} plane is 2.5 or more, and the silicon wafer including rod-like void defects and/or plate-like void defects inside the wafer, wherein a void defect density of the silicon wafer at a depth of from the wafer surface to at least 0.5 &mgr;m after the heat treatment is ½ or less than that of inside the wafer. According to this, the silicon wafer, which is suitable for expanding reducing effect of void defects by heat treatment up to a deeper region, can be obtained.
    Type: Grant
    Filed: October 24, 2000
    Date of Patent: July 29, 2003
    Assignee: Shin-Etsu Handotai Co., Ltd.
    Inventors: Masahiro Kato, Masaro Tamatsuka, Osamu Imai, Akihiro Kimura, Tomosuke Yoshida
  • Patent number: 6544656
    Abstract: A silicon wafer is produced by growing a silicon single crystal ingot having a resistivity of 100 &OHgr;·cm or more and an initial interstitial oxygen concentration of 10 to 25 ppma by the Czochralski method, processing the silicon single crystal ingot into a wafer, and subjecting the wafer to an oxygen precipitation heat treatment so that a residual interstitial oxygen concentration in the wafer should become 8 ppma or less. A silicon wafer produced as described above shows little decrease in resistivity even after a heat treatment in device production etc. Further, if a silicon wafer is produced and heat-treated so that the wafer should have the above-defined initial interstitial oxygen concentration and residual interstitial oxygen concentration, slip dislocations in a subsequent heat treatment process are prevented irrespective of resistivity.
    Type: Grant
    Filed: November 7, 2000
    Date of Patent: April 8, 2003
    Assignee: Shin-Etsu Handotai Co., Ltd.
    Inventors: Takao Abe, Ken Aihara, Shoji Akiyama, Tetsuya Igarashi, Weifeng Qu, Yoshinori Hayamizu, Shigeru Saito
  • Patent number: 6521827
    Abstract: An inexpensive sheet with excellent evenness and a desired uniform thickness can be obtained by cooling a base having protrusions, dipping the surfaces of the protrusions of the cooled base into a melt material containing at least one of a metal material and a semiconductor material for crystal growth of the material on the surfaces of the protrusions. In addition, by rotating a roller having on its peripheral surface protrusions and a cooling portion for cooling said protrusions, the surfaces of the cooled protrusions can be dipped into a melt material containing at least one of a metal material and a semiconductor material for crystal growth of the material on the surfaces of the protrusions. Thus, a sheet with a desired uniform thickness can be obtained without slicing process.
    Type: Grant
    Filed: November 29, 2000
    Date of Patent: February 18, 2003
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Yoshihiro Tsukuda, Hiroshi Taniguchi, Kozaburou Yano, Kazuto Igarashi, Hidemi Mitsuyasu, Tohru Nunoi
  • Patent number: 6472040
    Abstract: A silicon ingot is manufactured in a hot zone furnace by pulling the ingot from a silicon melt in the hot zone furnace in an axial direction, at a pull rate profile of the ingot from the silicon melt in the hot zone furnace that is sufficiently high so as to prevent interstitial agglomerates but is sufficiently low so as to confine vacancy agglomerates to a vacancy rich region at the axis of the ingot. The ingot so pulled is sliced into a plurality of semi-pure wafers each having a vacancy rich region at the center thereof that includes vacancy agglomerates and a pure region between the vacancy rich region and the wafer edge that is free of vacancy agglomerates and interstitial agglomerates.
    Type: Grant
    Filed: December 3, 1999
    Date of Patent: October 29, 2002
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jea-gun Park, Kyoo-chul Cho, Gon-sub Lee
  • Patent number: 6299681
    Abstract: A polycrystalline article is converted to a single crystal in a solid-state process. Heat is applied at a first end of the article to effect a predetermined spatial temperature profile thereat having a maximum temperature approaching a melting temperature thereof. The temperature profile is maintained to initiate conversion at the first end. The heat is moved along the article toward an opposite second end to correspondingly propagate the conversion along the article.
    Type: Grant
    Filed: November 27, 1998
    Date of Patent: October 9, 2001
    Assignee: General Electric Company
    Inventors: Farzin Homayoun Azad, Marshall Gordon Jones
  • Patent number: 6287381
    Abstract: An optical dome or window formed of a composition which is transmissive to infrared frequencies in the range of from about 1 micron to about 14 microns and which is relatively opaque to substantially all frequencies above about 14 microns consisting essentially of a compound taken from the class consisting of group III-V compounds doped with an element taken from the class consisting of shallow donors and having less than about 1×107 atoms/cc impurities and having less than about 1×1015 parts carbon. The shallow donors are Se, Te and S, preferably Se, with the Se concentration from 5×1015 atoms/cc to 2×106 atoms/cc. The group III-V compound is preferably GaAs or GaP.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: September 11, 2001
    Assignee: Raytheon Company
    Inventor: Paul Klocek
  • Patent number: 6284384
    Abstract: This invention is directed to a novel a single crystal silicon wafer. The wafer comprises: (a) two major generally parallel surfaces (ie., the front and back surfaces); (b) a central plane between and parallel to the front and back surfaces; (c) a front surface layer which comprises the region of the wafer extending a distance of at least about 10 &mgr;m from the front surface toward the central plane; and (d) a bulk layer which comprises the region of the wafer extending from the central plane to the front surface layer.
    Type: Grant
    Filed: February 16, 1999
    Date of Patent: September 4, 2001
    Assignee: MEMC Electronic Materials, Inc.
    Inventors: Gregory M. Wilson, Jon A. Rossi, Charles C. Yang
  • Patent number: 6174365
    Abstract: Provided are an apparatus and a method which can accelerate crystallization of a biological macromolecule such as protein. A plurality of solution storage parts are formed on a silicon substrate whose valence electrons are controlled by controlling the concentration and/or the type of impurity. These solution storage parts are connected with each other by passages. The storage part is made to hold a buffer solution containing molecules of protein or the like to be crystallized. The storage parts are also made to hold solutions capable of accelerating crystallization of protein or the like respectively. These solutions are shifted to the solution storage part through the passages for preparing a mixed solution in a different ratio in each storage part. Thus, different conditions for crystallization can be simultaneously formed in a short time with a small amount of sample. A crystal of protein or the like is grown in the storage part holding the mixed solution.
    Type: Grant
    Filed: January 6, 1999
    Date of Patent: January 16, 2001
    Assignee: Sumitomo Metal Industries, Ltd.
    Inventor: Akira Sanjoh
  • Patent number: 6120602
    Abstract: An apparatus and a method for producing single crystal semiconductor particulate in near spherical shape and the particulate product so formed is accomplished by producing uniform, monosized, near spherical droplets; identifying the position of an undercooled droplet in a nucleation zone; and seeding the identified droplet in the nucleation zone to initiate single crystal growth in the droplet.
    Type: Grant
    Filed: December 28, 1999
    Date of Patent: September 19, 2000
    Assignee: Starmet Corporation
    Inventors: Matthew D. Stephens, Steven A. Miller, Jessica Belcher
  • Patent number: 6106614
    Abstract: An apparatus and a method for producing single crystal semiconductor particulate in near spherical shape and the particulate product so formed is accomplished by producing uniform, monosized, near spherical droplets; identifying the position of an undercooled droplet in a nucleation zone; and seeding the identified droplet in the nucleation zone to initiate single crystal growth in the droplet.
    Type: Grant
    Filed: October 15, 1998
    Date of Patent: August 22, 2000
    Assignee: Starmet Corp
    Inventors: Matthew D. Stephens, Steven A. Miller, Jessica Belcher
  • Patent number: 6096128
    Abstract: A germanium layer 19 is melted on top of a starting polycrystalline silicon ingot 18, at a temperature below the melting point of pure silicon. Silicon is dissolved at the interface and floats to the top of the germanium melt to form a silicon melt layer 11, from which a crystal 20 can be drawn. The process permits the production of large diameter crystal with low oxygen content and no more than one percent germanium.
    Type: Grant
    Filed: June 5, 1998
    Date of Patent: August 1, 2000
    Assignees: Toshiba Ceramics Co., Ltd., Komatsu Electronic Metals Co., Ltd., Japan Science and Technology Corporation, Mitsubishi Materials Silicon corporation
    Inventors: Hideo Nakanishi, Susumu Maeda, Keisei Abe, Kazutaka Terashima
  • Patent number: 5891828
    Abstract: PrBa.sub.2 Cu.sub.3 O.sub.Y exhibiting superconductivity is provided by a method including the steps of preparing a solvent consisting of a mixture of praseodymium oxide, at least one of barium oxide and barium carbonate, and copper oxide at a mixing ratio of between 1:3:5 and 1:8:20, disposing the solvent between a feed rod of PrBa.sub.2 Cu.sub.3 O.sub.7 formed to a high density and a seed crystal, heating the solvent to a temperature of 880.degree.-980.degree. C. in an atmosphere of an inert gas of at least one of argon and nitrogen mixed with 0.01-2% oxygen to form a floating solvent zone, moving the floating solvent zone toward the feed rod at 0.1-1.0 mm/hr under a temperature gradient at the solid-liquid interface of 25.degree.-35.degree. C./mm to precipitate single crystal on the seed crystal, and heat-treating the single crystal obtained in an atmosphere containing not less than 15% oxygen. Another aspect of the invention provides a superconducting device including the superconducting PrBa.sub.2 Cu.
    Type: Grant
    Filed: March 26, 1997
    Date of Patent: April 6, 1999
    Assignee: Agency of Industrial Science & Technology, Ministry of International Trade & Industry
    Inventors: Kunihiko Oka, Zhigang Zou, Toshimitsu Ito, Hiroshi Akoh
  • Patent number: 5795382
    Abstract: A method for controlling oxygen precipitation (106) in a silicon crystal (12) grown according to the Czochralski silicon crystal growing technique which includes the steps of forming a cylindrical portion (22) of the silicon crystal (12) from a reservoir of molten silicon (24) according to the Czochralski silicon crystal growing technique. The method includes the steps of terminating the Czochralski silicon crystal growing technique by forming a first tapered portion (101) in silicon crystal (12) at a predetermined rate. A second tapered portion (102) includes a cascaded middle portion (108) that connects to the first tapered portion (101) and that concentrates oxygen precipitation (106) within cascaded middle portion (108) and away from the cylindrical portion (22) of silicon crystal (12). At least a third tapered portion (104) is formed for separating silicon crystal (12) from molten silicon (24).
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: August 18, 1998
    Assignee: Texas Instruments Incorporated
    Inventors: Weldon J. Bell, H. Michael Grimes
  • Patent number: 5785753
    Abstract: In a single-crystal manufacturing method, after a single crystal is grown, the crystal is separated from the molten melt and gradually cooled while suspended immediately above the surface of the melt. During this cooling, a measure, which produces solidification of the melt, is locally applied. As a result, the solidification of the melt is selectively forced so that at least the melt forms a crust and prevents the crystal, should it fall, from becoming immersed in molten melt. This measure also protects the crystal from any sudden release of heat such as tends to occur if the melt becomes supercooled prior to the onset of crystallization.
    Type: Grant
    Filed: November 9, 1995
    Date of Patent: July 28, 1998
    Assignee: Sony Corporation
    Inventors: Yasujiro Taguchi, Tsutomu Okamoto
  • Patent number: 5766342
    Abstract: The method for forming a silicon film of this invention includes the steps of introducing a compound containing silicon and chlorine and being in a liquid form under normal pressure and at an ordinary temperature into a reaction chamber, and spraying the compound in the liquid form in a fine particle state to a surface of a substrate supported in the reaction chamber, and decomposing the compound in the fine particle state by energy applied from outside of the reaction chamber, and depositing a silicon film on the substrate supported in the reaction chamber.
    Type: Grant
    Filed: October 17, 1995
    Date of Patent: June 16, 1998
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Munehiro Shibuya, Masatoshi Kitagawa, Yuji Mukai, Takashi Hirao, Akihisa Yoshida
  • Patent number: 5728211
    Abstract: A silicon single crystal having low defects, such as flow pattern defects and laser scattering tomography defects, and high dielectric breakdown strength in oxides and a method of producing the same using the Czochralski technique comprising steps of adjusting a first passage time of a growing crystal for a first temperature range of the melting point to 1,200.degree. C. so as to be 190 min. or shorter and adjusting a second passage time thereof for a second temperature range of 1,150.degree. C. to 1,080.degree. C. so as to be 60 min. or longer during crystal growth.
    Type: Grant
    Filed: June 3, 1996
    Date of Patent: March 17, 1998
    Assignee: Shin-Etsu Handotai Co., Ltd.
    Inventors: Kiyotaka Takano, Kouji Kitagawa, Eiichi Iino, Masanori Kimura, Hirotoshi Yamagishi, Masahiro Sakurada
  • Patent number: 5612251
    Abstract: In a manufacturing method and device for a polycrystalline silicon, the manufacturing method forms amorphous silicon on the substrate, and an adiabatic layer between substrate and amorphous silicon if needed. The amorphous silicon is preliminarily heated and melted, and is evenly supplied with heat when the amorphous silicon is re-crystallized, to thereby slow down the re-crystallization. Also, a manufacturing device has first and second light sources for supplying an optical energy to a-Si formed on substrate. A uniformed and large sized grain can be formed, and specifically, cost reduction is possible since the general glass substrate can be used.
    Type: Grant
    Filed: September 15, 1995
    Date of Patent: March 18, 1997
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Jae-won Lee
  • Patent number: 5431126
    Abstract: A thin semiconductor film having at least one an edge is formed on a base whose material is different from the material of the thin semiconductor film. A laser beam, for example, is applied to the semiconductor film thereby to melt the semiconductor film including the edge for thereby beading the edge upwardly. The melted semiconductor film including the edge is solidified and hence recrystallized into a semiconductor crystal. A plurality of spaced reflecting films may be formed on the thin semiconductor film before the laser beam is applied. Various semiconductor devices including a thin-film transistor, a solar cell, and a bipolar transistor may be fabricated of the semiconductor crystal.
    Type: Grant
    Filed: June 22, 1993
    Date of Patent: July 11, 1995
    Assignee: Sony Corporation
    Inventors: Toshiyuki Sameshima, Masaki Hara, Naoki Sano, Gosain D. Pal, Atsushi Kono, Jonathan Westwater, Setsuo Usui
  • Patent number: 5397735
    Abstract: The invention relates to the "hardening" (resistance to ionizing radiations) of MOS-type components. In order to avoid the effects of these radiations (creation of electron-hole pairs), there is deposited on a substrate (1) of monocrystalline Si a layer of YSZ (2), and then a thin layer of monocrystalline Si (3). The other steps of production of the components are the same as conventional.
    Type: Grant
    Filed: July 27, 1990
    Date of Patent: March 14, 1995
    Assignee: Thomson-CSF
    Inventors: Louis Mercandalli, Didier Pribat, Bernard Dessertenne, Leonidas Karapiperis, Dominique Dieumegard
  • Patent number: 5392729
    Abstract: A method of producing a silicon single crystal, in which a cylindrical partition is immersed in a molten pure silicon liquid or molten silicon liquid containing a Sb dopant within a crucible and the molten liquid inside the partition is pulled up from the crucible to produce the silicon single crystal, wherein an interval between a lower end of the partition and a crucible bottom is changed to control an oxygen concentration in the pulling-up silicon single crystal. The interval is reduced in the case where the oxygen concentration in the pulling-up silicon single crystal is to be increased while the interval is increased in the case where the oxygen concentration is to be reduced.
    Type: Grant
    Filed: September 26, 1990
    Date of Patent: February 28, 1995
    Assignees: Osaka Titanium Co., Ltd., Kyushu Electronic Metal Co., Ltd.
    Inventors: Kaoru Kuramochi, Makoto Ito, Kiichiro Kitaura
  • Patent number: 5381753
    Abstract: A fabrication method provides fine structures which have few carrier trap centers and light absorption levels and find applications in quantum wires and quantum boxes having arbitrary configurations at least within a two-dimensional plane. The fabrication method comprises the steps of having a sharp tip held in close proximity to the surface of a substrate 1 and having a metal constituting the tip evaporated from the top. Alternatively, a metal contained in ambient vapor or a solution decomposed by a tunnel current or the like is provided. The metal is deposited locally on the substrate surface. A finely structured crystal is grown on the locally deposited region by a vapor phase-liquid phase-solid phase reaction.
    Type: Grant
    Filed: April 30, 1993
    Date of Patent: January 17, 1995
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Michio Okajima, Osamu Kusumoto, Takao Tohda, Kazuo Yokoyama, Motoshi Shibata
  • Patent number: 5379712
    Abstract: A method of epitaxially growing a surface layer on a substrate including the steps of coating the substrate surface, with a meltable film, melting the film and implanting ions into he melted film, to deposit ion material onto the coated substrate surface.
    Type: Grant
    Filed: April 26, 1993
    Date of Patent: January 10, 1995
    Assignee: Implant Sciences Corporation
    Inventors: Anthony J. Armini, Stephen N. Bunker
  • Patent number: 5336360
    Abstract: A method of making pure fibers from a parent material utilizing laser energy. A short wavelength laser is used to achieve a diffraction limited focal spot diameter that is smaller than the diameter of the growing fiber. Focused laser beam convergence is used to obtain a fiber growth rate that depends on the fiber tip portion such that the fiber growth rate achieves a value equal to the controlled fiber pulling rate. The present invention achieves vapor-liquid-solid growth of single crystal silicon fibers and whiskers from silane gas and permits the use of other materials in the production of fibers by the vapor-liquid-solid process. The method provides an increase in the allowable ambient pressure and growth temperature and a large and more energy efficient growth velocity as compared to carbon dioxide based laser beam technology.
    Type: Grant
    Filed: February 13, 1992
    Date of Patent: August 9, 1994
    Assignee: Clemson University
    Inventor: Paul C. Nordine