Gallium Phosphide Containing {c30b 29/44} Patents (Class 117/955)
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Patent number: 8834628Abstract: A method is described for the manufacture of semiconductor nanoparticles. Improved yields are obtained by use of a reducing agent or oxygen reaction promoter.Type: GrantFiled: December 23, 2009Date of Patent: September 16, 2014Assignee: Life Technologies CorporationInventors: Donald A. Zehnder, Joseph Treadway
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Patent number: 8231728Abstract: An epitaxial growth method forming a semiconductor thin film including a heterojunction of a group III-V compound semiconductor by means of molecular beam epitaxy. The method is configured to include: a first step of irradiating a molecular beam of at least one of group III elements and a molecular beam of a first group V element to form a first compound semiconductor layer; a second step of stopping the irradiation of the molecular beam of the group III element and the molecular beam of the first group V element to halt growth until an amount of the first group V element supplied is reduced to 1/10 or less of a supply of the first group V element in the first step; and a third step of irradiating a molecular beam of at least one of the group III elements and a molecular beam of a second group V element to form a second compound semiconductor layer, which is different from the first compound semiconductor, on the first compound semiconductor layer.Type: GrantFiled: April 28, 2004Date of Patent: July 31, 2012Assignee: Nippon Mining & Metals Co., Ltd.Inventors: Misao Takakusaki, Susumu Kanai
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Patent number: 7147712Abstract: A method is described for the manufacture of semiconductor nanoparticles. Improved yields are obtained by use of a reducing agent or oxygen reaction promoter.Type: GrantFiled: October 1, 2002Date of Patent: December 12, 2006Assignee: Invitrogen CorporationInventors: Donald A. Zehnder, Joseph A. Treadway
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Patent number: 6936103Abstract: A method of suppression of Indium carry-over in the MOCVD growth of thin InGaAsP quantum wells, with low Indium content, on top of thick GaInAsP, with high Indium content. These quantum wells are essential in the stimulated emission of 808 to 880 nm phosphorous-based laser structures. The Indium carryover effect is larger in large multi wafer reactors and therefore is this invention focused on large multiwafer MOCVD reactors. This invention improves the quality of the quantum well, as measured by photo-luminescence spectra and uniformity of wavelength radiation.Type: GrantFiled: April 11, 2003Date of Patent: August 30, 2005Assignee: Spectra-Physics, Inc.Inventor: Frank Reinhardt
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Patent number: 6911079Abstract: The resistivity of a p-doped III-V or a p-doped II-VI semiconductor material is reduced. The reduction of resistivity of the p-type III-V or a II-VI semiconductor material is achieved by applying an electric field to the semiconductor material. III-V nitride-based light emitting diodes are prepared.Type: GrantFiled: April 19, 2002Date of Patent: June 28, 2005Assignee: Kopin CorporationInventors: Peter Rice, Schang-Jing Hon, Alexander Wang, Kevin O'Connor
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Patent number: 6884291Abstract: An optical semiconductor device operable in a 0.6 ?m band includes an active layer of GaInNP sandwiched by a pair of GaInP layers each having a thickness of about 2 molecular layers or less.Type: GrantFiled: September 8, 1999Date of Patent: April 26, 2005Assignee: Ricoh Company, Ltd.Inventors: Naoto Jikutani, Shunichi Sato, Takashi Takahashi
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Patent number: 6805744Abstract: A method of forming a semiconductor structure including providing a single crystal semiconductor substrate of GaP, and fabricating a graded composition buffer including a plurality of epitaxial semiconductor Inx(AlyGa1−y)1−xP alloy layers. The buffer includes a first alloy layer immediately contacting the substrate having a lattice constant that is nearly identical to that of the substrate, subsequent alloy layers having lattice constants that differ from adjacent layers by less than 1%, and a final alloy layer having a lattice constant that is substantially different from the substrate. The growth temperature of the final alloy layer is at least 20° C. less than the growth temperature of the first alloy layer.Type: GrantFiled: December 13, 2001Date of Patent: October 19, 2004Assignee: Massachusetts Institute of TechnologyInventors: Andrew Y. Kim, Eugene A. Fitzgerald
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Patent number: 6682596Abstract: Nanocrystals are synthesized with a high degree of control over reaction conditions and hence product quality in a flow-through reactor in which the reaction conditions are maintained by on-line detection of characteristic properties of the product and by adjusting the reaction conditions accordingly. The coating of nanocrystals is achieved in an analogous manner.Type: GrantFiled: December 26, 2001Date of Patent: January 27, 2004Assignee: Quantum Dot CorporationInventors: Donald A. Zehnder, Marcel P. Bruchez, Joseph A. Treadway, Jonathan P. Earhart
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Publication number: 20010047751Abstract: A method of forming a semiconductor structure including providing a single crystal semiconductor substrate of GaP, and fabricating a graded composition buffer including a plurality of epitaxial semiconductor Inx(AlyGa1-y)1-xP alloy layers. The buffer includes a first alloy layer immediately contacting the substrate having a lattice constant that is nearly identical to that of the substrate, subsequent alloy layers having lattice constants that differ from adjacent layers by less than 1%, and a final alloy layer having a lattice constant that is substantially different from the substrate. The growth temperature of the final alloy layer is at least 20° C. less than the growth temperature of the first alloy layer.Type: ApplicationFiled: November 24, 1999Publication date: December 6, 2001Inventors: ANDREW Y. KIM, EUGENE A. FITZGERALD
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Patent number: 6294018Abstract: The specification describes a lithographic technique in which alignment marks are defined in a first semiconductor layer and the alignment marks are then covered with a protective SiO2 layer. After subsequent semiconductor layer growth steps, which selectively deposit on the former semiconductor layer but not on the protective layer, the alignment marks remain undistorted and visible to the exposure tool for subsequent processing.Type: GrantFiled: September 15, 1999Date of Patent: September 25, 2001Assignee: Lucent TechnologiesInventors: Robert Alan Hamm, Rose Fasano Kopf, Christopher James Pinzone, Robert William Ryan, Alaric Tate
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Patent number: 6294019Abstract: In the present method, a group III-V compound semiconductor wafer includes a substrate consisting of a group III-V compound whose outer peripheral edge portion is so chamfered that its section has an arcuate shape substantially with a radius R, and an epitaxial layer consisting of a group III-V compound layer formed on the substrate. A portion of the wafer is removed at the outer peripheral edge thereof, up to a distance L from the original peripheral edge, and the distance L satisfies the expression R≦L≦3L. thereby an abnormally grown part of the epitaxial layer is reliably removed.Type: GrantFiled: June 6, 2000Date of Patent: September 25, 2001Assignee: Sumitomo Electric Industries, Ltd.Inventors: Yoshiki Miura, Toshiyuki Morimoto
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Patent number: 6231668Abstract: A method for manufacturing and calibrating a scale in the nanometer range for technical devices which are used for the high-resolution or ultrahigh-resolution imaging of structures, and such a scale. To construct the scale, at least two different crystalline or amorphous materials are used, which, when imaged, are easily distinguished from one another by their contrast. These material layers are deposited using a suitable material deposition method as a heterolayer sequence onto a substrate material. The produced heterolayer sequence is characterized experimentally using an analysis method that is sensitive to the individual layer thicknesses of the heterolayer sequence. The data obtained from the analysis method are evaluated and recorded. The layer structure is exposed by splitting open the heterolayer sequence in the deposition direction.Type: GrantFiled: February 6, 1997Date of Patent: May 15, 2001Assignee: Deutsche Telekom AGInventors: Rainer Loesch, Hartmut Hillmer, Winfried Schlapp, Armin Poecker, Walter Betz, Rainer Goebel
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Patent number: 6048397Abstract: A GaAsP epitaxial wafer 10 which has a GaAs.sub.1-x P.sub.x (0.45<x<1) constant nitrogen concentration layer 6 formed by doping a constant composition layer with nitrogen wherein the constant nitrogen concentration layer 6 has the following upper and lower limits of nitrogen concentration:Upper limit: N=(6.25x-1.125).times.10.sup.18 cm.sup.-3Lower limit: N=(5x-1.5).times.10.sup.18 cm.sup.Type: GrantFiled: December 29, 1997Date of Patent: April 11, 2000Assignee: Shin-Etsu Handotai Co., Ltd.Inventors: Masahisa Endo, Masataka Watanabe, Tsuneyuki Kaise, deceased
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Patent number: 6036772Abstract: A method for making a semiconductor device comprises: depositing at least one Group II-VI compound semiconductor layer comprising at least one Group II element selected from the group consisting of zinc, magnesium, manganese, beryllium, cadmium and mercury and at least one Group VI element selected from the group consisting of oxygen, sulfur, selenium and tellurium onto a Group III-V compound semiconductor layer comprising at least one Group III element selected from the group consisting of gallium, aluminum, boron and indium and at least one Group V element selected from the group consisting of nitrogen, phosphorus, arsenic, antimony and bismuth; whereinbefore depositing the Group II-VI compound semiconductor layer, a particle beam composed of at least one Group II element selected from the group consisting of zinc, magnesium, beryllium, cadmium and mercury is radiated onto the Group III-V compound semiconductor layer in a dose of 8.times.10.sup.-4 Torr.multidot.sec or more.Type: GrantFiled: December 29, 1997Date of Patent: March 14, 2000Assignee: Sony CorporationInventors: Tomonori Hino, Satoshi Taniguchi, Satoshi Ito
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Patent number: 6036771Abstract: In a method of manufacturing an optical semiconductor device having a semiconductor substrate, an optical waveguide formed by a semiconductor layer is formed on the semiconductor substrate by the use of the selective metal-organic vapor phase epitaxy including source materials. The source materials are intermittently supplied in the selective metal-organic vapor phase epitaxy.Type: GrantFiled: September 29, 1998Date of Patent: March 14, 2000Assignee: NEC CorporationInventor: Yasutaka Sakata
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Patent number: 5895706Abstract: An epitaxial structure for a GaP light-emitting diode comprises an n-type GaP single crystal substrate on which is formed a plural buffer layer epitaxially grown on the single crystal substrate, in which the buffer layer has a lower etch pit density than the etch pit density of the single crystal substrate, etch pit density decreases with each upper layer, and a GaP active layer is formed on the buffer layer.Type: GrantFiled: April 17, 1997Date of Patent: April 20, 1999Assignee: Showa Denko K.K.Inventor: Atsushi Yoshinaga
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Patent number: 5716449Abstract: An optical dome or window formed of a composition which is transmissive to infrared frequencies in the range of from about 1 micron to about 14 microns and which is relatively opaque to substantially all frequencies above about 14 microns consisting essentially of a compound taken from the class consisting of group III-V compounds doped with an element taken from the class consisting of shallow donors and having less than about 1.times.10.sup.7 atoms/cc impurities and having less than about 1.times.10.sup.15 parts carbon. The shallow donors are Se, Te and S, preferably Se, with the Se concentration from 5.times.10.sup.15 atoms/cc to 2.times.10.sup.16 atoms/cc. The group III-V compound is preferably GaAs or GaP.Type: GrantFiled: June 7, 1995Date of Patent: February 10, 1998Assignee: Texas Instruments IncorporatedInventor: Paul Klocek
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Patent number: 5599389Abstract: According to this invention, there is provided a compound semiconductor substrate including, on a compound semiconductor base containing a high-concentration impurity, a high-resistance single-crystal layer consisting of the same compound semiconductor as the compound semiconductor constituting the base. Active elements are formed in the high-resistance single-crystal layer.Type: GrantFiled: November 14, 1994Date of Patent: February 4, 1997Assignee: Kabushiki Kaisha ToshibaInventor: Hiroshi Iwasaki
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Patent number: 5571321Abstract: This disclosure herein pertains to a method for producing a GaP epitaxial wafer used for fabrication of light emitting diodes having higher brightness than light emitting diodes fabricated from a GaP epitaxial wafer produced by a conventional method have. The method comprises the steps of: preparing a GaP layered substrate 15 with one or more GaP layers on a GaP single crystal substrate 10 in the first series of liquid phase epitaxial growth; obtaining a layered GaP substrate 15a by eliminating surface irregularities of said GaP layered substrate 15 by mechano-chemical polishing to make the surface to be planar; and then forming a GaP light emitting layer composite 19 on said layered GaP substrate 15a in the second series of liquid phase epitaxial growth.Type: GrantFiled: October 20, 1994Date of Patent: November 5, 1996Assignee: Shin-Etsu Handotai Co., Ltd.Inventors: Munehisa Yanagisawa, Yuuki Tamura, Susumu Arisaka, Hidetoshi Matsumoto
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Patent number: 5538702Abstract: A method for the treatment of a stream of exhaust gases including phosphine in which the stream is heated to a sufficiently high temperature to decompose the phosphine to phosphorus vapor and the stream is then passed into a reactor containing calcium oxide heated to above about 100.degree. C. An oxygen containing stream is also passed into the reactor.Type: GrantFiled: February 8, 1994Date of Patent: July 23, 1996Assignee: The BOC Group plcInventors: James R. Smith, Peter L. Timms
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Patent number: 5342475Abstract: Disclosed is a method of growing a single crystal of a compound semiconductor, in which a compound semiconductor material is loaded in a vertical crucible and the compound semiconductor material is converted into a single crystal by utilizing a seed disposed in the center of the bottom portion of the vertical crucible.Type: GrantFiled: June 3, 1992Date of Patent: August 30, 1994Assignee: The Furukawa Electric Co., Ltd.Inventors: Seikoh Yoshida, Toshio Kikuta
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Patent number: 5338389Abstract: In a method of epitaxially growing a compound crystal, a plurality of crystal component gasses of a compound and reaction gas chemically reacting with the crystal component gasses are individually directed, in the predetermined order, onto a substrate crystal heated under vacuum. The crystal compound gasses and the reaction gas may be overlapped with each other. In a doping method in the above-described epitaxial growth method, the crystal component gasses and the compound gas of dopant are directed onto the substrate crystal and, subsequently, reaction gas, which chemically reacts with the compound gasses, is directed onto the substrate crystal. Also in this case, the reaction gas may be in overlapped relation to the component gas of dopant.Type: GrantFiled: April 21, 1993Date of Patent: August 16, 1994Assignee: Research Development Corporation of JapanInventors: Jun-ichi Nishizawa, Toru Kurabayashi
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Patent number: 5312506Abstract: There is here provided a method for growing single crystals from a melt which comprises the steps of preparing a double structure crucible constituted of an inner tube and an outer tube; placing a raw material in the inner tube; hermetically sealing the outer tube; and heating/melting the raw material to perform crystal growth.According to the present invention, it is possible to hermetically confine and to crystallize the raw material even at a high temperature.Type: GrantFiled: September 21, 1992Date of Patent: May 17, 1994Assignee: Mitsui Mining Company, LimitedInventor: Akira Omino