Masks, Special Patents (Class 148/DIG106)
  • CMOS process for fabricating integrated circuits, particularly dynamic memory cells with storage capacitors
    Patent number: 4536947
    Abstract: A CMOS process is described which is particularly suited for forming dynamic memory cells. The cells are formed in an n-well and a single plate member formed from a first layer of polysilicon is used for the entire array. Unique etching of the first polysilicon layer prevents stringers from occurring when the second layer of polysilicon is deposited. A tri-layer dielectric is used for the capacitors in the array. Novel "rear-end" processing is disclosed using a phosphorus doped glass.
    Type: Grant
    Filed: July 2, 1984
    Date of Patent: August 27, 1985
    Assignee: Intel Corporation
    Inventors: Mark T. Bohr, Ken K. Yu, Leo D. Yau, Shyam G. Garg