Varying Dimension Patents (Class 174/552)
  • Patent number: 11264309
    Abstract: A semiconductor package includes at least one die attach pad of a leadframe, at least one semiconductor die mounted on the at least one die attach pad; and a plurality of lead terminals disposed around the at least one die attach pad and electrically connected to respective input/output (I/O) pads on the at least one semiconductor die through a plurality of bond wires. The plurality of lead terminals comprises first lead terminals, second lead terminals, and third lead terminals, which are arranged in triple row configuration along at least one side of the semiconductor package. Each of the first lead terminals, second lead terminals, and third lead terminals has an exposed base metal on a cut end thereof.
    Type: Grant
    Filed: May 6, 2020
    Date of Patent: March 1, 2022
    Assignee: MEDIATEK INC.
    Inventor: Chin-Chiang Chang
  • Patent number: 9795041
    Abstract: An electronic device packaging box includes a first base, a second base and a connecting unit. The first base includes two side walls spaced apart from each other in a first direction and each having a first side receiving space, and a connecting wall interconnecting the side walls to define a receiving space. The second base is received in the receiving space, and includes spaced-apart top and bottom walls, and a separating wall interconnecting the top and bottom walls to define two second side receiving spaces. The connecting unit includes two first connecting subunits, each of which is mounted to a respective one of the side walls, and two second connecting subunits, which are mounted to the bottom wall.
    Type: Grant
    Filed: December 7, 2016
    Date of Patent: October 17, 2017
    Assignee: BOTHHAND ENTERPRISE INC.
    Inventors: Yung-Ming Pan, Chung-Cheng Fan
  • Patent number: 8643158
    Abstract: A semiconductor package is assembled using first and second lead frames. The first lead frame includes a die flag and the second lead frame includes lead fingers. When the first and second lead frames are mated, the lead fingers surround the die flag. Side surfaces of the die flag are partially etched to form an extended die attach surface on the die flag, and portions of the top surface of each of the lead fingers also are partially etched to form lead finger surfaces that are complementary with the etched side surfaces of the die flag. A semiconductor die is attached to the extended die attach surface and bond pads of the semiconductor die are electrically connected to the lead fingers. An encapsulating material covers the die, electrical connections, and top surfaces of the die flag and lead fingers.
    Type: Grant
    Filed: March 7, 2012
    Date of Patent: February 4, 2014
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Peng Liu, Qingchun He, Ping Wu
  • Patent number: 8487197
    Abstract: An electrical fitting having a gripping device with a plurality of gripping tabs forming a helix or spiral. The gripping tabs have a twist creating increased pullout resistance and easier disassembly. The electrical fitting permits electrical metallic tubing or EMT to be quickly attached to and removed from the electrical fitting without disassembling the fitting or cutting the tubing. A body with a locking end having a plurality of griping tabs receives an end of the tubing pushed into the fitting. The gripping tabs securely hold the tubing preventing loosening or removal. The helix or spiral and twist formation of the griping tabs permits easy removal of the tubing by rotating the tubing counter-clockwise.
    Type: Grant
    Filed: November 30, 2011
    Date of Patent: July 16, 2013
    Assignee: Bridgeport Fittings, Inc.
    Inventor: Lawrence J. Smith
  • Patent number: 8466378
    Abstract: A snap tight electrical connector for securing and grounding an electrical cable or conduit to a junction box. The electrical connector includes a one-piece, electrically conductive connector body with a seat on the leading end and an electrically conductive snap ring held in the seat. A raised grounding lug on the seat of the connector body extends through a notch in the snap ring and provides a direct path for establishing an electrical grounding path between the connector body and the junction box. Locking tangs on the snap ring provide a secure snap-fit engagement between the connector body and the junction box. The raised grounding lug on the seat of the connector body provides a direct grounding path between the connector body and the junction box, thereby improving electrical continuity and lowering the millivolt drop between the connector body, the junction box, and the electrical cable or conduit secured to the connector body.
    Type: Grant
    Filed: July 5, 2011
    Date of Patent: June 18, 2013
    Assignee: Arlington Industries, Inc.
    Inventor: Thomas J. Gretz
  • Patent number: 8274000
    Abstract: An electrical fitting having a gripping device with a plurality of gripping tabs forming a helix or spiral. The electrical fitting permits electrical metallic tubing or EMT to be quickly attached to and removed from the electrical fitting without disassembling the fitting or cutting the tubing. A body with a locking end having a plurality of griping tabs receives an end of the tubing pushed into the fitting. The gripping tabs securely hold the tubing preventing loosening or removal. The helix or spiral formation of the griping tabs permits easy removal of the tubing by rotating the tubing counter-clockwise.
    Type: Grant
    Filed: August 11, 2010
    Date of Patent: September 25, 2012
    Assignee: Bridgeport Fittings, Inc.
    Inventor: Lawrence J. Smith
  • Patent number: 8107208
    Abstract: A potted electrical circuit is enclosed within a housing and has a first and second fiberglass layer that is laid upon a top surface of the potted electrical circuit. A lid of the housing seals the electrical circuit there within and an opening formed in a side wall allows circuitry wiring to extend there from out. The first fiberglass layer is a woven layer while the second fiberglass layer is a padding-like layer. Circuitry wiring pushes through the woven first fiberglass layer before extending out through the opening in the housing. The first fiberglass layer is tucked in and around the electrical circuit and adheres to the inside of the housing by attaching to the potting material while it hardens. In a preferred embodiment, the electrical circuit in combination with the insulation material is used within a transient voltage surge suppression device.
    Type: Grant
    Filed: August 21, 2008
    Date of Patent: January 31, 2012
    Assignee: Surge Suppression Incorporated
    Inventors: Ronald Hotchkiss, Richard Hotchkiss, Jr., Ricky Fussell, Andrea Haa
  • Patent number: 8107207
    Abstract: A potted electrical circuit is enclosed within a housing and has a first and second fiberglass layer that is laid upon a top surface of the potted electrical circuit. A lid of the housing seals the electrical circuit there within and an opening formed in a side wall allows circuitry wiring to extend there from out. The first fiberglass layer is a woven layer while the second fiberglass layer is a padding-like layer. Circuitry wiring pushes through the woven first fiberglass layer before extending out through the opening in the housing. The first fiberglass layer is tucked in and around the electrical circuit and adheres to the inside of the housing by attaching to the potting material while it hardens. In a preferred embodiment, the electrical circuit in combination with the insulation material is used within a transient voltage surge suppression device.
    Type: Grant
    Filed: August 8, 2008
    Date of Patent: January 31, 2012
    Assignee: Surge Suppression Incorporated
    Inventors: Ronald Hotchkiss, Richard Hotchkiss, Jr., Ricky Fussell, Andrea Haa
  • Patent number: 7990727
    Abstract: The invention discloses a device comprising a stack of at least two layers, which may comprise active or passive discrete components, TSOP and/or ball grid array packages, flip chip or wire bonded bare die or the like, which layers are stacked and interconnected to define an integral module. A first and second layer comprise an electrically conductive trace with one or more electronic components in electrical connection therewith. The electrically conductive traces terminate at a lateral surface of each of the layers to define an access lead. An interposer structure is disposed between the layers and provides an interposer lateral surface upon which a conductive layer interconnect trace is defined to create an electrical connection between predetermined access leads on each of the layers.
    Type: Grant
    Filed: March 31, 2007
    Date of Patent: August 2, 2011
    Assignee: Aprolase Development Co., LLC
    Inventor: Frank Mantz