At Least One Predominantly Copper Metal Coating Patents (Class 205/182)
  • Patent number: 10870924
    Abstract: A heterostructure comprising at least one first surface containing only copper and at least one second surface, opposite the first surface, containing only aluminium or an aluminium alloy with solid solutions present in the alloy, wherein a. an anchoring layer is arranged between the first and second surfaces, wherein b. each slice plane running perpendicular to the anchoring layer has at least one aluminium or aluminium-alloy island surrounded by copper, and c. at most the aluminium alloy solid solutions which are present in the alloy occur in the anchoring layer. Also, an aluminium-copper connector and a heterostructure production method.
    Type: Grant
    Filed: June 3, 2017
    Date of Patent: December 22, 2020
    Assignee: Christian-Albrechts-Universitaet zu Kiel
    Inventors: Mark-Daniel Gerngross, Melike Baytekin-Gerngross, Juergen Carstensen, Rainer Adelung
  • Publication number: 20150116969
    Abstract: An electronic device of the present invention includes an insulating base substrate in which a plurality of through electrodes are formed; an electronic element which is electrically connected to the through electrodes and is mounted on one surface of the base substrate; a lid which accommodates the electronic element and is bonded to the one surface of the base substrate; and an external electrode which covers a region ranging from an end face of the through electrode, which is exposed by the other surface of the base substrate, to the other surface in a vicinity of the end face. The external electrode includes a conductive film which covers a region ranging from the end face to the other surface in the vicinity of the end face, a first electrolytic plating film which is formed on a surface of the conductive film by an electrolytic plating method, and a second electrolytic plating film which is formed on a surface of the first electrolytic plating film by an electrolytic plating method.
    Type: Application
    Filed: October 21, 2014
    Publication date: April 30, 2015
    Inventors: Atsushi KOZUKI, Hideshi HAMADA, Yoshifumi YOSHIDA
  • Patent number: 8940404
    Abstract: Tin-plated copper-alloy material for terminal having: a substrate made of Cu or Cu alloy; an Sn-based surface layer formed on a surface of the substrate; and a Cu—Ni—Sn alloy layer including Ni formed between the Sn-based surface layer and the substrate, in which the Cu—Ni—Sn alloy layer is made of: fine Cu—Ni—Sn alloy particles; and coarse Cu—Ni—Sn alloy particles, an average thickness of the Sn-based surface layer is not less than 0.2 ?m and not more than 0.6 ?m, an area ratio of the Cu—Ni—Sn alloy layer exposed at a surface of the Sn-based surface layer is not less than 10% and not more than 40%, and a coefficient of kinetic friction of the tin-plated copper-alloy material for terminal is not more than 0.3.
    Type: Grant
    Filed: January 22, 2013
    Date of Patent: January 27, 2015
    Assignee: Mitsubishi Materials Corporation
    Inventors: Yuki Taninouchi, Naoki Kato, Kenji Kubota
  • Publication number: 20150014177
    Abstract: The present invention relates to a method for deposition of a matte copper coating wherein a first copper layer is deposited from an aqueous copper electrolyte which does not contain an organic compound comprising divalent sulfur. A second copper layer is then deposited onto the first copper layer from an aqueous copper electrolyte comprising a first and a second water soluble sulfur-containing additive wherein the first water soluble sulfur-containing compound is an alkyl sulfonic acid derivative and the second water soluble sulfur-containing additive is an aromatic sulfonic acid derivative. The method provides copper layers with a homogeneous and adjustable matte appearance for decorative applications.
    Type: Application
    Filed: November 27, 2012
    Publication date: January 15, 2015
    Inventors: Stefan Kretschmer, Philip Hartmann, Bernd Roelfs
  • Patent number: 8894836
    Abstract: A highly reliable electronic device that prevents entry of a plating solution via an external electrode and entry of moisture of external environment inside thereof, and generates no soldering defects or solder popping defects which are caused by precipitation of a glass component on a surface of the external electrode. The electrode structure of the electronic device is formed of Cu-baked electrode layers primarily composed of Cu, Cu plating layers formed on the Cu-baked electrode layers and which are processed by a recrystallization treatment, and upper-side plating layers formed on the Cu plating layers. After the Cu plating layers are formed, a heat treatment is performed at a temperature in the range of a temperature at which the Cu plating layers are recrystallized to a temperature at which glass contained in a conductive paste is not softened, so that the Cu plating layers are recrystallized.
    Type: Grant
    Filed: April 11, 2012
    Date of Patent: November 25, 2014
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Hiroshi Katsube, Jun Nishikawa
  • Patent number: 8859049
    Abstract: A plating method for an RF device is disclosed. The method includes (a) pre-treating the RF device made from a substrate material; (b) forming a copper plating layer by applying copper plating to the RF device; and (c) forming a thin-film layer over the copper plating layer, the thin-film layer made of a precious metal, where a thickness of the precious-metal thin-film layer is thinner than a skin depth at a working frequency band. The disclosed method makes it possible to provide a plating treatment with a low cost while providing a superior appearance quality.
    Type: Grant
    Filed: February 27, 2009
    Date of Patent: October 14, 2014
    Assignee: Ace Technologies Corp.
    Inventors: Hyun-Yeong Jung, Myoung-Joon Jung
  • Patent number: 8815072
    Abstract: A process is provided for roughening both sides of a copper plate by forming protrusions with fine bump shapes on both sides of the copper plate in an electroplating solution for plating copper while reducing deterioration of the electroplating solution. Opposed pairs of negative electrodes (3c) and positive electrodes (3a) are provided in an electroplating copper solution (2), and a copper plate (4) is arranged between the pair of negative electrodes (3c). An anodic treatment for generating copper fine particles on both surfaces of the copper plate (4) is carried out by performing an electrolytic process for three to ten minutes with the copper plate (4) as a positive electrode between the negative electrodes (3c).
    Type: Grant
    Filed: March 3, 2008
    Date of Patent: August 26, 2014
    Assignee: Furukawa Electric Co., Ltd.
    Inventors: Hajime Watanabe, Sadao Ishihama, Kiyoteru Yamamoto, Takahiro Imai, Toshihiro Oyoshi
  • Patent number: 8784636
    Abstract: A method can form a conductive structure, which is useful for three-dimensional packaging with via plugs, in a shorter time by shortening the conventional long plating time that is an impediment to the practical use of electroplating. The method includes forming a conductive film on an entire surface, including interior surfaces of via holes, of a substrate having the via holes formed in the surface; forming a resist pattern at a predetermined position on the conductive film; carrying out first electroplating under first plating conditions, using the conductive film as a feeding layer, thereby filling a first plated film into the via holes; and carrying out second electroplating under second plating conditions, using the conductive film and the first plated film as a feeding layer, thereby allowing a second plated film to grow on the conductive film and the first plated film, both exposed in the resist openings of the resist pattern.
    Type: Grant
    Filed: December 3, 2008
    Date of Patent: July 22, 2014
    Assignee: Ebara Corporation
    Inventors: Mizuki Nagai, Nobutoshi Saito, Fumio Kuriyama, Akira Fukunaga
  • Patent number: 8771495
    Abstract: A method and composition for metallizing a via feature in a semiconductor integrated circuit device substrate, using a leveler compound which is a dipyridyl compound.
    Type: Grant
    Filed: March 5, 2013
    Date of Patent: July 8, 2014
    Assignee: Enthone Inc.
    Inventors: Vincent Paneccasio, Jr., Xuan Lin, Richard Hurtubise, Qingyun Chen
  • Publication number: 20140120262
    Abstract: A method of forming a tool marking structure includes: a coloring step of coloring a predetermined position of the first protective layer so as to form a marking area with a color layer and forming the first protective layer on a bottom surface of the marking area, and a second-time surface processing step of forming a second protective layer on a non-marking area of the tool.
    Type: Application
    Filed: June 5, 2013
    Publication date: May 1, 2014
    Inventor: Leo Shih
  • Patent number: 8637164
    Abstract: A silver-coated composite material for movable contact parts, which has: an underlying layer composed of any one of nickel, cobalt, a nickel alloy, and a cobalt alloy at least provided on a part of the surface of a stainless steel substrate; an intermediate layer composed of copper or a copper alloy provided thereon; and a silver or silver alloy layer provided thereon as an outermost layer, wherein a thickness of the intermediate layer is 0.05 to 0.3 ?m, and wherein an average grain size of the silver or silver alloy provided as the outermost layer is 0.5 to 5.0 ?m.
    Type: Grant
    Filed: August 10, 2012
    Date of Patent: January 28, 2014
    Assignee: Furukawa Electric Co., Ltd.
    Inventors: Yoshiaki Kobayashi, Satoru Zama, Satoshi Suzuki, Masato Ohno
  • Patent number: 8603317
    Abstract: A housing having a coating is disclosed. The housing comprises a base substrate made of metallic material; a micro-arc oxide layer formed on the base substrate; and a protection outer film formed on the micro-arc oxide layer and comprising a coating layer and a metallic layer, wherein the metallic layer is formed on the micro-arc oxide layer and covers a portion of the micro-arc oxide layer; and the coating layer is formed on a remaining portion of the micro-arc oxide layer so that the micro-arc oxide layer is covered by the metallic layer and the coating layer.
    Type: Grant
    Filed: December 6, 2011
    Date of Patent: December 10, 2013
    Assignees: Fu Zhun Precision Industry (Shen Zhen) Co., Ltd., Foxconn Technology Co., Ltd.
    Inventors: Zhe-Xuan Zhang, Shih-Pin Wang, Yan Xiong, Che-Chao Chu
  • Patent number: 8568899
    Abstract: Provided is a metal covered polyimide composite comprising a tie-coat layer and a metal seed layer formed on a surface of a polyimide film by electroless plating or a drying method, and a copper layer or a copper alloy layer formed thereon by electroplating, wherein the copper plated layer or copper alloy plated layer comprises three layers to one layer of the copper layer or copper alloy layer, and there is a concentrated portion of impurities at the boundary of the copper layer or copper alloy layer when the copper layer or copper alloy layer is three layers to two layers, and there is no concentrated portion of impurities when the copper layer or copper alloy layer is a single layer. Additionally provided are a method of producing the composite and a method of producing an electronic circuit board.
    Type: Grant
    Filed: September 16, 2008
    Date of Patent: October 29, 2013
    Assignee: JX Nippon Mining & Metals Corporation
    Inventors: Michiya Kohiki, Naonori Michishita, Nobuhito Makino
  • Publication number: 20130277225
    Abstract: The present invention relates to the production of a bronze plated substrate having a golden appearance thanks to a multiple-layer plating method. The method notably comprises plating a substrate having at least one layer of copper with a tin layer which thickness represents 3.5% to 12% of the copper layer thickness. The method further comprises annealing the plated substrate in an annealing furnace comprising a plurality of heating zones, the last heating zone of the furnace having an annealing temperature ranging from 600° C. to 815° C. The annealing step of the method is performed under controlled operating parameters which comprise an annealing residence time, the annealing temperature and the relative thickness of the tin layer in view of the copper layer. The operating parameters are controlled in accordance to each other to ensure obtaining the gold-like appearance of the plated bronze.
    Type: Application
    Filed: December 9, 2011
    Publication date: October 24, 2013
    Applicant: ROYAL CANADIAN MINT
    Inventors: Toan Dinh Nguyen, Hieu Cong Truong
  • Publication number: 20130161809
    Abstract: A substrate structure, a semiconductor package device and a manufacturing method of substrate structure are provided. The substrate structure comprises a conductive structure comprising a first metal layer, a second metal layer and a third metal layer. The second metal layer is disposed on the first metal layer. The third metal layer is disposed on the second metal layer. Each of the second metal layer and the third metal layer has a first surface and a second surface opposite to the first surface. The first surface of the third metal layer is connected to the second surface of the second metal layer. The surface area of the first surface of the third metal layer is larger than that of the second surface of the second metal layer. A substrate structure, semiconductor package device, and a manufacturing method of substrate structure are provided. The substrate structure includes a conductive structure, comprising a first metal layer, a second metal layer, and a third metal layer.
    Type: Application
    Filed: November 29, 2012
    Publication date: June 27, 2013
    Applicant: ADVANPACK SOLUTIONS PTE LTD.
    Inventor: ADVANPACK SOLUTIONS PTE LTD.
  • Patent number: 8470155
    Abstract: In order to produce industrially advantageously an electroformed copper/niobium composite piping material wherein an electroformed copper layer and a niobium thin piping material are strongly bonded to each other, the electroformed copper/niobium composite piping material can be produced by coating any one or each of the outer peripheral surface and the inner peripheral surface of a niobium thin piping material with a nickel thin film, coating the surface of the nickel thin film with copper by electroforming, and subsequently annealing the resultant.
    Type: Grant
    Filed: May 29, 2006
    Date of Patent: June 25, 2013
    Assignees: High Energy Accelerator Research Organization, Nomura Plating Co., Ltd.
    Inventors: Kenji Saito, Tokumi Ikeda, Tamao Higuchi
  • Patent number: 8425753
    Abstract: The present invention provides a method and precursor structure to form a solar cell absorber layer. The method includes electrodepositing a first layer including a film stack including at least a first film comprising copper, a second film comprising indium and a third film comprising gallium, wherein the first layer includes a first amount of copper, electrodepositing a second layer onto the first layer, the second layer including at least one of a second copper-indium-gallium-ternary alloy film, a copper-indium binary alloy film, a copper-gallium binary alloy film and a copper-selenium binary alloy film, wherein the second layer includes a second amount of copper, which is higher than the first amount of copper, and electrodepositing a third layer onto the second layer, the third layer including selenium; and reacting the precursor stack to form an absorber layer on the base.
    Type: Grant
    Filed: December 18, 2009
    Date of Patent: April 23, 2013
    Assignee: SoloPower, Inc.
    Inventors: Serdar Aksu, Mustafa Pinarbasi
  • Patent number: 8388824
    Abstract: A method for metallizing a via feature in a semiconductor integrated circuit device substrate, wherein the semiconductor integrated circuit device substrate comprises a front surface, a back surface, and the via feature and wherein the via feature comprises an opening in the front surface of the substrate, a sidewall extending from the front surface of the substrate inward, and a bottom. The method comprises contacting the semiconductor integrated circuit device substrate with an electrolytic copper deposition chemistry comprising (a) a source of copper ions and (b) a leveler compound, wherein the leveler compound is a reaction product of a dipyridyl compound and an alkylating agent; and supplying electrical current to the electrolytic deposition chemistry to deposit copper metal onto the bottom and sidewall of the via feature, thereby yielding a copper filled via feature.
    Type: Grant
    Filed: November 26, 2008
    Date of Patent: March 5, 2013
    Assignee: Enthone Inc.
    Inventors: Vincent Paneccasio, Jr., Xuan Lin, Richard Hurtubise, Qingyun Chen
  • Patent number: 8357284
    Abstract: A metal film-forming method is capable of forming a metal film on a surface of a base metal film, formed on a surface of a substrate, with sufficient adhesion to the base metal film even when a natural oxide film is formed on the surface of the base metal film. The metal film-forming method includes: preparing a substrate having a base metal film formed on a surface; and carrying out electroplating of the substrate using the base metal film as a cathode and another metal as an anode while immersing the substrate in a solution containing a metal complex and a reducing material, both dissolved in a solvent, to form a metal film, deriving from a metal contained in the metal complex, on the surface of the base metal film.
    Type: Grant
    Filed: December 23, 2010
    Date of Patent: January 22, 2013
    Assignee: Ebara Corporation
    Inventors: Akira Susaki, Tsutomu Nakada, Hideki Tateishi
  • Publication number: 20130008798
    Abstract: Photovoltaic devices and methods for preparing a p-type semiconductor generally include electroplating a layer of gallium or a gallium alloy onto a conductive layer by contacting the conductive layer with a plating bath free of complexing agents including a gallium salt, methane sulfonic acid or sodium sulfate and an organic additive comprising at least one nitrogen atom and/or at least one sulfur atom, and a solvent; adjusting a pH of the solution to be less than 2.6 or greater than 12.6. The photovoltaic device includes an impurity in the p-type semiconductor layer selected from the group consisting of arsenic, antimony, bismuth, and mixtures thereof. Various photovoltaic precursor layers for forming CIS, CGS and CIGS p-type semiconductor structures can be formed by electroplating the gallium or gallium alloys in this manner. Also disclosed are processes for forming a thermal interface of gallium or a gallium alloy.
    Type: Application
    Filed: September 5, 2012
    Publication date: January 10, 2013
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Shafaat Ahmed, Hariklia Deligianni, Qiang Huang, Kathleen B. Reuter, Lubomyr T. Romankiw, Raman Vaidyanathan
  • Publication number: 20120315502
    Abstract: There is provided a metal laminated structure in which a first metal layer containing tungsten is provided on a first surface of a second metal layer containing copper and a third metal layer containing tungsten is provided on a second surface of the second metal layer opposite to the first surface, and the first metal layer contains crystal grains of tungsten in a form of a columnar crystal extending in a direction perpendicular to the first surface of the second metal layer and the third metal layer contains crystal grains of tungsten in a form of a columnar crystal extending in a direction perpendicular to the second surface of the second metal layer, and a method for producing the metal laminated structure.
    Type: Application
    Filed: December 27, 2010
    Publication date: December 13, 2012
    Applicants: A.L.M.T. Corp., Sumitomo Electric Industries, Ltd.
    Inventors: Koji Nitta, Shinji Inazawa, Akihisa Hosoe, Masatoshi Majima, Osamu Suwata, Hiroshi Yokoyama, Shinichi Yamagata, Yugaku Abe
  • Patent number: 8329315
    Abstract: The present invention relates to an ultra thin copper foil with a very low profile copper foil as a carrier, comprising a carrier foil a release layer and an ultra thin copper foil. The copper foil with the Very Low Profile, smooth on both sides (i.e. VLP copper foil) is used as the carrier foil, the said very low profile copper foil for supporting the ultra thin copper foil can bring advantages of no pinhole, excellent thickness uniformity and low surface roughness. The impact of a release layer on the bond strength between the carrier foil and the ultra thin copper foil is very significant, the release layer is composed of a quaternary metal alloy with peelability.
    Type: Grant
    Filed: January 31, 2011
    Date of Patent: December 11, 2012
    Assignee: Nan Ya Plastics Corporation
    Inventors: Ming Jen Tzou, Ya Mei Lin
  • Publication number: 20120217166
    Abstract: In the electroplating of zinc diecastings with a copper layer, the electrolyte penetrates into the pores of the zinc diecasting. When the temperature is increased later, this leads to vaporization of the electrolyte liquid in the pores and to blistering or flaking of the copper layer. It is proposed that plating be carried out in two steps. In the first step, only a thin copper layer of less than 1 ?m is applied and the plated parts are then treated at a temperature which leads to vaporization of the electrolyte liquid. The thin copper layer is still sufficiently porous for the vapour to be able to escape. Only the solid constituents of the electrolyte remain. The copper layer is then thickened to a final thickness of from about 20 to 30 ?m. In this plating step, electrolyte liquid no longer penetrates into the pores of the zinc diecasting. The parts which are coated in this way display no blistering or flaking of the copper layer after storage at a temperature of 150° C.
    Type: Application
    Filed: August 12, 2010
    Publication date: August 30, 2012
    Applicant: Umicore Galvanotechnik GmbH
    Inventors: Franz Gassner, Frank Straubinger, Klaus Reissmueller, Guenter Wirth, Silvia Neuhaus
  • Publication number: 20120100392
    Abstract: There is provided a metal laminated structure comprising a first metal layer, a second metal layer and a third metal layer, the first metal layer being disposed on one surface of the second metal layer, the third metal layer being disposed on the other surface of the second metal layer, the first metal layer including at least one of tungsten and molybdenum, the second metal layer including copper, the third metal layer including at least one of tungsten and molybdenum, and a method for producing the metal laminated structure.
    Type: Application
    Filed: June 8, 2010
    Publication date: April 26, 2012
    Applicants: Sumitomo Electric Industries, Ltd., A.L.M.T Corp.
    Inventors: Koji Nitta, Masatoshi Majima, Shinji Inazawa, Yugaku Abe, Hiroshi Yokoyama, Osamu Suwata, Shinichi Yamagata
  • Patent number: 8147671
    Abstract: A method for electroplating a substrate having an aluminum alloy surface comprises: applying a zinc layer onto the aluminum alloy surface; electroplating a first copper layer onto the zinc layer from an alkaline copper electroplating solution; electroplating a second copper layer onto the first copper layer from an acid copper electroplating solution; electroplating a Cu—Sn alloy layer onto the second copper layer from a Cu—Sn electroplating solution; and electroplating a chromium layer onto the Cu—Sn alloy layer from a trivalent chromium solution. The alkaline copper electroplating solution is substantially free of cyanide ion.
    Type: Grant
    Filed: November 23, 2009
    Date of Patent: April 3, 2012
    Assignee: BYD Co. Ltd.
    Inventors: Jipeng Sun, Aihua Li, Zaichun Li, Bo Peng
  • Publication number: 20120055612
    Abstract: Photovoltaic devices and methods for preparing a p-type semiconductor layer for the photovoltaic devices generally include electroplating a layer of gallium or a gallium alloy onto a conductive layer by contacting the conductive layer with a plating bath free of complexing agents including a gallium salt, methane sulfonic acid or sodium sulfate and an organic additive comprising at least one nitrogen atom and/or at least one sulfur atom, and a solvent; adjusting a pH of the solution to be less than 2.6 or greater than 12.6. The photovoltaic device includes an impurity in the p-type semiconductor layer selected from the group consisting of arsenic, antimony, bismuth, and mixtures thereof. Various photovoltaic precursor layers for forming CIS, CGS and CIGS p-type semiconductor structures can be formed by electroplating the gallium or gallium alloys in this manner. Also disclosed are processes for forming a thermal interface of gallium or a gallium alloy with the electroplating process.
    Type: Application
    Filed: September 2, 2010
    Publication date: March 8, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Shafaat Ahmed, Hariklia Deligianni, Qiang Huang, Kathleen B. Reuter, Lubomyr T. Romankiw, Raman Vaidyanathan
  • Patent number: 8128791
    Abstract: In a copper electroplating apparatus having separate anolyte and catholyte portions, the concentration of anolyte components (e.g., acid or copper salt) is controlled by providing a diluent to the recirculating anolyte. The dosing of the diluent can be controlled by the user and can follow a pre-determined schedule. For example, the schedule may specify the diluent dosing parameters, so as to prevent precipitation of copper salt in the anolyte. Thus, precipitation-induced anode passivation can be minimized.
    Type: Grant
    Filed: October 30, 2006
    Date of Patent: March 6, 2012
    Assignee: Novellus Systems, Inc.
    Inventors: Bryan Buckalew, Jonathan Reid, John Sukamto, Zhian He, Seshasayee Varadarajan, Steven T. Mayer
  • Patent number: 8048280
    Abstract: Several techniques are described for reducing or mitigating the formation of seams and/or voids in electroplating the interior regions of microscopic recessed features. Cathodic polarization is used to mitigate the deleterious effects of introducing a substrate plated with a seed layer into an electroplating solution. Also described are diffusion-controlled electroplating techniques to provide for bottom-up filling of trenches and vias, avoiding thereby sidewalls growing together to create seams/voids. A preliminary plating step is also described that plates a thin film of conductor on the interior surfaces of features leading to adequate electrical conductivity to the feature bottom, facilitating bottom-up filling.
    Type: Grant
    Filed: September 16, 2005
    Date of Patent: November 1, 2011
    Assignee: Novellus Systems, Inc.
    Inventors: Steven T. Mayer, Vijay Bhaskaran, Evan E. Patton, Robert L. Jackson, Jonathan Reid
  • Patent number: 7985485
    Abstract: A copper foil reducing transmission loss at a high frequency and excellent in bond strength with a resin substrate, including at least a granular layer and a columnar layer in its thickness direction, the columnar layer being formed on at least one surface of the granular layer forming the copper foil or the granular layer being formed on at least one surface of the columnar layer forming the copper foil, the relation of the thickness A of the granular layer and the thickness B of the columnar layer in the copper foil being preferably A/(A+B)=40 to 99%, a method of production and apparatus for production for the same, and a high frequency circuit using the same.
    Type: Grant
    Filed: September 9, 2009
    Date of Patent: July 26, 2011
    Assignee: The Furukawa Electric Co., Ltd.
    Inventors: Takami Moteki, Yuuji Suzuki, Kazuhiro Hoshino, Kensaku Shinozaki, Akira Matsuda
  • Patent number: 7951280
    Abstract: An electrochemical deposition method and electrolyte to plate uniform, defect free and smooth gallium films are provided. In a preferred embodiment, the electrolyte may include a solvent that comprises water and at least one monohydroxyl alcohol, a gallium salt, and an acid to control the solution pH and conductivity. The method electrodeposits a gallium film possessing sub-micron thickness on a conductive surface. Such gallium layers are used in fabrication of semiconductor and electronic devices such as thin film solar cells.
    Type: Grant
    Filed: November 7, 2008
    Date of Patent: May 31, 2011
    Assignee: SoloPower, Inc.
    Inventors: Jiaxiong Wang, Serdar Aksu, Bulent M. Basol
  • Publication number: 20110065804
    Abstract: Articles having metallic finishes including antimicrobial agents dispersed throughout the finish and methods of electroplating said metallic finishes on a material. The metallic finishes include highly-decorative electroplated finishes for bathroom and kitchen hardware, door hardware, and other highly lustrous products where antimicrobial protection is preferred.
    Type: Application
    Filed: March 25, 2009
    Publication date: March 17, 2011
    Applicants: PAVCO INC., MICROBAN INTERNATIONAL LTD.
    Inventors: Leonard L. Diaddario, Matthew W. Stauffer
  • Publication number: 20110005935
    Abstract: A plating method for an RF device is disclosed. The method includes (a) pre-treating the RF device made from a substrate material; (b) forming a copper plating layer by applying copper plating to the RF device; and (c) forming a thin-film layer over the copper plating layer, the thin-film layer made of a precious metal, where a thickness of the precious-metal thin-film layer is thinner than a skin depth at a working frequency band. The disclosed method makes it possible to provide a plating treatment with a low cost while providing a superior appearance quality.
    Type: Application
    Filed: February 27, 2009
    Publication date: January 13, 2011
    Inventors: Hyun-Yeong Jung, Myoung-Joon Jung
  • Patent number: 7846317
    Abstract: A method of processing a printed wiring board. Initial processing steps are implemented on the printed wiring board. Copper is plated on the printed wiring board from a bath containing nickel and copper. Nickel is plated on the printed wiring board from a bath containing nickel and copper and final processing steps are implemented on the printed wiring board.
    Type: Grant
    Filed: February 24, 2003
    Date of Patent: December 7, 2010
    Assignee: Lawrence Livermore National Security, LLC
    Inventors: Michael P. Meltzer, Christopher P. Steffani, Ray A. Gonfiotti
  • Patent number: 7830592
    Abstract: The present invention relates to a process for manufacturing a brightness enhancement structure comprising micro-reflectors. The process comprises forming an array of micro-structures by embossing; and depositing a metal layer over the surface of the micro-structures. The present invention also relates to a process for manufacturing a display device comprising micro-reflectors. The present invention further relates to a display device comprising micro-reflectors.
    Type: Grant
    Filed: November 25, 2008
    Date of Patent: November 9, 2010
    Assignee: SiPix Imaging, Inc.
    Inventors: Robert A. Sprague, Yi-Shung Chaug, HongMei Zang, Xiaojia Wang, Gary Kang
  • Patent number: 7820535
    Abstract: Effective fillability and the uniformity electrodeposition of a copper electroplating solution is judged by determining the time-dependent potential change thereof at a cathode current density of 0.1-20 A/dm2. The potential change is determined at a working electrode rotation of 100-7500 rpm, and the fillability with the solution is judged from the curve profile. The time-dependent potential change curve within a predetermined period of time after the start of electrolysis is approximated according to the Boltzmann's function, and the potential change speed dx and the potential convergent point A2 are obtained to judge the fillability with a plating solution.
    Type: Grant
    Filed: March 23, 2004
    Date of Patent: October 26, 2010
    Assignee: Toppan Printing Co., Ltd.
    Inventors: Toshikazu Okubo, Katsuyoshi Naoi, Yuka Yamada
  • Patent number: 7816015
    Abstract: A composite copper foil having three layers of a supporting metal layer, an exfoliating layer and a thin copper layer, wherein one surface of the exfoliating layer comprises, as a main component, an alloy of tungsten or an alloy of molybdenum and the other surface thereof comprises, as a main component, a metal oxide containing tungsten or a metal oxide containing molybdenum. The composite copper foil is free from undesired swelling, separation or falling of the supporting metal layer during heating and working at a high temperature, and the supporting metal layer can be exfoliated from the thin copper layer with case, after the heating and the working.
    Type: Grant
    Filed: July 22, 2005
    Date of Patent: October 19, 2010
    Assignee: Nippon Denkai, Ltd.
    Inventor: Yuushi Sato
  • Publication number: 20100215982
    Abstract: Provided is a metal covered polyimide composite comprising a tie-coat layer and a metal seed layer formed on a surface of a polyimide film by electroless plating or a drying method, and a copper layer or a copper alloy layer formed thereon by electroplating, wherein the copper plated layer or copper alloy plated layer includes three layers to one layer of the copper layer or copper alloy layer. The provided metal covered polyimide composite can effectively prevent peeling in a non-adhesive flexible laminate (especially a two-layer flexible laminate), particularly can effectively inhibit peeling from the interface of a copper layer and tin plating. Additionally provided are a method of producing the composite and an apparatus for producing the composite.
    Type: Application
    Filed: September 16, 2008
    Publication date: August 26, 2010
    Applicant: NIPPON MINING AND METALS CO., LTD.
    Inventors: Michiya Kohiki, Naonori Michishita, Nobuhito Makino
  • Publication number: 20100213851
    Abstract: An RF based, gridless improved plasma source and method of operating a plasma source comprising a RF coupler, a first stage with a helicon-like system, a ICH second stage, a ionization chamber, magnetic means which are strengthened on the downstream end of the first stage, to control the plasma flux, ionization fraction, spatial distribution.
    Type: Application
    Filed: February 19, 2008
    Publication date: August 26, 2010
    Applicant: AD ASTRA ROCKET COMPANY
    Inventor: Franklin Chang Diaz
  • Publication number: 20100187084
    Abstract: An electrical contact comprising a silver-coated stainless steel strip, which has an underlying layer comprising any one of nickel, cobalt, nickel alloys, and cobalt alloys, on at least a part of the surface of a stainless steel substrate, and has a silver or silver alloy layer formed as an upper layer, in which a copper or copper alloy layer with a thickness of 0.05 to 2.0 ?m is provided between the silver or silver alloy layer and the underlying layer; and a producing method of the above-described electrical contact, in which the silver-coated stainless steel strip is subjected to a heat-treating in a non-oxidative atmosphere.
    Type: Application
    Filed: March 29, 2010
    Publication date: July 29, 2010
    Applicant: THE FURUKAWA ELECTRIC CO., LTD.
    Inventors: Satoshi SUZUKI, Kuniteru MIHARA, Naofumi TOKUHARA
  • Publication number: 20090324992
    Abstract: A metal clad laminate and a method of manufacturing the metal clad laminate are disclosed. The metal clad laminate can include a barrier layer made of a metallic material, a metal foil formed on one side of the barrier layer and coupled with the barrier layer by plating, and an insulator attached to the metal foil. By utilizing the metal clad laminate, the metal foil can be prevented from being perforated when processing a via hole using laser, so that a VOP structure may be implemented with a higher level of reliability.
    Type: Application
    Filed: January 14, 2009
    Publication date: December 31, 2009
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventor: Myung-Sam Kang
  • Publication number: 20090314649
    Abstract: The present invention relates to systems and methods for preparing metallic precursor thin films for the growth of semiconductor compounds to be used for radiation detector and solar cell fabrication. In one aspect, there is provided a method of efficiently using expensive materials necessary for the making of solar cells.
    Type: Application
    Filed: August 31, 2009
    Publication date: December 24, 2009
    Applicant: SoloPower, Inc.
    Inventor: Bulent M. Basol
  • Publication number: 20090294297
    Abstract: There is provided a method of forming a plating layer, the method including: forming a seed layer on a substrate; forming a pattern layer on the seed layer, the pattern layer formed of a thermoplastic resin and including openings; forming a plating layer on portions of the seed layer corresponding to the openings; and removing the pattern layer. This method ensures that the plating layer is formed with a sufficient thickness and the substrate, particularly, a ceramic substrate suffers minimal chemical damage during a plating process. Moreover, the plating layer is formed with a more uniform thickness.
    Type: Application
    Filed: October 1, 2008
    Publication date: December 3, 2009
    Inventors: Young Suk KIM, Yong Soo Oh, Byeung Gyu Chang, Won Hee Yoo, Sung Yeol Park
  • Publication number: 20090291319
    Abstract: An object of the present invention is to provide a copper foil with carrier sheet which permits releasing of the carrier sheet from the copper foil layer even when hot pressing at a temperature exceeding 300° C. is applied in the production of a printed wiring board. In order to achieve the object, a copper foil with physically releasable carrier sheet having a copper foil layer on the surface of the carrier sheet through a bonding interface layer, characterized in that the bonding interface layer is composed of a metal layer and a carbon layer. It is preferable for the bonding interface layer to be composed of a metal layer of 1 nm to 50 nm thick and a carbon layer of 1 nm to 20 nm thick.
    Type: Application
    Filed: May 18, 2007
    Publication date: November 26, 2009
    Applicant: MITSUI MINING & SMELTING CO., LTD.
    Inventors: Seiji Nagatani, Hiroshi Watanabe, Kazufumi Izumida
  • Publication number: 20090255824
    Abstract: A method for surface treating a substrate includes following steps. Firstly, a substrate including a metallic surface capable of being electroplated with a metal coating is provided. Secondly, a first metal coating is electroplated onto the metallic surface of the substrate. Thirdly, an oxidized metal film is formed to cover the first metal coating. The first metal coating of substrate is blasted using quartz sand. The oxidized metal film is removed from the first metal coating. The second metal coating is electroplated onto the first metal coating.
    Type: Application
    Filed: April 1, 2009
    Publication date: October 15, 2009
    Applicants: SHENZHEN FUTAIHONG PRECISION INDUSTRY CO., LTD., FIH (HONG KONG) LIMITED
    Inventors: JONG-YI SU, CHENG-SHIN CHEN, YUEH-FENG LEE, CHUAN-LONG CHEN, REN-NING WANG, RUN-YI CHEN
  • Publication number: 20090202862
    Abstract: Disclosed is an electroplated product, comprising a base material and an electroplated metal layer including a copper layer on the surface of the base material, wherein the electroplated metal layer further includes a nickel substitute metal layer on the copper layer and the nickel substitute metal is Cu—Sn alloy, Ru, Rh, Pd, or an alloy composed of 2, 3, or 4 elements selected from Ru, Rh, Pd, and Co. A method for preparing the same is also disclosed. The metal electroplated layer of said electroplated product is free of nickel, and therefore will not cause nickel irritation on skin. Furthermore, the electroplated layer also has the advantages of nickel coating, including good smoothness, brightness, wearing resistance, corrosion resistance, and thermal shock resistance, etc.
    Type: Application
    Filed: May 28, 2007
    Publication date: August 13, 2009
    Inventors: Liang Chen, Qing Gong, Yunbo Yi, Fang Liu
  • Patent number: 7479213
    Abstract: A plating method is capable of preferentially precipitating a plated film fully and uniformly in trenches and via holes according to a mechanical and electrochemical process, and of easily forming a plated film having higher flatness surface without being affected by variations in the shape of trenches and via holes. The plating method includes a first plating process and a second plating process. The second plating process is performed by filling a plating solution between an anode and a substrate, with a porous member placed in the plating solution, repeatedly bringing the porous member and the substrate into and out of contact with each other, passing a current between the anode and the substrate while the porous member is being held in contact with the substrate.
    Type: Grant
    Filed: December 23, 2004
    Date of Patent: January 20, 2009
    Assignee: Ebara Corporation
    Inventors: Mizuki Nagai, Hiroyuki Kanda, Keiichi Kurashina, Satoru Yamamoto, Hidenao Suzuki, Koji Mishima, Brett C. Baker-O'Neal, Hariklia Deligianni, Keith Kwietniak
  • Publication number: 20090011271
    Abstract: To produce an ultra-thin copper foil with a carrier foil that microscopic crystal grains can be deposited without being affected by the surface roughness of a carrier foil, etching can be performed until an ultra-fine width such that line/space is 15 mum or less, and the microscopic line and a wiring board have large peel strength even after line of 15 mum is etched. An ultra-thin copper foil wherein a carrier foil, a peeling layer, an ultra-thin copper foil are laminated in this order, the ultra-thin copper foil (before roughening treatment is performed) is an electrolytic copper foil that surface roughness of 2.5 mum as ten point height of roughness profile, and the minimum distance between peaks of salients of a based material is 5 mum or more. Moreover, the surface of the ultra-thin copper foil is performed roughening treatment.
    Type: Application
    Filed: September 5, 2008
    Publication date: January 8, 2009
    Inventors: Akitoshi SUZUKI, Shin FUKUDA
  • Patent number: 7462269
    Abstract: A method for filling recessed microstructures at a surface of a microelectronic workpiece, such as a semiconductor wafer, with metallization is set forth. In accordance with the method, a metal layer is deposited into the microstructures with a process, such as an electroplating process, that generates metal grains that are sufficiently small so as to substantially fill the recessed microstructures. The deposited metal is subsequently subjected to an annealing process at a temperature below about 100 degrees Celsius, and may even take place at ambient room temperature to allow grain growth which provides optimal electrical properties. Various novel apparatus for executing unique annealing processes are also set forth.
    Type: Grant
    Filed: June 20, 2001
    Date of Patent: December 9, 2008
    Assignee: Semitool, Inc.
    Inventors: Thomas L. Ritzdorf, E. Henry Stevens, LinLin Chen, Lyndon W. Graham, Curt Dundas
  • Patent number: 7449098
    Abstract: A disclosed form of mechanically assisted electroplating leads to a flat, thin, overburden. In one example, an accelerator is deposited on a copper surface and mechanically removed in a simplified CMP-like apparatus. The wafer is then plated in an electrolyte containing little or no accelerating additives.
    Type: Grant
    Filed: December 17, 2003
    Date of Patent: November 11, 2008
    Assignee: Novellus Systems, Inc.
    Inventors: Steven T. Mayer, Jonathan D. Reid, Mark L. Rea, Ismail T. Emesh, Henner W. Meinhold, John S. Drewery
  • Publication number: 20080128019
    Abstract: Embodiments of the invention contemplate the formation of a low cost solar cell using a novel high speed electroplating method and apparatus to form a metal contact structure having selectively formed metal lines using an electrochemical plating process. The apparatus and methods described herein remove the need to perform one or more high temperature screen printing processes to form conductive features on the surface of a solar cell substrate. The resistance of interconnects formed in a solar cell device greatly affects the efficiency of the solar cell. It is thus desirable to form a solar cell device that has a low resistance connection that is reliable and cost effective. Therefore, one or more embodiments of the invention described herein are adapted to form a low cost and reliable interconnecting layer using an electrochemical plating process containing a common metal, such as copper.
    Type: Application
    Filed: December 1, 2006
    Publication date: June 5, 2008
    Inventors: Sergey LOPATIN, Nicolay Y. Kovarsky, David Eaglesham, John O. Dukovic, Charles Gay