Abstract: A method of manufacturing a micromachined thermal flowmeter is provided. The major manufacturing steps comprise forming an n-type region(s) in a p-type silicon wafer, forming heating and temperature sensing devices in the n-type region(s), converting the n-type region(s) into porous silicon by anodization in a HF solution, bonding the silicon wafer onto a glass plate using a polyimide layer as an adhesive layer, removing the porous silicon in a diluted base solution, and coating the heating and temperature sensing devices with a corrosion-resistant and abrasion-resistant material.

Abstract: An electrochemical reaction assembly and methods of inducing electrochemical reactions, such as for deposition of materials on semiconductor substrates. The assembly and method achieve a highly uniform thickness and composition of deposition material or uniform etching or polishing on the semiconductor substrates by retaining the semiconductor substrates on a cathode immersed in an appropriate reaction solution wherein a wire mesh anode rotates about the continuous moving cathode during electrochemical reaction.

Abstract: Fabrication and use of porous silicon structures to increase surface area of heated reaction chambers, electrophoresis devices, and thermopneumatic sensor-actuators, chemical preconcentrates, and filtering or control flow devices. In particular, such high surface area or specific pore size porous silicon structures will be useful in significantly augmenting the adsorption, vaporization, desorption, condensation and flow of liquids and gasses in applications that use such processes on a miniature scale. Examples that will benefit from a high surface area, porous silicon structure include sample preconcentrators that are designed to adsorb and subsequently desorb specific chemical species from a sample background; chemical reaction chambers with enhanced surface reaction rates; and sensor-actuator chamber devices with increased pressure for thermopneumatic actuation of integrated membranes.

Abstract: An element with elongated, high aspect ratio channels such as microchannel plate is fabricated by electrochemical etching of a p-type silicon element in a electrolyte to form channels extending through the element. The electrolyte may be an aqueous electrolyte. For use as a microchannel plate, the; the silicon surfaces of the channels can be converted to insulating silicon dioxide, and a dynode material with a high electron emissivity can be deposited onto the insulating surfaces of the channels. New dynode materials are also disclosed.

Abstract: An electrode structure is constituted by a first electrode, and at least one second electrode providing a pair of opposite portions with a prescribed spacing therebetween at which the first electrode is disposed. The electrode structure is suitably used for electrolytic etching and is effective in providing an accurate etching pattern without damaging the surface of an etching object.

Abstract: A method, apparatus and system for fabricating a stencil mask for ion beam and electron beam lithography are provided. The stencil mask includes a silicon substrate, a membrane formed from the substrate, and a mask pattern formed by through openings in the membrane. The method includes defining the mask pattern and membrane area using semiconductor fabrication processes, and then forming the membrane by back side etching the substrate. The apparatus is configured to electrochemically wet etch the substrate, and to equalize pressure on either side of the substrate during the etch process. The system includes an ion implanter for defining a membrane area on the substrate, optical or e-beam pattern generators for patterning various masks on the substrate, a reactive ion etcher for etching the mask pattern in the substrate, and the apparatus for etching the back side of the substrate.

Abstract: The present invention provides a method for forming porous silicon, which includes the steps of: a) providing a silicon substrate; b) growing a GaAs layer on the silicon substrate; c) defining a pattern for the GaAs layer by a photolithography process and etching the patterned GaAs layer to obtain a GaAs mask; and d) forming a porous silicon layer by anodic-oxidation-etching the silicon substrate uncovered by the GaAs mask. By this method, etching under the GaAs layer on the silicon substrate can be executed very well to form the porous silicon. And the patterned GaAs layer is etched by a process in step c), which is selected from a wet etching and a dry etching process with a photoresist as a mask. In addition, the anodic-oxidation-etching process in step d) is an electrolytic process executed in HF acidic solution which is a mixture of 30 vol. % HF and 70 vol. % H.sub.2 O, in which the HF concentration is 49 wt. %.

Abstract: A process for producing a structured area of porous silicon on a substrate, in which silicon is etched and structured by means of illumination, includes selectively aiming the illumination during or after the formation of the porous silicon directly at a selected area of a p-doped substrate in order to effect etching and structuring of the porous silicon in another area. A device for carrying out the process includes an illuminating system for supporting the etching process and for structuring the porous silicon, in which the illuminating system is selectively aimed during or after the formation of the porous silicon directly at a selected area of p-doped substrate in order to effect etching and structuring of the porous silicon in another area.

Abstract: An attachment surface for an implantable device has a random irregular pattern formed through a repetitive masking and chemical milling process. Additionally, an attachment surface for an implantable device has a random irregular pattern formed through a repetitive masking and electrochemical milling process. The electrochemical milling process is particularly well suited for use with substrate materials which have high chemical inertness which makes them resistant to chemical etching. Surface material is removed from the implant surface without stress on the adjoining material and the process provides fully dimensional fillet radii at the base of the surface irregularities. This irregular surface is adapted to receive the ingrowth of bone material and to provide a strong anchor for that bone material. The unitary nature of the substrate and surface features provides a strong anchoring surface with is resistant to cracking or breaking.

Abstract: Porous semiconductor material in the form of at least partly crystalline silicon is produced with a porosity in excess of 90% determined gravimetrically, and voids, crazing and peeling are substantially not observable by scanning electron microscopy at a magnification of 7,000. The porous silicon is dried by supercritical drying. The silicon material has good luminescence properties together with good morphology and crystallinity.

Abstract: An electrochemical reaction assembly and methods of inducing electrochemical reactions, such as for deposition of materials on semiconductor substrates. The assembly and method achieve a highly uniform thickness and composition of deposition material or uniform etching or polishing on the semiconductor substrates by retaining the semiconductor substrates on a moving cathode immersed in an appropriate reaction solution wherein a wire mesh anode rotates about the moving cathode during electrochemical reaction.

Abstract: A method for etching an object having a portion to be etched on the surface thereof, comprising a step of immersing said object in an electrolyte solution such that said object serves as a negative electrode; a step of arranging a counter electrode having a pattern corresponding to a desired etching pattern to be formed at said portion to be etched of said object in said electrolyte solution so as to maintain a predetermined interval between said counter electrode and said object, and a step of applying a direct current or a pulse current between said object and said counter electrode to etch said portion to be etched of said object into a pattern corresponding to said pattern of said counter electrode.

Abstract: A silicon on-insulator device wafer having a very thin monocrystalline film with uniform thickness. It is fabricated by vias technique in which a monocrystalline silicon film on an insulator is etched with a base silicon etching solution in an etch apparatus by applying a vias in such a way that the solution may serve as an anode and the substrate of SOI structure as a cathode. The presence of the insulator generates vacancies in a lower region of the monocrystalline silicon film and electrons in the substrate, so that the lower region charged with the vacancies is not removed by the base silicon etching solution, thereby leaving a highly uniform, thin monocrystalline silicon film.

Abstract: Disclosed is a process for fabricating an array of photovoltaic elements connected in series, which can be used as a high-efficiency solar battery, at low cost and with high reliability. The process for fabricating the array of photovoltaic elements connected in series is characterized in that a step (.alpha.) for forming insulating strips of second electrode material is carried out by immersing in a solution a substrate having a first electrode thereon, and on which the second electrode is deposited, and an opposed electrode of a concentrated electric field type positioned opposite the surface of the second electrode in the vicinity thereof and applying a voltage between the first electrode and the opposed electrode. Further, it is characterized in that a step (.beta.

Abstract: Generally, and in one form of the invention, a method is presented for the photo-stimulated removal of reacted metal contamination 16 from a surface 11, comprising the steps of: covering the surface with a liquid ambient 14; exciting the reacted metal contamination 16 and/or the liquid ambient 14 by photo-stimulation sufficiently to allow reaction of the reacted metal contaminantion 16 with the liquid ambient 14 to form metal products; and removing the liquid ambient 14 and the metal products from the surface 11. Other methods are also disclosed.

Abstract: The invention provides a method for producing semiconductor particles in which a semiconductor material of the type for which particles are desired is placed in an electrolytic solution of an anodic cell. The anodic cell is configured with a cathode also positioned in the electrolytic solution. The electrolytic solution of the anodic cell includes an etchant and a surfactant that is characterized by an attractive affinity for the semiconductor material. To produce semiconductor particles from the semiconductor material, an electrical potential is applied between the semiconductor material in the electrolytic solution and the cathode in the electrolytic solution to anodically etch the semiconductor material. During the etch process, particles of the semiconductor material form and are encapsulated by the surfactant. This method for producing semiconductor particles uses an uncomplicated apparatus and procedure that results in inexpensive and high-volume production of particles of a semiconductor material.

Abstract: An electrochemical etching process carried out in an etching system including an electrolysis vessel which is provided thereinside with facing wall surfaces defining therebetween an etching solution flow region. A semiconductor substrate to be etched and a counter electrode are mounted respectively on the facing wall surfaces. A flow stream generating section for the etching solution is formed separate from the etching solution flow region and includes a device for generating the flow stream of the etching solution. The flow stream generating section is connected to the etching solution flow region in such a manner that the etching solution flow in a direction generally parallel with the facing wall surfaces inside the electrolysis vessel. An electric potential is applied between the semiconductor substrate and the counter electrode to accomplish an electrochemical etching on the semiconductor substrate.

Abstract: A silicon substrate is etched by dipping it in a NH.sub.4 F solution while charging it with a potential more negative than an open-circuit potential. The NH.sub.4 F solution preferably has NH.sub.4 F concentration of 10M or less. The potential applied to the silicon substrate is controlled within the range of from the open-circuit potential to a more negative potential by -1.5 V vs. SCE. Since the etched silicon substrate has flatness in atomic order, it is suitable for the precise fabrications to manufacture high-density ir high-functional semiconductor devices.

Abstract: It is intended to provide an etching method for semiconductor devices in which the etching depth or the thickness of a thin thickness portion can be precisely controlled. According to experiment results, when a P-type substrate in which an N-type epitaxial layer is formed is immersed in an etching solution such as KOH or the like, and a voltage for reverse bias of PN junction is applied between an electrode plate opposing the substrate and the epitaxial layer to perform electrochemical etching, it has been found that the distance from the PN junction plane to the etching stop position is approximately equal to a depletion layer width at the substrate side of the PN junction portion. Namely, the etching stops at the forward end of the depletion layer.

Abstract: Disclosed are electropolishing methods for etching a substrate in self alignment. A hole is formed in a substrate in self alignment by using an electropolishing system, wherein a reaction tube, an etchant solution, an electrode, a constant current source and the silicon substrate, said etchant solution being contained in a space confined by the reaction tube and the substrate, which is attached to one end of the reaction tube in such a way that the bottom of the substrate may be toward the interior of the space, said constant current source being connected with a metal layer formed on the substrate and the electrode. The substrate is made to be porous by flowing a constant current and etched by the action of the etchant solution while breaking the current. In addition to being economical, the methods can determine the position and size of the hole accurately and precisely. Further, neither chemical damage nor mechanical impact is generated on the substrate.

Abstract: A method for manufacturing micro-mechanical components in which a structure is produced on a silicon layer, which is to be undercut in a further step. The silicon is selectively anodized for this undercutting operation. Thus, the method enables the manufacturing of micro-mechanical components that can be integrated together with bipolar circuit elements.

Abstract: A method used in manufacturing a cubically integrated circuit arrangement. A silicon wafer, wherein through pores are produced by electrochemical etching are insulated from the silicon wafer, and are provided with conductive fills, is secured as a carrier plate (24) to a substrate (21) that has components and that is integrated in a cubically integrated circuit arrangement. Terminal pads (25) that are electrically connected to conductive fills and that are arranged on the surface of the carrier plate (24) thereby meet contacts (23) to the components that are arranged at the surface of the substrate (21) adjoining the carrier plate (24) and that are firmly connected thereto.

Abstract: A system for making porous silicon on blank and patterned Si substrates by "immersion scanning", particularly suitable for fabricating light-emitting Si devices and utilizing an open electrolytic cell having a cathode and an opposing anode consisting of a Si substrate on which the porous silicon is to be formed, both disposed, with their opposing surfaces in parallel, in an aqueous HF solution electrolyte contained in the cell. The substrate anode is mounted to be movable relative to the electrolyte so as to be mechanically cycled or scanned in and out of the electrolyte at a programmable rate during anodization. The uniformity, thickness and porosity of the resulting anodized layer on the substrate are determined by the scanning speed, number of cycles, current density, and HF-based electrolyte parameters of the system, and the Si substrate resistivity, conductivity type, and crystal orientation.