Forming Or Treating An Article Whose Final Configuration Has A Projection Patents (Class 216/11)
-
Patent number: 10141155Abstract: An emitter with a protective cap layer on an exterior surface of the emitter is disclosed. The emitter can have a diameter of 100 nm or less. The protective cap layer includes ruthenium. Ruthenium is resistant to oxidation and carbon growth. The protective cap layer also can have relatively low sputter yields to withstand erosion by ions. The emitter may be part of a system with an electron beam source. An electric field can be applied to the emitter and an electron beam can be generated from the emitter. The protective cap layer may be applied to the emitter by sputter deposition, atomic layer deposition (ALD), or ion sputtering.Type: GrantFiled: May 5, 2017Date of Patent: November 27, 2018Assignee: KLA-Tencor CorporationInventors: Gildardo R. Delgado, Edgardo Garcia Berrios, Frances Hill, Rudy Garcia
-
Patent number: 10109682Abstract: A method of producing a transistor array, comprising an array of addressing conductors each providing the source electrodes of a respective set of transistors and at least part of a conductive connection between a respective driver terminal and said source electrodes; wherein the method comprises: forming a conductor layer on a support; and displacing a plurality of portions of said conductor layer relative to other portions of said conductor layer to create from said conductor layer at least (i) said array of addressing conductors and an array of drain conductors at said first level, (ii) conductor element islands in transistor channel regions at a second level, and (iii) one or more further conductor elements at a third level.Type: GrantFiled: May 20, 2015Date of Patent: October 23, 2018Assignee: FLEXENABLE LIMITEDInventor: Matthew James Harding
-
Patent number: 10083812Abstract: An electron source emitter is made from transition metal carbide materials, including hafnium carbide (HfC), zirconium carbide (ZrC), titanium carbide (TiC), vanadium carbide (VC), niobium carbide (NbC), and tantalum carbide (TaC), which are of high refractory nature. Preferential evaporating and subsequent development of different crystallographic planes of the transition metal carbide emitter having initially at its apex a small radius (50 nm-300 nm) develop over time an on-axis, sharp end-form or tip that is uniformly accentuated circumferentially to an extreme angular form and persists over time. An emitter manufactured to the (110) crystallographic plane and operating at high electron beam current and high temperature for about 20 hours to 40 hours results in the (110) plane, while initially not a high emission crystallographic orientation, developing into a very high field emission orientation because of the geometrical change.Type: GrantFiled: November 22, 2016Date of Patent: September 25, 2018Assignee: Applied Physics Technologies, Inc.Inventors: William A. Mackie, Gerald G. Magera, Joshua M. Lovell
-
Patent number: 10012582Abstract: A method of manufacturing a sensor (1), such as a corrosion sensor, a mask including a series of masking elements (21, 22, 23) for masking a corresponding series of sensing elements (12, 13, 14), a sensing element having such a mask and a sensor are provided. The sensor (1) includes a number of metallic strips (12, 13, 14) mounted on a non-conducting substrate (9) and a module (3) for forming electrical connections to the strips whereby to enable communication between the strips (12, 13, 14) and monitoring equipment for the sensor (1). The module includes a number of wire connections (15, 16, 17, 18) and the method includes the steps of encapsulating the wire connections within a flexible chemical and heat resistant sealing compound and subsequently encapsulating the flexible sealing compound within a second sealing compound by an injection molding process. The sensing elements (12, 13, 14) are covered by the masking elements (21, 22, 23) prior painting the sensor (1) with a corrosion-inhibiting paint.Type: GrantFiled: February 4, 2015Date of Patent: July 3, 2018Assignee: BAE Systems plcInventor: Mark David Balmond
-
Patent number: 9993962Abstract: A method can include placing a substrate over a chucking region, wherein the substrate has a primary surface; quantifying a distortion in the substrate, the lithographic template, the imprint apparatus, or any combination thereof; and dispensing a formable material based at least in part on the distortion. The distortion can include a deviation in planarity, a magnification or orthogonality error or the like. In another aspect, an imprint apparatus can include a substrate holder including a chucking region; a template having an imprint surface that includes protrusions, wherein the protrusions define a primary surface; and a processor configured to determine an amount of a formable material to dispense in a particular area based at least in part on an distortion in the substrate, the lithographic template, the imprint apparatus, or any combination thereof.Type: GrantFiled: May 23, 2016Date of Patent: June 12, 2018Assignee: CANON KABUSHIKI KAISHAInventor: Anshuman Cherala
-
Patent number: 9882110Abstract: A thermoelectric device for use with solar cells or other heat sources. A substrate has a manufactured surface with a plurality of highland features and lowland features. Each highland feature defines a peak adjacent to which there is an interface of two different film regions (formed of two different metals, two different semiconductors, or one metal and one semiconductor). The two film regions diverge away from each other with increasing distance from the interface and terminate at distal end regions. In response to a temperature difference between the interface and the distal end regions, the device produces a voltage.Type: GrantFiled: October 19, 2015Date of Patent: January 30, 2018Assignee: CARDINAL CG COMPANYInventor: Klaus Hartig
-
Patent number: 9859119Abstract: A pattern formation method according to an embodiment includes providing a substrate in which protrusions each having a tapered shape are provided on a main surface. The method further includes supplying the main surface with spherical particles equal in diameter to make the spherical particles arrange in a triangular lattice form such that each of the protrusions is at least partially positioned within a region surrounded by the main surface and three of the spherical particles adjacent to one another.Type: GrantFiled: September 2, 2016Date of Patent: January 2, 2018Assignee: Toshiba Memory CorporationInventors: Takeshi Okino, Akira Watanabe, Naoko Kihara, Ryosuke Yamamoto
-
Patent number: 9844888Abstract: A method for forming a cutting tool includes masking a metal base with one or more masks, the one or more masks including at least one variable permeability mask, and chemically etching the masked metal base to form a blade of the cutting tool.Type: GrantFiled: March 1, 2016Date of Patent: December 19, 2017Assignee: Hutchinson Technology IncorporatedInventors: Paul V. Pesavento, Peter F. Ladwig, Michael W. Davis, John A. Theget, Kurt C. Swanson, Joel B. Michaletz, Philip W. Anderson, Timothy A. McDaniel
-
Patent number: 9775233Abstract: The present disclosure provides an article having (a) a substrate having opposing first and second surfaces; and (b) a conductor micropattern disposed on the first surface of the substrate. The conductor micropattern has a plurality of traces defining a plurality of open area cells. The conductor micropattern has an open area fraction greater than 80% and a uniform distribution of trace orientation. Each of the traces is non-linear and has a trace width from 0.5 to 10 micrometer. The articles are useful in devices such as displays, in particular, touch screen displays useful for mobile hand held devices, tablets and computers. They also find use in antennas and for EMI shields.Type: GrantFiled: December 4, 2014Date of Patent: September 26, 2017Assignee: 3M INNOVATIVE PROPERTIES COMPANYInventor: Matthew H. Frey
-
Patent number: 9768025Abstract: A method of fabricating a semiconductor device includes forming a target layer on a substrate, forming a plurality of reference patterns at uniform intervals on the target layer, forming a plurality of spacers on the side surfaces of the reference patterns, forming a plurality of filling patterns in spaces left between the spacers, forming a surface-modified filling pattern by performing a first surface treatment on a portion of the plurality of filling patterns, forming a surface-modified reference pattern by performing a second surface treatment on a portion of the plurality of reference patterns, and removing the plurality of filling patterns and the plurality of reference patterns and leaving the surface-modified filling pattern and the surface-modified reference pattern on the target layer.Type: GrantFiled: June 16, 2016Date of Patent: September 19, 2017Assignee: Samsung Electronics Co., Ltd.Inventors: Yongkong Siew, Sung-Yup Jung
-
Patent number: 9748132Abstract: A substrate supporting member provided in a processing chamber for processing the substrate and configured to support the substrate, has on its upper surface, a protruding area that supports an edge side of the substrate from below; a recessed area provided inside of the protruding area so as not to be brought into contact with the substrate supported by the protruding area; and an auxiliary protruding area formed lower than the protruding area and provided in the recessed area, and has a flow passage that is communicated with inside of the recessed area, for escaping gas between the substrate and the substrate supporting member from the recessed area side.Type: GrantFiled: March 22, 2012Date of Patent: August 29, 2017Assignee: HITACHI KOKUSAI ELECTRIC INC.Inventors: Koichiro Harada, Noriaki Michita, Tatsushi Ueda, Takayuki Sato
-
Patent number: 9744715Abstract: A large area patterned film includes a first patterned area; a second patterned area; and a seam joining the first patterned area and the second patterned area, wherein the seam has a width less than about 20 micrometers. A method for tiling patterned areas includes depositing a predetermined thickness of a curable material; contacting a first portion of the curable material with a mold; curing the first portion of the curable material; removing the mold from the cured first portion of the curable material; contacting a second portion of the curable material with the mold, such that the mold contacts a portion of the cured first portion of the curable material; curing the second portion of the curable material; and removing the mold to yield a seam between the cured first portion of the curable material and the cured second portion of the curable material, wherein the seam has a dimension less than about 20 micrometers.Type: GrantFiled: November 10, 2015Date of Patent: August 29, 2017Assignee: Liquidia Technologies, Inc.Inventors: Alexander Ermochkine, Derek Schorzman, Jacob Sprague
-
Patent number: 9612185Abstract: Methods, systems, and computer readable media for using actuated surface-attached posts for assessing biofluid rheology are disclosed. According to one aspect, a method for testing properties of a biofluid specimen includes placing the specimen onto a micropost array having a plurality of microposts extending outwards from a substrate, wherein each micropost includes a proximal end attached to the substrate and a distal end opposite the proximal end, and generating an actuation force in proximity to the micropost array to actuate the microposts, thereby compelling at least some of the microposts to exhibit motion. The method further includes measuring the motion of at least one of the microposts in response to the actuation force and determining a property of the specimen based on the measured motion of the at least one micropost.Type: GrantFiled: January 15, 2016Date of Patent: April 4, 2017Assignee: The University of North Carolina at Chapel HillInventors: Richard Superfine, Richard Chasen Spero, Adam Richard Shields, Benjamin Aaron Evans, Briana Lee Fiser
-
Patent number: 9597822Abstract: A fine concavo-convex structure product (10) is provided with an etching layer (11), and a resist layer (12) comprised of a heat-reactive resist material for dry etching provided on the etching layer (11), a concavo-convex structure associated with opening portions (12a) formed in the resist layer (12) is formed in the etching layer (11), a pattern pitch P of a fine pattern of the concavo-convex structure ranges from 1 nm to 10 ?m, a pattern depth H of the fine pattern ranges from 1 nm to 10 ?m, and a pattern cross-sectional shape of the fine pattern is a trapezoid, a triangle or a mixed shape thereof. The heat-reactive resist material for dry etching has, as a principal constituent element, at least one species selected from the group consisting of Cu, Nb, Sn, Mn, oxides thereof, nitrides thereof and NiBi.Type: GrantFiled: March 12, 2015Date of Patent: March 21, 2017Assignee: ASAKI KASEI E-MATERIAL CORPORATIONInventor: Yoshimichi Mitamura
-
Patent number: 9581617Abstract: Plural AFM probes with different resolutions are implemented on an apparatus for scanning a nearly free-standing nanometer-scale specimen. The apparatus identifies the location and the shape of the nano structure on a specimen piece using a high resolution AFM probe, and then measures a three-dimensional shape of the identified nano structure using an atomic resolution AFM probe.Type: GrantFiled: December 28, 2015Date of Patent: February 28, 2017Assignee: Korea Advanced Institute of Science and TechnologyInventors: Jhinhwan Lee, Donghyeon Son
-
Patent number: 9567213Abstract: A hermetic package comprising a substrate (110) having a surface with a MEMS structure (101) of a first height (101a), the substrate hermetically sealed to a cap (120) forming a cavity over the MEMS structure; the cap attached to the substrate surface by a vertical stack (130) of metal layers adhering to the substrate surface and to the cap, the stack having a continuous outline surrounding the MEMS structure while spaced from the MEMS structure by a distance (140); the stack having a bottom first metal seed film (131a) adhering to the substrate and a bottom second metal seed film (131b) adhering to the bottom first seed film, both seed films of a first width (131c) and a common sidewall (138); further a top first metal seed film (132a) adhering to the cap and a top second metal seed film (132b) adhering to the top first seed film, both seed films with a second width (132c) smaller than the first width and a common sidewall (139); the bottom and top metal seed films tied to a metal layer (135) including gold-Type: GrantFiled: August 17, 2015Date of Patent: February 14, 2017Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: John Charles Ehmke, Virgil Cotoco Ararao
-
Patent number: 9561356Abstract: Out-of-plane microneedle manufacturing process comprising the simultaneous creation of a network of microneedles and the creation of a polygonal shaped hat (2) above each microneedle (1) under formation, said process comprising the following steps: providing bridges (3) between the hats (3), maintaining the bridges (3) during the remaining microneedle manufacturing steps, removing the bridges (3), together with the hats (2), when the microneedles (1) are formed.Type: GrantFiled: January 6, 2016Date of Patent: February 7, 2017Assignee: Debiotech S.A.Inventors: Astrid Cachemaille, François Cannehan
-
Patent number: 9526885Abstract: Microneedles with sharpened tips are fabricated without any reduction to the shaft diameter below the tip. By sharpening the tip and not the entire length of the microneedle, their mechanical strength is maintained. The microneedles are fabricated out of a wafer substrate using lithography and deep reactive-ion etching (DRIE). By controlling the timing of the DRIE as the photoresist depletes, the sharpness and angle of the tips are controlled.Type: GrantFiled: March 24, 2014Date of Patent: December 27, 2016Assignee: University of South FloridaInventors: Puneet Khanna, Shekhar Bhansali
-
Patent number: 9522821Abstract: The invention provides a fabrication method of batch producing nano-scale structures, such as arrays of silicon pillars of high aspect ratio. The invention also relates to providing arrays of high aspect ratio silicon pillars fabricated using the improved fabrication method. The array of silicon pillars is fabricated from arrays of low aspect ratio pyramid-shaped structures. Mask formed from a hard material, such as a metal mask, is formed on top of each of the pyramid-shaped structures in a batch process. The pyramid-shaped structures are subsequently etched to remove substrate materials not protected by the hard masks, so that a high aspect ratio pillar or shaft is formed on the pyramid-shaped low aspect ratio base, resulting in an array of high aspect ratio silicon pillars.Type: GrantFiled: April 9, 2014Date of Patent: December 20, 2016Inventors: Bo Cui, Ripon Kumar Dey
-
Patent number: 9508520Abstract: An integrated vacuum microelectronic device comprises: a highly doped semiconductor substrate, at least one insulating layer) placed above said doped semiconductor substrate, a vacuum aperture formed within said at least one insulating layer and extending to the highly doped semiconductor substrate, a first metal layer acting as a cathode, a second metal layer placed under said highly doped semiconductor substrate and acting as an anode. The first metal layer is placed adjacent to the upper edge of the vacuum aperture and the vacuum aperture has a width dimension such as the first metal layer remains suspended over the vacuum aperture.Type: GrantFiled: May 29, 2014Date of Patent: November 29, 2016Assignee: STMICROELECTRONICS S.R.L.Inventor: Davide Giuseppe Patti
-
Patent number: 9496392Abstract: An integrated vacuum microelectronic structure is described as having a highly doped semiconductor substrate, a first insulating layer placed above said doped semiconductor substrate, a first conductive layer placed above said first insulating layer, a second insulating layer placed above said first conductive layer, a vacuum trench formed within said first and second insulating layers and extending to the highly doped semiconductor substrate, a second conductive layer placed above said vacuum trench and acting as a cathode, a third metal layer placed under said highly doped semiconductor substrate and acting as an anode, said second conductive layer is placed adjacent to the upper edge of said vacuum trench, the first conductive layer is separated from said vacuum trench by portions of said second insulating layer and is in electrical contact with said second conductive layer.Type: GrantFiled: March 24, 2015Date of Patent: November 15, 2016Assignee: STMICROELECTRONICS S.R.L.Inventors: Davide Giuseppe Patti, Gianleonardo Grasso
-
Patent number: 9484211Abstract: A system and method for manufacturing semiconductor devices is provided. An embodiment comprises using an etchant to remove a portion of a substrate to form an opening with a 45° angle with a major surface of the substrate. The etchant comprises a base, a surfactant, and an oxidant. The oxidant may be hydrogen peroxide.Type: GrantFiled: January 24, 2013Date of Patent: November 1, 2016Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Wan-Yu Lee, Ying-Hao Kuo, Hai-Ching Chen, Tien-I Bao
-
Patent number: 9449836Abstract: There is provided a manufacturing method of a semiconductor device including forming a first pattern of first features, according to a lithography process, in a photoresist layer disposed on a substrate, the lithography process having a minimum printable dimension and a minimum printable pitch, applying an additional layer on the photoresist layer having the first pattern formed therein, forming a second pattern of second features in the additional layer, the second features concentric with the first features, and etching portions of the substrate exposed through the second pattern. Further, in the provided method, the first features include geometrical features separated by a distance less than the dimension of minimum printable feature, and the geometrical features are disposed at a pitch less than the minimum printable pitch.Type: GrantFiled: July 1, 2014Date of Patent: September 20, 2016Assignee: Renesas Electronics CorporationInventor: Yoshinori Matsui
-
Patent number: 9356151Abstract: In some embodiments, the present disclosure pertains to methods of preparing graphene nanoribbons from a graphene film associated with a meniscus, where the method comprises patterning the graphene film while the meniscus acts as a mask above a region of the graphene film, and where the patterning results in formation of graphene nanoribbons from the meniscus-masked region of the graphene film. Additional embodiments of the present disclosure pertain to methods of preparing wires from a film associated with a meniscus, where the method comprises patterning the film while the meniscus acts as a mask above a region of the film, and where the patterning results in formation of a wire from the meniscus-masked region of the film. Additional embodiments of the present disclosure pertain to chemical methods of preparing wires from water-reactive materials.Type: GrantFiled: February 3, 2014Date of Patent: May 31, 2016Assignee: WILLIAM MARSH RICE UNIVERSITYInventors: James M. Tour, Vera Abramova, Alexander Slesarev
-
Patent number: 9293345Abstract: Semiconductor devices and sidewall image transfer methods with a spin on hardmask. Methods for forming fins include forming a trench through a stack of layers that includes a top and bottom insulator layer, and a layer to be patterned on a substrate; isotropically etching the top and bottom insulator layers; forming a hardmask material in the trench to the level of the bottom insulator layer; isotropically etching the top insulator layer; and etching the bottom insulator layer and the layer to be patterned down to the substrate to form fins from the layer to be patterned.Type: GrantFiled: August 16, 2013Date of Patent: March 22, 2016Assignee: GLOBALFOUNDRIES INC.Inventors: Hong He, Chiahsun Tseng, Chun-Chen Yeh, Yunpeng Yin
-
Patent number: 9280185Abstract: The present invention pertains to a conductive sheet and a touch panel. A first conductive pattern and a second conductive pattern are both configured from the combination of a plurality of first lattices and a plurality of second lattices having a size that is larger than that of the first lattices. Of the first conductive pattern, the portion facing the second conductive pattern is configured from a plurality of second lattices, of the second conductive pattern, the portion facing the first conductive pattern is configured from a plurality of second lattices, and when seen from the top surface, the portions at which the first conductive pattern and the second conductive pattern are facing have a form that combines a plurality of first lattices.Type: GrantFiled: November 12, 2013Date of Patent: March 8, 2016Assignee: FUJIFILM CorporationInventor: Tadashi Kuriki
-
Patent number: 9277642Abstract: A method of making an imprinted micro-wire structure includes providing a substrate having an edge area and a central area separate from the edge area and providing first, second, and third different stamps. A curable bottom, connecting layer, and top layer are formed on the substrate. A bottom-layer micro-channel is imprinted in the bottom layer in the central area and the edge area, a connecting-layer micro-channel is imprinted in the connecting layer in the edge area over the bottom-layer micro-channel, an edge micro-channel is imprinted in the top layer in the edge area over the connecting-layer micro-channel, and top-layer micro-channels are imprinted in the top layer over the central area. Micro-wires are formed in each micro-channel. The bottom-layer micro-wire in the central area is electrically connected to the edge micro-wire in the edge area and is electrically isolated from the top-layer micro-wire.Type: GrantFiled: August 28, 2013Date of Patent: March 1, 2016Assignee: EASTMAN KODAK COMPANYInventor: Ronald Steven Cok
-
Patent number: 9277656Abstract: Method for producing a substrate comprising at least one getter material arranged on the walls of at least one blind hole, comprising at least the steps of: etching the blind hole through a first face of the substrate, depositing a continuous layer of getter material on the whole of the first face of the substrate and at least on the side walls of the blind hole, etching part of the layer of getter material located on the first face of the substrate such that said first face of the substrate is no longer covered by the getter material, in which the step of etching part of the layer of getter material comprises the implementation of an etching by ion beam machining, or chemical-mechanical planarization or polishing.Type: GrantFiled: November 24, 2014Date of Patent: March 1, 2016Assignee: Comissariat a l'énergie atomique et aux énergies alternativesInventors: Sophie Giroud, Christine Ferrandon
-
Patent number: 9230589Abstract: The embodiments disclose a method including creating at least one first structure including magnetically isolated features in servo fields, and creating at least one second structure including finger-structure patterns including intentional weak nucleation points in servo fields to create a regular bi-polar magnetization direction after bulk DC initialization, and wherein the first and second structures form bi-polar complementary structure patterns.Type: GrantFiled: March 6, 2014Date of Patent: January 5, 2016Assignee: Seagate Technology LLCInventors: Philip Steiner, René J. M. van de Veerdonk
-
Patent number: 9214553Abstract: One method disclosed includes, among other things, forming an initial fin structure comprised of portions of a substrate, a first epi semiconductor material and a second epi semiconductor material, forming a layer of insulating material so as to over-fill the trenches that define the fin, recessing a layer of insulating material such that a portion, but not all, of the second epi semiconductor portion of the final fin structure is exposed, forming a gate structure around the final fin structure, further recessing the layer of insulating material such that the first epi semiconductor material is exposed, removing the first epi semiconductor material to thereby define an under-fin cavity and substantially filling the under-fin cavity with a stressed material.Type: GrantFiled: March 7, 2014Date of Patent: December 15, 2015Assignees: GLOBALFOUNDRIES Inc., International Business Machines CorporationInventors: Xiuyu Cai, Ruilong Xie, Ajey P. Jacob, Witold P. Maszara, Kangguo Cheng, Ali Khakifirooz
-
Patent number: 9164130Abstract: A method for manufacturing a probe, includes forming a recess on a sacrificial layer with a resist matching a plane pattern of the probe and a fixing tab connected to the probe, the recess exposing the sacrificial layer, which is on a baseboard, forming the probe and the fixing tab connected to the probe by depositing a probe material in the recess, and removing the resist, removing a portion of the sacrificial layer in an etching process. The portion of the sacrificial layer under the probe is fully removed, while the portion of the sacrificial layer under the fixing tab is left to provide support portions of the sacrificial layer under the fixing tab. Then the probe is removed from the baseboard.Type: GrantFiled: October 21, 2013Date of Patent: October 20, 2015Assignee: KABUSHIKI KAISHA NIHON MICRONICSInventor: Mika Nasu
-
Patent number: 9159641Abstract: An array of through-silicon vias (TSVs) are formed in a silicone substrate. The vias can be tapered such that the diameter of the via at the surface of the substrate is larger than the diameter of the via at its bottom, with the diameter varying continuously along its depth. After the via is formed, it is seeded with a thin layer of nanocrystalline diamond (NCD) particles, and a NCD film is grown on the bottom and along the sidewalls of the via. The presence of the diamond-filled vias provides improved thermal management to semiconductor devices formed on the silicon substrate.Type: GrantFiled: March 14, 2014Date of Patent: October 13, 2015Assignee: The Government of the United States of America, as represented by the Secretary of the NavyInventors: Karl D. Hobart, Marko J. Tadjer, Tatyana I. Feygelson, Bradford B. Pate, Travis J. Anderson
-
Patent number: 9116173Abstract: A contact probe includes a base material, a carbon film provided on a tip of the contact probe and configured to contact with an electrode, and an intermediate layer provided between the carbon film and the base material. The carbon film includes a metal element. A concentration of the metal element in the carbon film surface is lower than an average concentration of the metal element in a whole of the carbon film. The carbon film further includes: a plurality of layers, each of the plurality of layers having a uniform concentration of the metal element along a direction of a thickness of the carbon film; a layer in which the concentration of the metal element is continuously changed along a direction of a thickness of the carbon film; or both thereof.Type: GrantFiled: May 10, 2011Date of Patent: August 25, 2015Assignees: Kobe Steel, Ltd., KOBELCO RESEARCH INSTITUTE, INC.Inventors: Takayuki Hirano, Takashi Kobori
-
Patent number: 9101056Abstract: A method of making an imprinted micro-wire structure includes providing a substrate having an edge area and a central area separate from the edge area and providing a first stamp and a multi-level second stamp. A curable bottom layer and multi-layer are provided on the substrate. A bottom-layer micro-channel is imprinted in the bottom layer. A multi-layer micro-channel and a top-layer micro-channel are imprinted in the multi-layer. Micro-wires are formed in each micro-channel. The bottom-layer micro-wire extends from the central area into the edge area. The multi-layer micro-wire contacts the bottom-layer micro-wire in the edge area. The top-layer micro-wire is over the central area and is separate from the multi-layer micro-wire and the bottom-layer micro-channel. The bottom-layer micro-wire is electrically connected to the multi-layer micro-wire and is electrically isolated from the top-layer micro-wire.Type: GrantFiled: August 28, 2013Date of Patent: August 4, 2015Assignee: EASTMAN KODAK COMPANYInventor: Ronald Steven Cok
-
Publication number: 20150128413Abstract: A three-dimensional neural probe electrode array system is described. Planar probes are microfabricated and electrically connected to flexible micro-machined ribbon cables using a rivet bonding technique. The distal end of each cable is connected to a probe with the proximal end of the cable being customized for connection to a printed circuit board. Final assembly consists of combining multiple such assemblies into a single structure. Each of the two-dimensional neural probe arrays is positioned into a micro-machined platform that provides mechanical support and alignment for each array. Lastly, a micro-machined cap is placed on top of each neural electrode probe and cable assembly to protect them from damage during shipping and subsequent use. The cap provides a relatively planar surface for attachment of a computer controlled inserter for precise insertion into the tissue.Type: ApplicationFiled: November 10, 2014Publication date: May 14, 2015Inventors: RIO J. VETTER, Jamille Farraye Hetke, David S. Pellinen, Bencharong Suwarato, Kc Kong
-
Patent number: 9031684Abstract: A method and system for integrated circuit fabrication is disclosed. In an example, the method includes determining a first process parameter of a wafer and a second process parameter of the wafer, the first process parameter and the second process parameter corresponding to different wafer characteristics; determining a variation of a device parameter of the wafer based on the first process parameter and the second process parameter; constructing a model for the device parameter as a function of the first process parameter and the second process parameter based on the determined variation of the device parameter of the wafer; and performing a fabrication process based on the model.Type: GrantFiled: November 1, 2011Date of Patent: May 12, 2015Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Nai-Han Cheng, Chin-Hsiang Lin, Chi-Ming Yang, Chun-Lin Chang, Chih-Hong Hwang
-
Publication number: 20150126846Abstract: Electrodes providing excellent recording and physical stability. Electrodes are disclosed that may include a plurality of small teeth that possess a novel design shape and orientation. The shallow and relatively long teeth run parallel to the rim of the electrode that presses against the patient's skin. When the electrode is twisted onto skin, the tiny teeth penetrate the stratum corneum and move nearly horizontally under the stratum corneum, thus anchoring the electrode securely to the skin. The electrodes cause minimal discomfort to the patient since the small teeth do not extend to the pain fibers which are located in deeper layers of the skin. The electrodes may be fabricated in a variety of geometries including cylindrical, disk, and blunt bullet or top shapes. In some instances, the electrodes may be connected to detachable leads having magnetic properties.Type: ApplicationFiled: February 6, 2012Publication date: May 7, 2015Applicant: University of Pittsburgh - of the Commonwealth System of Higher EducationInventors: Wenyan Jia, Mingui Sun, Robert Joseph Sclabassi
-
Patent number: 9023226Abstract: The present disclosure provides a method for manufacturing a particle source comprising: placing a metal wire in vacuum, introducing active gas, adjusting a temperature of the metal wire and applying a positive high voltage V to the metal wire to generate at a side of the head of the metal wire an etching zone in which field induced chemical etching (FICE) is performed; increasing by the FICE a surface electric field at the top of the metal wire head to be greater than a field evaporation electric field of material for the metal wire, so that metal atoms at the top of the metal wire are evaporated off; after the field evaporation is activated by the FICE, causing mutual adjustment between the FICE and the field evaporation, until the head of the metal wire has a shape of combination of a base and a tip on the base; and stopping the FICE and the field evaporation when the head of the metal wire takes a predetermine shape.Type: GrantFiled: May 4, 2012Date of Patent: May 5, 2015Assignee: 38th Research Institute, China Electronics Technology Group CorporationInventors: Huarong Liu, Ping Chen
-
Patent number: 9017562Abstract: The present disclosure provides a method for manufacturing a particle source, comprising: placing a metal wire in vacuum, introducing active gas and catalyst gas, adjusting a temperature of the metal wire, and applying a positive high voltage V to the metal wire to dissociate the active gas at the surface of the metal wire, in order to generate at a peripheral surface of the head of the metal wire an etching zone in which field induced chemical etching (FICE) is performed; increasing by the FICE a surface electric field at the top of the metal wire head to be greater than the to evaporation field of the material for the metal wire, so that metal atoms at the wire apex are evaporated off; after the field evaporation is activated by the FICE, causing mutual adjustment between the FICE and the field evaporation, until the head of the metal wire has a shape of combination of a base and a tip on the base; and stopping the FICE and the field evaporation when the head of the metal wire takes a predetermine shape.Type: GrantFiled: December 26, 2012Date of Patent: April 28, 2015Assignee: 38th Research Institute, China Electronics Technology Group CorporationInventor: Huarong Liu
-
Publication number: 20150107472Abstract: Banks, as well as a plurality of substantially recess-shaped cells defined by the banks, are provided in an image section formed in a gravure printing plate. Each of edge cells located along an outer edge of the image section is provided with a projecting portion that projects from a part of a base surface of that edge cell, and each projecting portion is distanced from the banks and located closer to the outer edge than the center of the corresponding edge cell. Preferably, the projecting portions and the banks that face the outer edge are positioned at a predetermined interval from the outer edge, and substantially frame-shaped recess portions that extend continuously along the outer edge are provided in the image section.Type: ApplicationFiled: September 24, 2014Publication date: April 23, 2015Applicant: MURATA MANUFACTURING CO., LTD.Inventor: Kazuhiro YOSHIDA
-
Publication number: 20150102006Abstract: Isolation of magnetic layers in the magnetoresistive stack is achieved by passivation of sidewalls of the magnetic layers or deposition of a thin film of non-magnetic dielectric material on the sidewalls prior to subsequent etching steps. Etching the magnetic layers using a non-reactive gas further prevents degradation of the sidewalls.Type: ApplicationFiled: June 4, 2014Publication date: April 16, 2015Inventors: Chaitanya Mudivarthi, Sarin A. Deshpande, Sanjeev Aggarwal
-
Patent number: 8999178Abstract: A method for fabricating a sharpened needle-like emitter, the method including: electrolytically polishing an end portion of an electrically conductive emitter material so as to be tapered toward a tip portion thereof; performing a first etching in which the electrolytically polished part of the emitter material is irradiated with a charged-particle beam to form a pyramid-like sharpened part having a vertex including the tip portion; performing a second etching in which the tip portion is further sharpened through field-assisted gas etching, while observing a crystal structure at the tip portion by a field ion microscope and keeping the number of atoms at a leading edge of the tip portion at a predetermined number or less; and heating the emitter material to arrange the atoms at the leading edge of the tip portion of the sharpened part in a pyramid shape.Type: GrantFiled: May 15, 2014Date of Patent: April 7, 2015Assignee: Hitachi High-Tech Science CorporationInventors: Yasuhiko Sugiyama, Kazuo Aita, Fumio Aramaki, Tomokazu Kozakai, Osamu Matsuda, Anto Yasaka
-
Patent number: 8999177Abstract: Out-of-plane microneedle manufacturing process comprising the simultaneous creation of a network of microneedles and the creation of a polygonal shaped hat (2) above each microneedle (1) under formation, said process comprising the following steps: providing bridges (3) between the hats (3), maintaining the bridges (3) during the remaining microneedle manufacturing steps, removing the bridges (3), together with the hats (2), when the microneedles (1) are formed.Type: GrantFiled: October 17, 2008Date of Patent: April 7, 2015Assignee: Debiotech S.A.Inventors: Astrid Cachemaille, Francois Cannehan
-
Patent number: 8993445Abstract: Methods are provided for facilitating fabricating a semiconductor device by selectively etching a gate structure sidewall(s) to facilitate subsequent sidewall spacer isolation. The method includes, for instance: providing a gate structure with a protective layer(s) over the gate structure, the gate structure including one or more sidewalls; selectively removing a portion of the gate structure along at least one sidewall to partially undercut the protective layer(s); and forming a sidewall spacer(s) over the sidewall(s) of the gate structure, with a portion of the sidewall spacer at least partially filling the partial undercut of the protective layer(s), and residing below the protective layer(s). In certain embodiments, the selectively removing includes implanting the sidewall(s) with a dopant to produce a doped region(s) of the gate structure, and subsequently, at least partially removing the doped region(s) of the gate structure selective to an undoped region of the gate structure.Type: GrantFiled: January 14, 2013Date of Patent: March 31, 2015Assignee: GLOBALFOUNDRIES Inc.Inventors: Dae-Han Choi, Dae Geun Yang, Chang Ho Maeng, Wontae Hwang
-
Publication number: 20150083465Abstract: A transparent or conductive substrate and its manufacturing method are provided. The transparent or conductive substrate comprises a base substrate capable of light transmission; a transparent electroconductive layer formed by depositing a transparent electroconductive material; and an anti-reflection layer, wherein the anti-reflection layer is formed by using a dry etching method and comprises a plurality of spine-type structures and an anti-reflection structure formed by depositing inorganic particles.Type: ApplicationFiled: May 7, 2012Publication date: March 26, 2015Applicant: KOREA INSTITUTE OF MACHINERY & MATERIALSInventors: Jung Heum Yun, Gun Hwan Lee, Yeon Hyun Park, Sung Hun Lee
-
Publication number: 20150060392Abstract: A three-dimensional nanostructures and a method for fabricating the same, and more particularly to three-dimensional structures of various shapes having high aspect ratio and uniformity in large area and a method of fabricating the same by attaching a target material to the outer surface of patterned polymer structures using an ion bombardment phenomenon occurring during a physical ion etching process to form target material-polymer composite structures, and then removing the polymer from the target material-polymer structures. A three-dimensional nanostructures with high aspect ratio and uniformity can be fabricated by a simple process at low cost by using the ion bombardment phenomenon occurring during physical ion etching. Also, nanostructures of various shapes can be easily fabricated by controlling the pattern and shape of polymer structures. In addition, uniform fine nanostructures having a thickness of 10 nm or less can be formed in a large area.Type: ApplicationFiled: October 10, 2014Publication date: March 5, 2015Applicant: Korea Advanced Institute of Science and TechnologyInventors: Hee-Tae JUNG, Hwan-Jin Jeon, Kyoung-Hwan Kim, Youn-Kyoung Baek
-
Publication number: 20150054398Abstract: The present invention discloses an electrode material that eases electron injection and does not react with contact substances. The structure of the material includes a conductive substrate plane on the top of which an emissive material is coated. The emissive coating bonds strongly with the substrate plane. The emissive material is of low work function and high chemical stability.Type: ApplicationFiled: December 31, 2012Publication date: February 26, 2015Inventor: Jian Xin Yan
-
Patent number: 8961799Abstract: A method of forming a nano-structured substrate is provided, the method comprising including forming non-integral nano-pillars on a substrate surface and directionally etching the substrate surface using the non-integral nano-pillars as a mask to form integral nano-structures in the substrate.Type: GrantFiled: October 13, 2011Date of Patent: February 24, 2015Assignee: Hewlett-Packard Development Company, L.P.Inventors: Peter Mardilovich, Anthony M. Fuller, Qingqiao Wei
-
Publication number: 20150049595Abstract: An apparatus includes a slider, a light source disposed upon an outer surface of the slider and a projection extending above the outer surface of the slider. The light source comprises a resonant cavity aligned with the outer surface of the slider. The projection comprises an optical turning element that is optically coupled to the light source. Also included are methods of fabrication thereof.Type: ApplicationFiled: August 15, 2013Publication date: February 19, 2015Applicant: Seagate Technology LLCInventor: Ralph Kevin Smith
-
Patent number: 8956545Abstract: The present invention relates to a method for fabricating a hollow microneedle having a variable appearance. The method makes it possible to vary the length of the microneedle, the outer and inner diameters of the upper and lower parts thereof, the aspect ratio, the sharpness, and the structural bending rate thereof, in accordance with the purposes of the same. Accordingly, the appearance of the hollow microneedles according to the present invention can be varied with flexibility according to various purposes, such as the transferring of medication and the taking of a blood sample, and to various factors, such as the target part for the medication transfer, the depth of the medication transfer, and the amount and viscosity of the medication. Thus, the microneedle can be used as a multi-purpose device for transferring medication.Type: GrantFiled: July 8, 2011Date of Patent: February 17, 2015Assignee: Incyto Co., Ltd.Inventors: Hyung Il Jung, Kwang Lee, Sin Kil Cho, Young Dook Byeon