Mask Is Multilayer Resist Patents (Class 216/47)
  • Publication number: 20090212010
    Abstract: Etching of carbonaceous layers with an etchant gas mixture including molecular oxygen (O2) and a gas including a carbon sulfur terminal ligand. A high RF frequency source is employed in certain embodiments to achieve a high etch rate with high selectivity to inorganic dielectric layers. In certain embodiments, the etchant gas mixture includes only the two components, COS and O2, but in other embodiments additional gases, such as at least one of molecular nitrogen (N2), carbon monoxide (CO) or carbon dioxide (CO2) may be further employed to etch to carbonaceous layers.
    Type: Application
    Filed: February 21, 2008
    Publication date: August 27, 2009
    Inventors: Judy Wang, Shawming Ma, Chang-Lin Hsieh, Bryan Liao, Jie Zhou, Hun Sang Kim
  • Publication number: 20090206053
    Abstract: A plasma etching method etching an organic underlayer film formed on a target substrate by using a plasma of a processing gas via a pattered mask layer formed on the underlayer film. The processing gas includes a gaseous mixture of an oxygen-containing gas and a sulfur-containing gas not having oxygen. The oxygen-containing gas is one of O2 gas, CO gas, CO2 gas or a combination thereof and the mask layer is formed of a silicon-containing inorganic compound.
    Type: Application
    Filed: February 18, 2009
    Publication date: August 20, 2009
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Akitaka Shimizu, Masanobu Honda
  • Patent number: 7576009
    Abstract: A method for forming a fine pattern of a semiconductor device comprises forming a deposition pattern including first, second, and third mask patterns over a semiconductor substrate having an underlying layer, side-etching the second mask pattern with the third mask pattern as an etching barrier mask, removing the third mask pattern, forming a spin-on-carbon layer that exposes the upper portion of the second mask pattern, performing an etching process to expose the underlying layer with the spin-on-carbon layer as an etching barrier mask, and removing the spin-on-carbon layer.
    Type: Grant
    Filed: November 30, 2007
    Date of Patent: August 18, 2009
    Assignee: Hynix Semiconductor Inc.
    Inventors: Ki Lyoung Lee, Cheol Kyu Bok, Keun Do Ban
  • Publication number: 20090194503
    Abstract: A method of dry developing a multi-layer mask having a silicon-containing anti-reflective coating (ARC) layer on a substrate is described. The method comprises forming the multi-layer mask on the substrate, wherein the multi-layer mask comprises a lithographic layer overlying the silicon-containing ARC layer. A feature pattern is then formed in the lithographic layer using a lithographic process. Thereafter, the feature pattern is transferred from the lithographic layer to the silicon-containing ARC layer using a dry plasma etching process, wherein the offset in the critical dimension (CD) bias is reduced between nested structures and isolated structures.
    Type: Application
    Filed: February 1, 2008
    Publication date: August 6, 2009
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Akiteru Ko, Christopher Cole
  • Patent number: 7565732
    Abstract: A method of fabricating a magnetic write head, in accordance with one embodiment, includes forming a beveled write pole. A conformal spacer may be formed upon a portion of a flare length proximate a tip of the write pole. A shield layer may also be formed upon the conformal spacer adjacent the flare length proximate the tip of the write pole.
    Type: Grant
    Filed: August 31, 2004
    Date of Patent: July 28, 2009
    Assignee: Hitachi Global Storage Technologies Netherlands B.V.
    Inventors: Quang Le, Howard Zolla, Nian-Xiang Sun
  • Patent number: 7563382
    Abstract: A method of fabricating a mask which can endure use for a long time and can be used for forming an isolated pattern with a high aspect ratio. The method includes the steps of: forming a soft material layer by disposing a soft material having positive photo sensitivity and adhesion or adhesiveness on a material as a target of machining; forming a hard material layer by disposing an opaque hard material in which a desired mask pattern has been formed in advance on the soft material layer; and forming the mask pattern in the soft material layer by performing exposure to light and development on the soft material layer by using the hard material layer as a photomask.
    Type: Grant
    Filed: August 27, 2004
    Date of Patent: July 21, 2009
    Assignee: FUJIFILM Corporation
    Inventor: Atsushi Osawa
  • Publication number: 20090179004
    Abstract: A pattern formation method according to one embodiment includes: depositing a first C-containing film and a first inorganic layer pattern above a workpiece, the first inorganic layer pattern being comprised of linear patterns arranged in parallel and having a longitudinal direction in a predetermined direction; depositing a second C-containing film and a second inorganic layer pattern above the first C-containing film and the first inorganic layer pattern, at least a portion of the second inorganic layer pattern being comprised of linear patterns arranged in parallel and intersecting with the first inorganic layer pattern; removing the first and second C-containing films other than regions located substantially directly below at least one of the first and second inorganic layer patterns by etching, to form an etching mask including the first and second inorganic layer patterns and the etched first and second C-containing films; and forming a pattern of the workpiece by etching the workpiece using the etching
    Type: Application
    Filed: January 8, 2009
    Publication date: July 16, 2009
    Inventor: Seiji KAJIWARA
  • Patent number: 7550044
    Abstract: Techniques for magnetic device fabrication are provided. In one aspect, a method of patterning at least one, e.g., nonvolatile, material comprises the following steps. A hard mask structure is formed on at least one surface of the material to be patterned. The hard mask structure is configured to have a base, proximate to the material, and a top opposite the base. The base has one or more lateral dimensions that are greater than one or more lateral dimensions of the top of the hard mask structure, such that at least one portion of the base extends out laterally a substantial distance beyond the top. The top of the hard mask structure is at a greater vertical distance from the material being etched than the base. The material is etched.
    Type: Grant
    Filed: April 8, 2008
    Date of Patent: June 23, 2009
    Assignee: International Business Machines Corporation
    Inventors: Michael C. Gaidis, Sivananda K. Kanakasabapathy, Eugene J. O'Sullivan
  • Publication number: 20090142931
    Abstract: A cleaning method following an opening etching is provided. First, a semiconductor substrate having a dielectric layer is provided. The hard mask layer includes at least a metal layer. The opening etch is then carried out to form at least an opening in the dielectric layer. A nitrogen (N2) treatment process is performed to clean polymer residues having carbon-fluorine (C—F) bonds remained in the opening. Finally, a wet cleaning process is performed.
    Type: Application
    Filed: November 29, 2007
    Publication date: June 4, 2009
    Inventors: Chieh-Ju Wang, Jyh-Cherng Yau, Yu-Tsung Lai, Jiunn-Hsiung Liao
  • Patent number: 7534723
    Abstract: Methods of forming a fine pattern include forming an underlying layer on a substrate, forming preliminary hard mask patterns having a first pitch on the underlying layer, the preliminary hard mask patterns having a first width and being spaced apart from each other by a second width smaller than the first width. The underlying layer is etched using the preliminary hard mask patterns as etch masks to thereby form preliminary underlying patterns. The preliminary hard mask patterns are pulled back, thereby forming hard mask patterns on the preliminary underlying patterns. An overlayer is formed on the substrate exposing top surfaces of the hard mask patterns. The hard mask patterns and the preliminary underlying patterns disposed below the hard mask patterns are etched using the overlayer as an etch mask, thereby forming underlying patterns having a second pitch smaller than the first pitch, and the overlayer is removed.
    Type: Grant
    Filed: September 11, 2006
    Date of Patent: May 19, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jae-Hyun Park, Jae-Hee Oh, Se-Ho Lee, Won-Cheol Jeong
  • Patent number: 7531104
    Abstract: A method of making micro-optic elements. In one embodiment, photo-resist elements each having predetermined dimensions are transferred onto a substrate. The photo-resist elements are exposed to a reflow process to shape the top surface of the elements into a curved surface. The method also involves a reactive ion etching process having controlled parameters, such as a photo-resist depth and the selectivity between the substrate and photo-resist. A predetermined photo-resist depth and selectivity form a micro-optic element having a predetermined shape, preferably an elliptical or parabolic shape. In another aspect of the present invention, a micro-optic element is used to construct a micro-mirror for eliminating filamentation and promoting single mode operation of high-power broad area semiconductor lasers.
    Type: Grant
    Filed: March 20, 2002
    Date of Patent: May 12, 2009
    Inventor: Ruey-Jen Hwu
  • Patent number: 7526856
    Abstract: A method for fabricating sliders (magnetic heads) with a recessed surface around a magnetic feature such as the active components of the write head on the air-bearing surface (ABS) is described. An embodiment of the method applies a positive photoresist to the exposed ABS surface, a magnetic field is applied, then liquid ferrofluid is applied on top of the photoresist. The pole pieces around the write gap will interact with the applied magnetic field so that the field gradient is highest around the write gap and the mobile ferrofluid will preferentially collect in the areas of the surface having the highest magnetic field gradient. The opaque magnetic particles in the ferrofluid form an optical ferrofluid mask over the photoresist around the write gap. The unmasked surface of the slider is milled which results in the recession of material around the write gap.
    Type: Grant
    Filed: March 27, 2006
    Date of Patent: May 5, 2009
    Assignee: Hitachi Global Technologies Netherlands B.V.
    Inventor: Vladimir R. Nikitin
  • Patent number: 7524432
    Abstract: A method of forming a metal pattern comprising forming a metal film having a lower layer made of a metal and an upper layer made of a metal different from the metal of the lower layer, forming a resist film having a predetermined pattern on the upper layer, and patterning the metal film by etching the metal film using the resist film as a mask. Here, patterning the metal film comprises etching the upper layer, immersing the resist film and the upper layer in a pretreatment liquid containing a nonionic surfactant after the first etching process, and etching the lower layer after the immersing process.
    Type: Grant
    Filed: March 15, 2007
    Date of Patent: April 28, 2009
    Assignee: Seiko Epson Corporation
    Inventors: Shinya Momose, Kazushige Hakeda
  • Patent number: 7510976
    Abstract: A plasma etch process for successively different layers, including an anti-reflection coating (ARC), an amorphous carbon layer (ACL) and a dielectric layer, with successively different etch chemistries is performed in a single plasma reactor chamber. A first transition step is performed after etching the ARC by replacing the fluorine-containing process gas used in the ARC etch step with an inert species process gas. A flush step is performed after etching the ACL by replacing the hydrogen-containing process gas used in the ACL etch step with argon gas.
    Type: Grant
    Filed: May 16, 2006
    Date of Patent: March 31, 2009
    Assignee: Applied Materials, Inc.
    Inventors: Shing-Li Sung, Wonseok Lee, Judy Wang, Shawming Ma
  • Publication number: 20090078676
    Abstract: The invention provides a dry etching method for processing a wafer having an Ru film formed on a thick Al2O3 film to be used for a magnetic head, capable of realizing high selectivity. In the etching of a wafer having disposed on an NiCr film 15 an Al2O3 film 14, an Ru film 13, an SiO2 film 12 and a resist mask 11, the Ru film 13 is etched via plasma using a processing gas containing Cl2 and O2 (FIG. 1(c)), and thereafter, the Ru film 13 is used as a mask to etch the Al2O3 film 14 via plasma using a gas mixture mainly containing BCl3 and also containing Cl2 and Ar (FIG. 1(d)).
    Type: Application
    Filed: January 30, 2008
    Publication date: March 26, 2009
    Inventors: Kentaro YAMADA, Takeshi Shimada, Kotaro Fujimoto
  • Publication number: 20090050603
    Abstract: A method for etching a dielectric layer disposed below an antireflection layer (ARL) is provided. The method comprises (a) forming a patterned mask with mask features over the ARL, the mask having isolated areas and dense areas of the mask features, (b) trimming and opening, and (c) etching the dielectric layer using the trimmed mask. The trimming and opening comprises a plurality of cycles, where each cycle includes (b1) a trim-etch phase which etches the ARL in a bottom of the mask features and selectively trims the isolated areas of the mask with respect to the dense areas, and (b2) a deposition-etch phase which deposits a deposition layer on the mask while further etching the ARL in the bottom of the mask features. The trimming and opening result in a net trimming of the mask in the isolated areas.
    Type: Application
    Filed: August 20, 2007
    Publication date: February 26, 2009
    Applicant: LAM RESEARCH CORPORATION
    Inventors: Dongho Heo, Supriya Goyal, Jisoo Kim, S.M. Reza Sadjadi
  • Patent number: 7485236
    Abstract: An optical interference display unit with a first electrode, a second electrode and support structures located between the two electrodes is provided. The second electrode has at least a first material layer and a second material layer. At least one material layer of the two is made from conductive material and the second conductive layer is used as a mask while an etching process is performed to etch the first material layer to define the second electrode.
    Type: Grant
    Filed: September 9, 2005
    Date of Patent: February 3, 2009
    Assignee: QUALCOMM MEMS Technologies, Inc.
    Inventor: Wen-Jian Lin
  • Patent number: 7475470
    Abstract: On the trailing side of a main pole air bearing surface of a magnetic head for perpendicular recording, the central portion is formed closer to the leading side than the corners on the trailing side, such that the main pole air bearing surface is formed in the shape of a recess with respect to the tailing side. As a result, it is possible to linearize the magnetic field distribution on the trailing side whereby the magnetic reversal is determined, and to record a bit without curving the shape of magnetic reversal.
    Type: Grant
    Filed: February 10, 2004
    Date of Patent: January 13, 2009
    Assignee: Hitachi Global Storage Technologies, LTD.
    Inventors: Masafumi Mochizuki, Tomohiro Okada, Atsushi Nakamura
  • Patent number: 7476329
    Abstract: A method for contacting an electrically conductive layer overlying a magnetoelectronics element includes forming a memory element layer overlying a dielectric region. A first electrically conductive layer is deposited overlying the memory element layer. A first dielectric layer is deposited overlying the first electrically conductive layer and is patterned and etched to form a first masking layer. Using the first masking layer, the first electrically conductive layer is etched. A second dielectric layer is deposited overlying the first masking layer and the dielectric region. A portion of the second dielectric layer is removed to expose the first masking layer. The second dielectric layer and the first masking layer are subjected to an etching chemistry such that the first masking layer is etched at a faster rate than the second dielectric layer. The etching exposes the first electrically conductive layer.
    Type: Grant
    Filed: February 2, 2005
    Date of Patent: January 13, 2009
    Assignee: EverSpin Technologies, Inc.
    Inventors: Gregory W. Grynkewich, Brian R. Butcher, Mark A. Durlam, Kelly Kyler, Charles A. Synder, Kenneth H. Smith, Clarence J. Tracy, Richard Williams
  • Publication number: 20080308527
    Abstract: An imaging structure such as a mask or reticle may be fabricated using a patterning layer on an imaging layer. The patterning layer may have substantially different etch properties than the imaging layer. A first etch process may be selective of the patterning layer with respect to a resist layer. A second etch process may be selective of the imaging layer with respect to the patterning layer.
    Type: Application
    Filed: August 20, 2008
    Publication date: December 18, 2008
    Applicant: INTEL CORPORATION
    Inventors: JIAN MA, Phil Freiberger, Karmen Yung, Frederick Chen, Chaoyang Li, Steve Mak
  • Publication number: 20080309663
    Abstract: An apparatus is provided with a display unit and a optical filter. The unit has pixels arranged in a matrix form, which are groped into a first group and second groups to display two-dimensional image information constituting elemental images, the image information being obtained from different directions. The optical filter has a first optical opening opposed to the first pixel group and second optical openings opposed to corresponding one of the second pixel groups. The center of the first pixel group is coincident with the axis of the first opening, each center of the second pixel groups is deviated from corresponding one of the second opening axe, and the deviation is gradually increased depending on a distance between the first and the second pixel group centers. The light rays are directed to a reference plane from the first and second pixel groups through the first and second opening axes.
    Type: Application
    Filed: August 13, 2008
    Publication date: December 18, 2008
    Inventors: Rieko FUKUSHIMA, Yuzo Hirayama, Kazuki Taira
  • Publication number: 20080283493
    Abstract: A method for forming an etching mask comprises the steps of: irradiating focus ion beam to a surface of a substrate and forming an etching mask used for oblique etching including an ion containing portion in the irradiated region. A method for fabricating a three-dimensional structure comprises the steps of: preparing a substrate; irradiating focus ion beam to a surface of the substrate and forming an etching mask including an ion containing portion in the irradiated region; and dry-etching the substrate from a diagonal direction using the etching mask and forming a plurality of holes.
    Type: Application
    Filed: May 14, 2008
    Publication date: November 20, 2008
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Kenji Tamamori, Masahiko Okunuki, Shinan Wang, Taiko Motoi, Haruhito Ono, Toshiaki Aiba
  • Publication number: 20080277379
    Abstract: A filter capable of separating or filtering micro foreign particles in a flow passage is provided. A first mask and a second mask are formed on a silicon substrate by dry etching. Before performing the dry etching, a resist of the first mask is subjected to a heat treatment performed at a temperature equal to or higher than a glass transition point. A resist of the second mask is not subjected to such a heat treatment. This processing simultaneously forms in the substrate a groove portion and a wall having a hole that is located in the groove portion. A silicon material located beneath a wide portion of the first mask remains as a wall portion separating the holes.
    Type: Application
    Filed: July 16, 2008
    Publication date: November 13, 2008
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Masataka Kato, Makoto Terui, Ryoji Kanri
  • Publication number: 20080230516
    Abstract: A method for forming fine patterns in a semiconductor device includes forming a first hard mask layer and a second hard mask layer over an etch target layer, forming second hard mask patterns by etching the second hard mask layer, wherein an etching profile of the second hard mask layer has a positive slope, and etching the first hard mask layer and the etch target layer using the second hard mask patterns as an etch mask.
    Type: Application
    Filed: December 10, 2007
    Publication date: September 25, 2008
    Inventors: Sung-Yoon Cho, Hye-Ran Kang
  • Patent number: 7425275
    Abstract: A method of fabricating a vertically tapered structure. The method includes placing a spacer layer at a predetermined area on a wafer, placing a mask layer at a predetermined area on the spacer layer, and over-etching the spacer layer, by etching a certain area below the mask layer, fabricating a cantilever type shadow mask having the spacer layer and the mask layer. Thus, it is possible to fabricate the vertically tapered structure of several tens of microns. The vertically tapered structure can be used as the optical waveguide in the optical device to minimize junction loss that may occur between the optical waveguide and the optical fiber.
    Type: Grant
    Filed: August 15, 2005
    Date of Patent: September 16, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Duk-yong Choi
  • Publication number: 20080197109
    Abstract: A multilayer antireflective hard mask structure is disclosed. The structure comprises: (a) a CVD organic layer, wherein the CVD organic layer comprises carbon and hydrogen; and (b) a dielectric layer over the CVD organic layer. The dielectric layer is preferably a silicon oxynitride layer, while the CVD organic layer preferably comprises 70-80% carbon, 10-20% hydrogen and 5-15% nitrogen. Also disclosed are methods of forming and trimming such a multilayer antireflective hard mask structure. Further disclosed are methods of etching a substrate structure using a mask structure that contains a CVD organic layer and optionally has a dielectric layer over the CVD organic layer.
    Type: Application
    Filed: October 31, 2007
    Publication date: August 21, 2008
    Applicant: Applied Materials, Inc.
    Inventors: David S. Mui, Wei Liu, Thorsten Lill, Christopher Dennis Bencher, Yuxiang May Wang
  • Publication number: 20080190891
    Abstract: A method for manufacturing a probe structure of a probe card is disclosed. In accordance with the present invention, a portion of a substrate exposed through a crossing region of one more probe beam regions defined by a first mask layer pattern and a windows defined by a second mask layer pattern are etched to form one or more self-aligning probe tip regions, thereby preventing a misalignment of the one or more probe tip regions.
    Type: Application
    Filed: June 8, 2007
    Publication date: August 14, 2008
    Applicant: UniTest, Inc.
    Inventors: Bong Hwan KIM, Jong Bok Kim, Bum Jin Park
  • Publication number: 20080190892
    Abstract: A plasma etching method includes: plasma etching a silicon oxide film to be etched that is positioned under a multi-layer resist mask by using the multi-layer resist mask formed on a substrate to be processed; and plasma etching a glass based film positioned under the silicon oxide film by using the multi-layer resist mask. In the method a gaseous mixture of C4F6 gas and C3F8 gas as a processing gas is used in the plasma etching of the glass based layer.
    Type: Application
    Filed: February 5, 2008
    Publication date: August 14, 2008
    Applicant: TOKYO ELECTRON LIMITED
    Inventor: Sung Tae LEE
  • Publication number: 20080179282
    Abstract: Method and apparatus for etching a metal layer disposed on a substrate, such as a photolithographic reticle, are provided. In one embodiment, a method is provided for processing a substrate including positioning a substrate having a metal photomask layer disposed on a optically transparent material in a processing chamber, introducing a processing gas processing gas comprising an oxygen containing gas, a chlorine containing gas, at least one of trifluoromethane (CHF3), sulfur hexafluoride (SF6), hexafluoroethane (C2F6) or ammonia (NH3) and optionally a chlorine-free halogen containing gas and/or an insert gas, into the processing chamber, generating a plasma of the processing gas in the processing chamber, and etching exposed portions of the metal layer disposed on the substrate.
    Type: Application
    Filed: October 5, 2007
    Publication date: July 31, 2008
    Inventors: Madhavi R. Chandrachood, Amitabh Sabharwal, Toi Yue Becky Leung, Michael Grimbergen
  • Patent number: 7396475
    Abstract: The present invention provides a method for forming a stepped structure on a substrate that features transferring, into the substrate, an inverse shape of the stepped structure disposed on the substrate.
    Type: Grant
    Filed: April 25, 2003
    Date of Patent: July 8, 2008
    Assignee: Molecular Imprints, Inc.
    Inventor: Sidlgata V. Sreenivasan
  • Publication number: 20080149593
    Abstract: Pitch multiplication is performed using a two step process to deposit spacer material on mandrels. The precursors of the first step react minimally with the mandrels, forming a barrier layer against chemical reactions for the deposition process of the second step, which uses precursors more reactive with the mandrels. Where the mandrels are formed of amorphous carbon and the spacer material is silicon oxide, the silicon oxide is first deposited by a plasma enhanced deposition process and then by a thermal chemical vapor deposition process. Oxygen gas and plasma-enhanced tetraethylorthosilicate (TEOS) are used as reactants in the plasma enhanced process, while ozone and TEOS are used as reactants in the thermal chemical vapor deposition process. The oxygen gas is less reactive with the amorphous carbon than ozone, thereby minimizing deformation of the mandrels caused by oxidation of the amorphous carbon.
    Type: Application
    Filed: March 4, 2008
    Publication date: June 26, 2008
    Applicant: Micron Technology, Inc.
    Inventors: Jingyi Bai, Gurtej S. Sandhu, Shuang Meng
  • Patent number: 7389585
    Abstract: A method for forming an ink jet recording head includes at least a step of forming an ink flow path pattern on a substrate by a photodecomposable positive type resist resin, a step of, once executing each of the steps of applying, exposing and baking thereon a nozzle-constituting resin layer which is a negative type resist containing an optical cation polymerization starting agent and having an epoxy resin as a chief component with respect to each of an ink flow path pattern and an ink discharge port pattern, collectively developing unexposed portions on the respective nozzle-constituting resin layers, and a step of removing the formed photodecomposable resin is minimized.
    Type: Grant
    Filed: November 23, 2005
    Date of Patent: June 24, 2008
    Assignee: Canon Kabushiki Kaisha
    Inventors: Tamaki Sato, Maki Hatta, Kazuhiro Asai, Takumi Suzuki
  • Patent number: 7390753
    Abstract: A novel, in-situ plasma treatment method for eliminating or reducing striations caused by standing waves in a photoresist mask, is disclosed. The method includes providing a photoresist mask on a BARC (bottom anti-reflective coating) layer that is deposited on a feature layer to be etched, etching the BARC layer and the underlying feature layer according to the pattern defined by the photoresist mask, and subjecting the photoresist mask to a typically argon or hydrogen bromide plasma before, after, or both before and after etching of the BARC layer prior to etching of the feature layer. Preferably, the photoresist mask is subjected to the plasma both before and after etching of the BARC layer.
    Type: Grant
    Filed: November 14, 2005
    Date of Patent: June 24, 2008
    Assignee: Taiwan Semiconductor Mfg. Co., Ltd.
    Inventors: Li-Te Lin, Yui Wang, Huan-Just Lin, Yuan-Hung Chiu, Hun-Jan Tao
  • Patent number: 7381343
    Abstract: Techniques for magnetic device fabrication are provided. In one aspect, a method of patterning at least one, e.g., nonvolatile, material comprises the following steps. A hard mask structure is formed on at least one surface of the material to be patterned. The hard mask structure is configured to have a base, proximate to the material, and a top opposite the base. The base has one or more lateral dimensions that are greater than one or more lateral dimensions of the top of the hard mask structure, such that at least one portion of the base extends out laterally a substantial distance beyond the top. The top of the hard mask structure is at a greater vertical distance from the material being etched than the base. The material is etched.
    Type: Grant
    Filed: July 8, 2005
    Date of Patent: June 3, 2008
    Assignee: International Business Machines Corporation
    Inventors: Michael C. Gaidis, Sivananda K. Kanakasabapathy, Eugene J. O'Sullivan
  • Publication number: 20080116169
    Abstract: The present invention provides a structure for etching process. The structure has a mask for protecting an area of a wafer from being etched and a seal ring attached under a lower surface of the mask. The mask has at least one air opening to expose an area to be etched. Furthermore, the mask is attached on the wafer through the seal ring. In addition, the present invention provides also a method to form a mask for dry etching process. First, the present invention includes a step of providing a base material and coating the masking material on both sides of the base material. The next step is to pattern the masking material to form openings. Subsequently, the base material is etched through the openings to create at least one mask opening and a mask cavity. Finally, removing the mask material is performed.
    Type: Application
    Filed: August 13, 2007
    Publication date: May 22, 2008
    Inventors: Wen-Kun Yang, Jui-Hsien Chang, Chi-Chen Lee
  • Publication number: 20080105649
    Abstract: Methods for etching a metal layer using an imprinted resist material are provided. In one embodiment, a method for processing a photolithographic reticle includes providing a reticle having a metal photomask layer formed on an optically transparent substrate and an imprinted resist material deposited on the metal photomask layer, etching recessed regions of the imprinted resist material to expose portions of the metal photomask layer in a first etching step, and etching the exposed portions of the metal photomask layer through the imprinted resist material in a second etching step, wherein at least one of the first or second etching steps utilizes a plasma formed from a processing gas comprising oxygen, halogen and chlorine containing gases. In one embodiment, the process gas is utilized in both the first and second etching steps. In another embodiment, the first and second etching steps are performed in the same processing chamber.
    Type: Application
    Filed: August 9, 2007
    Publication date: May 8, 2008
    Inventors: MADHAVI R. CHANDRACHOOD, Ajay Kumar
  • Patent number: 7354525
    Abstract: For a surface processing apparatus using a plasma, a mixed gas of a fluorine-containing gas and an oxygen gas is used as an ashing gas. A mixed gas of an oxygen gas and a fluorine-containing gas is introduced as an ashing gas. This allows the following steps to be carried out at the same time: removal of the silicon component left on the mask material surface and the mask material in the area including the cured mask layer and the like; and the removal of the carbon-based, and silicon-based deposits deposited on the inner wall of a vacuum chamber. In addition, the removal of the mask material is performed under low pressure, and in the subsequent step to a step using a mixed gas of a fluorine-containing gas and an oxygen gas, a plasma of only an oxygen gas is used. As a result, it becomes possible to reduce the damages (etching) to the film layer after etching.
    Type: Grant
    Filed: September 14, 2005
    Date of Patent: April 8, 2008
    Assignee: Hitachi High-Technologies Corporation
    Inventors: Masatoshi Oyama, Yoshiyuki Ohta, Tsuyoshi Yoshida, Hironobu Kawahara
  • Patent number: 7332098
    Abstract: The present invention provides a phase shift mask and fabricating method thereof, by which a critical dimension of a semiconductor pattern can be accurately formed in a manner of compensating a boundary step difference between an active area and an insulating layer. The present invention includes a transparent substrate and at least two halftone layers on the transparent substrate to have light transmittance lower than that of the transparent substrate, each comprising front and rear parts differing in thickness from each other.
    Type: Grant
    Filed: December 30, 2004
    Date of Patent: February 19, 2008
    Assignee: Dongbu Electronics Co., Ltd.
    Inventor: Jun Seok Lee
  • Patent number: 7329363
    Abstract: A method of forming a hydrophobic coating layer on a surface of a nozzle plate for an ink-jet printhead includes preparing a nozzle plate having a nozzle, forming a metal layer on a surface of the nozzle plate, forming a material layer covering the metal layer, selectively etching the material layer to expose a portion of the metal layer formed on an outer surface of the nozzle plate, and forming the hydrophobic coating layer of a sulfur compound on the exposed portion of the metal layer by dipping the nozzle plate in a sulfur compound-containing solution.
    Type: Grant
    Filed: February 25, 2005
    Date of Patent: February 12, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Seung-mo Lim, Kyung-hee You, Jae-woo Chung
  • Patent number: 7326650
    Abstract: In an etching method for achieving a dual damascene structure by using at least one layer of a low-k film and at least one layer of a hard mask, a dummy film, which is ultimately not left in the dual damascene structure, is formed in at least one layer over the hard mask in order to prevent shoulder sag. By adopting this method, a dual damascene structure in which the extent of the shoulder sag at the hard mask is minimized can be achieved through etching.
    Type: Grant
    Filed: October 1, 2001
    Date of Patent: February 5, 2008
    Assignee: Tokyo Electron Limited
    Inventors: Yoshihide Kihara, Shin Okamoto, Koichiro Inazawa, Tomoki Suemasa
  • Patent number: 7325310
    Abstract: A method for manufacturing an ink-jet printhead by coating a first photosensitive photoresist on the substrate and forming a passage plate, forming an ink chamber and an ink passage on the passage plate, burying the ink chamber and the ink passage using a second photoresist and forming a mold layer, forming a chamber cover layer on a top surface of the passage plate and the mold layer, forming a plurality of slots corresponding to the ink chamber and/or the ink passage in the chamber cover layer, supplying an etchant to the second photoresist through the slots and removing the second photoresist remaining in the ink chamber and the ink passage, and coating a third photoresist and forming a nozzle plate on the chamber cover layer.
    Type: Grant
    Filed: January 17, 2006
    Date of Patent: February 5, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Yun-ki Kim
  • Publication number: 20080022509
    Abstract: A method is provided to manufacture a thin-film magnetic head that includes an insulating layer having a swelling extending from the front end to the back end of the insulating layer and also includes a upper magnetic pole having an apex part, a narrow part located on the side close to the front end of the apex part, and a taper part broadened toward the back end of the upper magnetic pole. The method includes a step of forming the insulating layer; a step of forming a photosensitive resist layer on the insulating layer; a step of forming a first mask layer, having a first blanked region formed in the shape of the narrow part, on the photosensitive resist layer; and a step of forming a second mask layer, having a second blanked region formed in the shape of the taper part, on the photosensitive resist layer.
    Type: Application
    Filed: November 1, 2006
    Publication date: January 31, 2008
    Inventors: Makoto Sakai, Kotaro Yamazaki
  • Publication number: 20080011713
    Abstract: A substrate processing apparatus of the invention has a self-propelled carrying mechanism 15 configured to enable a processing target substrate W to be carried to/from each of liquid processing apparatuses HB, COT and DEV where at least two liquid processing apparatuses W are linearly disposed and to be movable in parallel with an arrangement direction of the liquid processing apparatuses HB, COT and DEV, substrate delivering/receiving mechanism 20 and 21 configured to enable the processing target substrate W to be delivered and received to/from the self-propelled carrying mechanism 15, and a non-self-propelled carrying mechanism 10 configured to enable the processing target substrate to be delivered and received to/from the substrate delivering/receiving mechanisms 20 and 21.
    Type: Application
    Filed: December 27, 2006
    Publication date: January 17, 2008
    Applicant: Yoshitake ITO
    Inventor: Yoshitake Ito
  • Patent number: 7282447
    Abstract: A process is provided for forming vertical contacts in the manufacture of integrated circuits and devices. The process eliminates the need for precise mask alignment and allows the etch of the contact hole to be controlled independent of the etch of the interconnect trough. The process includes forming an insulating layer on the surface of a substrate; forming an etch stop layer on the surface of the insulating layer; forming an opening in the etch stop layer; etching to a first depth through the opening in the etch stop layer and into the insulating layer to form an interconnect trough; forming a photoresist mask on the surface of the etch stop layer and in the trough; and continuing to etch through the insulating layer until reaching the surface of the substrate to form a contact hole. The process may be repeated during the formation of multilevel metal integrated circuits.
    Type: Grant
    Filed: August 19, 2004
    Date of Patent: October 16, 2007
    Assignee: Micron Technology, Inc.
    Inventors: Charles H Dennison, Trung T. Doan
  • Patent number: 7270761
    Abstract: A fluorine-free integrated process for plasma etching aluminum lines in an integrated circuit structure including an overlying anti-reflection coating (ARC) and a dielectric layer underlying the aluminum, the process being preferably performed in a single plasma reactor. The ARC open uses either BCl3/Cl2 or Cl2 and possibly a hydrocarbon passivating gas, preferably C2H4. The aluminum main etch preferably includes BCl3/Cl2 etch and C2H4 diluted with He. The dilution is particularly effective for small flow rates of C2H4. An over etch into the Ti/TiN barrier layer and part way into the underlying dielectric may use a chemistry similar to the main etch. A Cl2/O2 chamber cleaning may be performed, preferably with the wafer removed from the chamber and after every wafer cycle.
    Type: Grant
    Filed: October 18, 2002
    Date of Patent: September 18, 2007
    Assignee: Appleid Materials, Inc
    Inventors: Xikun Wang, Hui Chen, Anbei Jiang, Hong Shih, Steve S. Y. Mak
  • Publication number: 20070187361
    Abstract: A light-shielding layer over a transparent substrate is processed into a predetermined pattern by first etching and then a recess is formed in an underlying layer below the light-shielding layer by second etching using at least the light-shielding layer as a mask. Subsequently, a defect inspection of the recess is performed. If, as a result of the inspection, a residue defect is detected at the recess otherwise formed in the underlying layer below the light-shielding layer, defect portion data of a pattern of a region including a residue-defect portion is produced and a repairing resist pattern is formed on the light-shielding layer based on the defect portion data. Then, third etching is applied to the underlying layer below the light-shielding layer using the light-shielding layer and the repairing resist pattern as a mask, thereby repairing the residue-defect portion.
    Type: Application
    Filed: February 6, 2007
    Publication date: August 16, 2007
    Applicant: HOYA CORPORATION
    Inventor: Hideki Suda
  • Patent number: 7255799
    Abstract: On a die that has etchings on a surface, firstly a sheet of negative photoresist is laid down which, by means of an exposure and subsequent development, is left only above the etchings; then, upon the negative photoresist, a positive photoresist is applied, which is subjected to exposure and development to produce functional geometries deposited in thin film; subsequently the positive photoresist is removed in a “lift-off” operation, and the negative photoresist is taken off in a plasma operation, thus revealing the etchings.
    Type: Grant
    Filed: September 11, 2003
    Date of Patent: August 14, 2007
    Assignee: Telecom Italia S.p.A
    Inventors: Renato Conta, Irma Disegna
  • Patent number: 7244368
    Abstract: A manufacturing method of a magnetic head includes a process for forming a lift-off mask pattern on a magnetoresistance effect element, such that the upper part of the lift-off mask pattern is larger in size than the lower part, a process for forming a couple of electrodes on the magnetoresistance effect element using the lift-off mask pattern as a mask, and a process for removing the lift-off mask pattern. The process for forming the lift-off mask pattern is performed according to a dry etching process.
    Type: Grant
    Filed: March 27, 2003
    Date of Patent: July 17, 2007
    Assignee: Fujitsu Limited
    Inventors: Shoichi Suda, Masayuki Takeda, Keiji Watanabe
  • Patent number: 7208423
    Abstract: A resist pattern (5) is formed in a dimension of a limitation of an exposure resolution over a hard mask material film (4) over a work film (3). The material film (4) is processed using the resist pattern (5) as a mask. A hard mask pattern (6) is thereby formed. Thereby a resist pattern (7), over a non-selected region (6b), having an opening (7a) through which a selection region (6a) in the mask pattern is exposed is formed. Only the mask pattern (6a) exposed through the opening (7a) is slimmed by performing a selection etching, the work film (3) is etched by using the mask pattern (6). A work film pattern (8) is thereby formed, which include a wide pattern section (8a) of a dimension width of the limitation of the exposure resolution and a slimmed pattern section (8a) of a dimension that is not more than the limitation of the exposure resolution.
    Type: Grant
    Filed: March 28, 2002
    Date of Patent: April 24, 2007
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Koji Hashimoto, Soichi Inoue, Kazuhiro Takahata, Kei Yoshikawa
  • Patent number: 7194798
    Abstract: Methods suitable for use in making a write coil of a magnetic head includes the steps of forming a seed layer made of ruthenium (Ru) over a substrate; forming, over the seed layer, a patterned resist having a plurality of write coil trenches patterned therein; electroplating electrically conductive materials within the plurality of write coil trenches to thereby form a plurality of write coil layers; removing the patterned resist; and performing a reactive ion etch (RIE) in ozone gas (O3) for removing exposed seed layer materials in between the plurality of write coil layers. Advantageously, the write coil layers remain undamaged from the RIE in the ozone gas. Other structures may be fabricated in a similar manner.
    Type: Grant
    Filed: June 30, 2004
    Date of Patent: March 27, 2007
    Assignee: Hitachi Global Storage Technologies Netherlands B.V.
    Inventors: Christian René Bonhôte, Quang Le