Abstract: A process for forming a resist mask pattern includes the steps of forming a resist layer of organic material in a multilevel resist process on a layer to be etched, and selectively etching a planarizing lower layer used in the resist layer by using an etching gas of oxygen under a plasma condition, in which a compound gas of at least one element selected from the group consisting of B, Si, Ti, Al, Mo, W and S is added to the etching gas. For example, the compound gas comprises BCl.sub.3, BH.sub.3, TiCl.sub.4, S.sub.2 Cl.sub.2, SiCl.sub.4 or the like. During the etching, a compound oxide, e.g., B.sub.2 O.sub.3, SiO.sub.2 or the like, is deposited on sidewalls of the lower layer to form a protective layer which prevents undercutting.

Abstract: Electrical charge accumulation caused by exposure to a charged particle beam during the formation of latent image pattern can be reduced and thus the positional deviation of the pattern by using a bottom-resist layer comprising a radiation-induced conductive composition. Highly integrated semiconductor device can be made easily and in high yields. The positional deviation can further be reduced by exposing a charge particle beam patterning apparatus substantially simultaneously with an actinic radiation such as ultraviolet light, X-ray, and infrared light.

Abstract: A method for forming contact vias in a integrated circuit which do not have planarizing material nearby. After a first insulating layer is deposited over the integrated circuit, a planarizing layer is deposited over the first insulating layer. The planarizing layer is etched back and portions of the planarizing layer may remain in the lower topographical regions of the first insulating layer to planarize the surface of the integrated circuit. A first masking layer is then formed over the surface of the integrated circuit. The openings created in the first masking layer have a size which is greater than the size of the contact vias to be formed. The first insulating layer is partially etched into so that portions of the planarizing layer near the locations of the contact vias are removed. The first masking layer is then removed, and a second insulating layer is deposited over the integrated circuit.

Abstract: A dry etch process for stripping LOCOS nitride masks (302) with fluorine based removal of oxynitride (312) followed by fluorine plus chlorine based removal of nitride (302) and any silicon buffer layer (303) without removal of pad oxide (304).

Abstract: A method of making circuit boards is disclosed that is suitable for use in a high-volume automated processing plant. The method can be used to produce either single-sided or double-sided circuit boards with access windows allowing electrical access and connection between traces from both sides. In the process, access holes are punched in a coverfilm. A copper sheet having a tin plating on one side is laminated to the coverfilm, with the tin side facing the coverfilm. A pattern representing a circuit is screened on the resulting laminate with a UV-curable resist, developed in a UV dryer, and then the unprotected copper is etched away. The remaining tin is then removed with solder stripping agent, and the resulting circuit is protected with a coverfilm. The process can be applied to large rolls of materials in an automated process, with large numbers of circuits applied to the laminated board. The circuits can then be punched out of the web with a hydraulic press in large numbers.

Abstract: A method for fabricating silicon injection plates is both highly precise and particularly simple. The silicon injection plate is formed by an upper silicon plate having injection holes and a lower silicon plate having a through opening and channels. The lower silicon plate is fabricated by simultaneous, double-sided etching of silicon.

Abstract: A process is provided for modifying a surface of a large area, non-planar substrate to form micro structures therein that alter its optical properties. The process includes forming the micro structures by reactive ion beam etching through a chosen pattern that has been prepared on the surface.

Abstract: According to this invention, a dry etching method includes the step of sequentially forming an SiO.sub.2 film, an Al--Si--Cu thin film, and a photoresist on an Si substrate to sequentially form a mask pattern, the step of etching the Al--Si--Cu thin film by RIE using a gas mixture of Cl.sub.2 and BCl.sub.3 as an etching gas, and the step of removing etching residues by a sputter effect obtained by the plasma of the BCl.sub.3 gas.