Masking Of A Substrate Using Material Resistant To An Etchant (i.e., Etch Resist) Patents (Class 216/41)
  • Patent number: 10806035
    Abstract: A method of forming a metallic pattern on a substrate is provided. The method includes applying onto a metallic surface, a chemically surface- activating solution having an activating agent that chemically activates the metallic surface; non-impact printing an etch-resist ink on the activated surface to produce an etch resist mask according to a predetermined pattern, wherein at least one ink component within the etch-resist ink undergoes a chemical reaction with the activated metallic surface to immobilize droplets of the etch-resist ink when hitting the activated surface; performing an etching process to remove unmasked metallic portions that are not covered with the etch resist mask; and removing the etch resist mask.
    Type: Grant
    Filed: July 27, 2016
    Date of Patent: October 13, 2020
    Assignee: KATEEVA, INC.
    Inventors: Nava Shpaisman, Moshe Frenkel
  • Patent number: 10797189
    Abstract: The physical and chemical properties of surfaces can be controlled by bonding nanoparticles, microspheres, or nanotextures to the surface via inorganic precursors. Surfaces can acquire a variety of desirable properties such as antireflection or reflection, antifogging, antifrosting, UV blocking, and IR absorption, while maintaining transparency to visible light. Micro or nanomaterials can also be used as etching masks to texture a surface and control its physical and chemical properties via its micro or nanotexture.
    Type: Grant
    Filed: October 30, 2019
    Date of Patent: October 6, 2020
    Assignee: NANOCLEAR TECHNOLOGIES INC.
    Inventors: Harold Frank Greer, Scott S. Harried, Ryan Morrow Briggs, Tony Lee
  • Patent number: 10763114
    Abstract: A method of fabricating a semiconductor device includes forming a semiconductor fin comprising a channel region for a fin field effect transistor (finFET). A gate oxide layer is then formed on the channel. The gate oxide layer is treated with a nitrogen containing agent so as to form a nitrogenous layer and an interfacial layer. The nitrogenous layer is then removed. A high-k dielectric layer is formed on the interfacial layer. A metal gate is formed on the high-k dielectric layer. The nitrogenous layer is removed by rinsing the semiconductor fin with deionized water. The gate oxide and interfacial layer contains the same material.
    Type: Grant
    Filed: September 28, 2017
    Date of Patent: September 1, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Andrew Joseph Kelly, Yusuke Oniki, Yasutoshi Okuno, Ta-Chun Ma
  • Patent number: 10745532
    Abstract: The present disclosure relates to a generalized method for producing a vertically oriented block copolymer film, a block copolymer film with controlled orientation obtained thereby, and a method for producing a self-assembled pattern. According to the present disclosure, it is possible to form a crosslinked layer, which is mechanically stable and undergoes no chemical change, by subjecting the block copolymer surface to plasma treatment using a filter. It is also possible to obtain a vertically oriented block copolymer film by annealing the block copolymer film having such a crosslinked layer. The method for producing a vertically oriented block copolymer film according to the present disclosure is advantageous in that it can be applied for general purpose regardless of the chemical structure, type and morphology of a block copolymer, and the method can be applied generally to the conventional directed self assembly process.
    Type: Grant
    Filed: November 26, 2019
    Date of Patent: August 18, 2020
    Assignee: Korea Institute of Science and Technology
    Inventors: Jeong Gon Son, Jinwoo Oh, Sang-Soo Lee, Heesuk Kim, Min Park, Jong Hyuk Park, Seungjun Chung, Tae Ann Kim
  • Patent number: 10727083
    Abstract: The present disclosure generally relates to methods of micro-imprinting panels or substrates for advanced packaging applications. A redistribution layer comprising an epoxy material is deposited on a substrate layer and imprinted with a stamp to form an epoxy substrate patterned with a plurality of vias. The stamp is removed from the epoxy substrate, and the epoxy substrate is optionally etched with a plasma comprising oxygen to prevent the redistribution layer from becoming flowable when cured. A capping layer may optionally be deposited on the surface of the epoxy substrate.
    Type: Grant
    Filed: February 25, 2019
    Date of Patent: July 28, 2020
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Roman Gouk, Chintan Buch, Kyuil Cho, Han-Wen Chen, Steven Verhaverbeke, Vincent Dicaprio
  • Patent number: 10703411
    Abstract: An apparatus and method for assisting a vehicle into a desired position within a parking space. The device uses non-uniform light strength light line or other pattern projection to generate highlighted projections onto a target at a vehicle dashboard. The user may form a strong projection by focusing multi laser projections to overlap each other at the target. The driver knows the location of the vehicle by memorizing the patterns along the projections relative to the locations in the parking space. The driver maneuvers the vehicle direction and speed in order to make the projections onto the target, to avoid hitting the garage door frame, and to park on a desired position inside the parking space. The devices can be used for both guiding the vehicle into the parking space at a predetermined path to avoid nearby objects and stopping the vehicle at the desired place and direction.
    Type: Grant
    Filed: January 16, 2018
    Date of Patent: July 7, 2020
    Inventors: Allen J Ho, Lana J Ho
  • Patent number: 10707088
    Abstract: A method of processing a target object is provided. The target object has an etching target layer, an organic film on the etching target layer and a mask on the organic film. The organic film includes a first layer and a second layer, the mask is provided on the first layer, the first layer is provided on the second layer, and the second layer is provided on the etching target layer. The method includes generating plasma of a first gas within a processing vessel of a plasma processing apparatus in which the target object is accommodated; etching the first layer with the plasma of the first gas and the mask until the second layer is exposed; and conformally forming a protection film on a side surface of the first layer; and generating plasma of a second gas and removing the mask with the plasma of the second gas.
    Type: Grant
    Filed: August 10, 2017
    Date of Patent: July 7, 2020
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Shinya Morikita, Takanori Banse, Yuta Seya, Ryosuke Niitsuma
  • Patent number: 10699920
    Abstract: Disclosed is a substrate treating method comprising: a supply step of supplying a process liquid including a drying auxiliary substance in a melted state to a pattern formation surface of a substrate; a solidification step of solidifying the process liquid on the pattern formation surface so as to from a solidified body; and a removal step of removing the solidified body from the pattern formation surface, wherein a substance which satisfies at least one of the following conditions, namely a melting entropy under atmospheric pressure at a melting point of 1 mJ/cm3·K or more but 500 mJ/cm3·K or less and a sublimation entropy under atmospheric pressure at 0° C. of 1 mJ/cm3·K or more but 2000 mJ/cm3·K or less, is used as the drying auxiliary substance.
    Type: Grant
    Filed: January 18, 2019
    Date of Patent: June 30, 2020
    Assignee: SCREEN Holdings Co., Ltd.
    Inventors: Yosuke Hanawa, Yuta Sasaki
  • Patent number: 10692726
    Abstract: A method MT according to an embodiment provides a technique capable of controlling a pattern shape during processing of an organic film and the like. A wafer W as an object to which the method MT in the embodiment is applied includes an etching target layer EL, an organic film OL, and a mask ALM, the organic film OL is constituted by a first region VL1 and a second region VL2, the mask ALM is provided on the first region VL1, the first region VL1 is provided on the second region VL2, and the second region VL2 is provided on the etching target layer EL. In the method MT, the first region VL1 is etched to reach the second region VL2 by generating a plasma of a gas containing nitrogen gas in the processing container 12 in which the wafer W is accommodated, a mask OLM1 is formed from the first region VL1, a protective film SX is conformally formed on a side surface SF of the mask OLM1, the second region VL2 is etched to reach the etching target layer EL to form a mask OLM2 from the second region VL2.
    Type: Grant
    Filed: July 4, 2017
    Date of Patent: June 23, 2020
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Shinya Morikita, Takanori Banse, Yuta Seya, Ryosuke Niitsuma
  • Patent number: 10670487
    Abstract: A water leakage detection system for a laser device detects a water leakage in the laser device including: a part group for outputting laser light; a water cooling plate which cools at least a portion of the part group; an enclosed housing in which the part group and the water cooling plate are stored; and an air circulating unit which circulates air within the housing, the air circulating unit is provided in the vicinity of a part having high heat generation and the water leakage detection system for the laser device includes: a humidity detection unit which detects humidity within the housing; temperature detection units which are arranged in a plurality of places in the water cooling plate and which respectively detect the temperatures of the places; and a detection control unit which outputs detection information when the humidity acquired from the humidity detection unit exceeds reference humidity or when at least one of the temperatures acquired from the temperature detection units exceeds a reference t
    Type: Grant
    Filed: July 27, 2018
    Date of Patent: June 2, 2020
    Assignee: FANUC CORPORATION
    Inventor: Jun Nakashima
  • Patent number: 10672621
    Abstract: The pattern forming material of an embodiment is a pattern forming material containing a polymer composed of two or more kinds of monomer units, in which a first monomer unit in the monomer units is provided with an ester skeleton having a first carbonyl group and one or more second carbonyl groups which bind to the ester skeleton, among the second carbonyl groups, the second carbonyl group that is farthest from a main chain of the polymer constituting the pattern forming material is present on a linear chain, and a second monomer unit in the monomer units is provided with a crosslinkable functional group on a side chain terminal.
    Type: Grant
    Filed: March 12, 2019
    Date of Patent: June 2, 2020
    Assignee: Toshiba Memory Corporation
    Inventors: Norikatsu Sasao, Koji Asakawa, Tomoaki Sawabe, Shinobu Sugimura
  • Patent number: 10661392
    Abstract: The invention relates to a method for creating a detachment zone (2) in a solid (1) in order to detach a solid portion (12), especially a solid layer (12), from the solid (1), said solid portion (12) that is to be detached being thinner than the solid from which the solid portion (12) has been removed.
    Type: Grant
    Filed: October 3, 2019
    Date of Patent: May 26, 2020
    Assignee: Siltectra GmbH
    Inventor: Christian Beyer
  • Patent number: 10635006
    Abstract: A chuck-driving device includes a base extending in first and second directions. The second direction crosses the first direction. The chuck-driving device further includes a slider positioned on the base and configured to move in a third direction substantially perpendicular to the first and second directions, and a pneumatic cylinder positioned on the base and to support the slider in the third direction. The chuck-driving additionally includes a motor assembly positioned on the base, around the pneumatic cylinder, and configured to drive the slider in the third direction. The motor assembly includes a coil base having a hollow portion disposed around sides of the pneumatic cylinder, a coil assembly positioned on the coil base and disposed around the sides of the pneumatic cylinder, and a magnet assembly adjacent to a part of the coil assembly.
    Type: Grant
    Filed: April 22, 2019
    Date of Patent: April 28, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sang-joon Hong, Jung-jae Kim, Sang-hyun Park, Ono Kazuya, Si-woong Woo
  • Patent number: 10627305
    Abstract: A water leakage detection system for a laser device detects a water leakage in the laser device including: a part group for outputting laser light; a water cooling plate which cools at least a portion of the part group; an enclosed housing in which the part group and the water cooling plate are stored; and an air circulating unit which circulates air within the housing, the air circulating unit is provided in the vicinity of a part having high heat generation and the water leakage detection system for the laser device includes: a humidity detection unit which detects humidity within the housing; temperature detection units which are arranged in a plurality of places in the water cooling plate and which respectively detect the temperatures of the places; and a detection control unit which outputs detection information when the humidity acquired from the humidity detection unit exceeds reference humidity or when at least one of the temperatures acquired from the temperature detection units exceeds a reference t
    Type: Grant
    Filed: July 27, 2018
    Date of Patent: April 21, 2020
    Assignee: FANUC CORPORATION
    Inventor: Jun Nakashima
  • Patent number: 10620529
    Abstract: Disclosed is a photomask. The photomask comprises a substrate, a reflective layer on the substrate, and an absorption structure on the reflective layer. The absorption structure comprises absorption patterns spaced apart from each other on the reflective layer. The absorption structure may include dummy holes in at least one of the absorption patterns. The dummy holes exhaust hydrogen from the absorption structure. The photomask may include a barrier layer on the absorption structure. The barrier layer may reduce the amount of hydrogen entering the absorption structure.
    Type: Grant
    Filed: May 23, 2017
    Date of Patent: April 14, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sungwon Kwon, Yongkyu Kim, Jinsu Kim
  • Patent number: 10606170
    Abstract: A template for imprint lithography can include an active area that includes a plurality of tiers including a first tier and a second tier, and a first feature within the first tier or the second tier. In another embodiment, the first and second tiers include features, and the average feature depth or height within the first tier may be substantially the same as or different from the average feature depth or height within the second tier. The template can be used in imprinting a formable layer to form a patterned resist layer over a device substrate that has at least two tiers. The template and its use are well suited for device substrates having exposed surfaces at significantly different elevations, particularly where planarization would be complicated or nearly impossible to implement.
    Type: Grant
    Filed: September 14, 2017
    Date of Patent: March 31, 2020
    Assignee: CANON KABUSHIKI KAISHA
    Inventor: Andrew R. Eckert
  • Patent number: 10593551
    Abstract: A method for manufacturing a reticle for double patterning includes providing a first reticle for a first patterning and a second reticle for a second patterning according to a target pattern, the first reticle having a first mask pattern, and the second reticle having a second mask pattern, the first patterning being performed before the second patterning, and forming a sub-resolution assist feature (SRAF) pattern at a gap of the first mask pattern of the first reticle. The SRAF pattern is covered by the second mask pattern of the second reticle and has a size sufficient large to enable a transfer of the SRAF pattern to a material to be patterned in the first patterning.
    Type: Grant
    Filed: December 10, 2018
    Date of Patent: March 17, 2020
    Assignees: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (BEIJING) CORPORATION, SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION
    Inventor: Qing Yang
  • Patent number: 10573669
    Abstract: A method for fabricating an array substrate includes: forming a first metal layer on a base substrate; forming an insulating layer of a silicon-containing organic material on the first metal layer; forming a second metal layer on the insulating layer; patterning the second metal layer by adopting an oxygen ion etching process to partially cover the insulating layer; and forming a silicon oxide layer, by the oxygen ion etching process, on a surface of the insulating layer not covered by the second metal layer.
    Type: Grant
    Filed: August 21, 2018
    Date of Patent: February 25, 2020
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventor: Meng Zhao
  • Patent number: 10563309
    Abstract: Disclosed is a method for creating a textured press plate. Initially, a mask may be applied to a surface of a press plate. This mask typically corresponds to a desired physical surface structure. Thereafter, the masked surface of the press plate is processed to obtain the desired physical surface structure. Thereafter, various techniques may be used to create differing degrees of gloss in differing portions of the surface of the press plate. For example, matting may be used to decrease the degree of gloss of a portion of the surface, and polishing may be used to increase the degree of gloss of a portion of the surface.
    Type: Grant
    Filed: October 13, 2016
    Date of Patent: February 18, 2020
    Assignee: Kings Mountain International, Inc.
    Inventor: Stephen Wagenknight
  • Patent number: 10553431
    Abstract: The present disclosure relates to a method of performing a semiconductor fabrication process. The method may be performed by forming a spacer material having vertically extending segments along sidewalls of a masking layer and a horizontally extending segment connecting the vertically extending segments. A cut material is formed over a part of the horizontally extending segment, and the horizontally extending segment of the spacer material not covered by the cut material is removed. A layer under the masking layer is patterned according to the masking layer and the spacer material.
    Type: Grant
    Filed: September 6, 2017
    Date of Patent: February 4, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Kuan-Wei Huang, Chia-Ying Lee, Ming-Chung Liang
  • Patent number: 10514598
    Abstract: Vacuum-integrated photoresist-less methods and apparatuses for forming metal hardmasks can provide sub-30 nm patterning resolution. A metal-containing (e.g., metal salt or organometallic compound) film that is sensitive to a patterning agent is deposited on a semiconductor substrate. The metal-containing film is then patterned directly (i.e., without the use of a photoresist) by exposure to the patterning agent in a vacuum ambient to form the metal mask. For example, the metal-containing film is photosensitive and the patterning is conducted using sub-30 nm wavelength optical lithography, such as EUV lithography.
    Type: Grant
    Filed: August 30, 2017
    Date of Patent: December 24, 2019
    Assignee: LAM RESEARCH CORPORATION
    Inventors: Jeffrey Marks, George Andrew Antonelli, Richard A. Gottscho, Dennis M. Hausmann, Adrien LaVoie, Thomas Joseph Knisley, Sirish K. Reddy, Bhadri N. Varadarajan, Artur Kolics
  • Patent number: 10511282
    Abstract: A crystal-oscillating device is disclosed with a reduction in size and a favorable Q value. The crystal-oscillating device includes a first packaging material; a crystal resonator mounted on the first packaging material; joining members that join the first packaging material to the crystal resonator; a first sealing frame for joining the second and third packaging materials, the first packaging material, and the second packaging material; and a second sealing frame for joining the second packaging material and the third packaging material to each other. Preferable, the second packaging material is formed in a frame shape to surround an outer peripheral edge of the crystal resonator, and the second packaging material and a crystal substrate of the crystal resonator are formed from the same crystal substrate.
    Type: Grant
    Filed: October 10, 2016
    Date of Patent: December 17, 2019
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Isao Ikeda, Jinya Furui
  • Patent number: 10510911
    Abstract: The physical and chemical properties of surfaces can be controlled by bonding nanoparticles, microspheres, or nanotextures to the surface via inorganic precursors. Surfaces can acquire a variety of desirable properties such as antireflection or reflection, antifogging, antifrosting, UV blocking, and IR absorption, while maintaining transparency to visible light. Micro or nanomaterials can also be used as etching masks to texture a surface and control its physical and chemical properties via its micro or nanotexture.
    Type: Grant
    Filed: October 3, 2018
    Date of Patent: December 17, 2019
    Assignee: NANOCLEAR TECHNOLOGIES INC.
    Inventors: Harold Frank Greer, Scott S. Harried, Ryan Morrow Briggs, Tony Lee
  • Patent number: 10504942
    Abstract: The present disclosure provides a method of manufacturing an array substrate and a method of manufacturing a display device. The method of manufacturing an array substrate includes steps of: forming a planarization layer above a base substrate; forming an electrode layer above the planarization layer; forming a metal functional layer above the electrode layer; patterning the metal functional layer by using a multi-greyscale mask layer as a mask; forming an insulating protection layer on a portion of the electrode layer not being covered by the patterned metal functional layer; performing an ashing process on the multi-greyscale mask layer; patterning the electrode layer by using the metal functional layer as a mask; further patterning the metal functional layer by using the multi-greyscale mask layer subjected to the ashing process as a mask.
    Type: Grant
    Filed: March 22, 2018
    Date of Patent: December 10, 2019
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Haixu Li, Zhanfeng Cao, Qi Yao
  • Patent number: 10478984
    Abstract: A method for forming a cutting tool includes masking a metal base with one or more masks, the one or more masks including at least one variable permeability mask, and chemically etching the masked metal base to form a blade of the cutting tool.
    Type: Grant
    Filed: December 18, 2017
    Date of Patent: November 19, 2019
    Assignee: Hutchinson Technology Incorporated
    Inventors: Paul V. Pesavento, Peter F. Ladwig, Michael W. Davis, John A. Theget, Kurt C. Swanson, Joel B. Michaletz, Philip W. Anderson, Timothy A. McDaniel
  • Patent number: 10453685
    Abstract: The invention relates to a method of forming a semiconductor device by patterning a substrate by providing an amorphous silicon layer on the substrate and forming a hard mask layer on the amorphous silicon layer. The amorphous silicon layer is provided with an anti-crystallization dopant to keep the layer amorphous at increased temperatures (relative to not providing the anti-crystallization dopant). The hard mask layer may comprise silicon and nitrogen.
    Type: Grant
    Filed: March 31, 2017
    Date of Patent: October 22, 2019
    Assignee: ASM IP Holding B.V.
    Inventors: Kelly Houben, Steven R. A. Van Aerde, Maarten Stokhof, Bert Jongbloed, Dieter Pierreux, Werner Knaepen
  • Patent number: 10436964
    Abstract: Provided is an inorganic polarizing plate having a wire grid structure including: a transparent substrate; and grid-shaped protrusions arranged on the transparent substrate at a pitch shorter than a wavelength of light in a use band, in which the grid-shaped-protrusion includes, in order from the transparent substrate side, a reflection layer and a reflection suppressing layer which includes a dielectric material and a non-dielectric material and of which a content of the non-dielectric material increases as a separation from the reflection layer increases. In addition, provided are a method of manufacturing the inorganic polarizing plate and an optical instrument including the inorganic polarizing plate.
    Type: Grant
    Filed: February 5, 2018
    Date of Patent: October 8, 2019
    Assignee: Dexerials Corporation
    Inventors: Akio Takada, Seiji Kumagai, Hideto Sagawa, Takahiro Kimura, Kazuyuki Shibuya, Toshiaki Sugawara, Shigeshi Sakakibara, Yusuke Matsuno
  • Patent number: 10395941
    Abstract: A self-aligned double patterning (SADP) method is disclosed. The method may include forming a mandrel over an underlying layer, and undercutting the mandrel forming an undercut space under opposing sides of the mandrel. A pair of spacers may be formed adjacent the mandrel, each spacer including a vertical spacer portion on each side of the mandrel and an undercut spacer portion extending into the undercut space from the vertical spacer portion, the undercut spacer portions defining a sub-lithographic lateral dimension therebetween. The mandrels may be removed and, a sub-lithographic feature etched into at least the underlying layer using the spacers.
    Type: Grant
    Filed: August 21, 2018
    Date of Patent: August 27, 2019
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Ravi P. Srivastava, Hsueh-Chung Chen
  • Patent number: 10395943
    Abstract: To provide a patterning method for forming a desired pattern in a reverse process. A patterning method includes a reverse process. A photocurable composition contains at least a polymerizable compound (A) component and a photopolymerization initiator (B) component. The (A) component has a mole fraction weighted average molecular weight of 200 or more and 1000 or less. The (A) component has an Ohnishi parameter (OP) of 3.80 or more. The Ohnishi parameter (OP) of the (A) component is a mole fraction weighted average of N/(NC?NO), wherein N denotes a total number of atoms in a molecule, NC denotes a number of carbon atoms in the molecule, and NO denotes a number of oxygen atoms in the molecule.
    Type: Grant
    Filed: February 15, 2016
    Date of Patent: August 27, 2019
    Assignee: Canon Kabushiki Kaisha
    Inventors: Toshiki Ito, Takeshi Honma, Shiori Yonezawa, Tomonori Otani, Kazumi Iwashita
  • Patent number: 10377848
    Abstract: Polymeric reaction products of certain aromatic alcohols with certain diaryl-substituted aliphatic alcohols are useful as underlayers in semiconductor manufacturing processes.
    Type: Grant
    Filed: April 7, 2016
    Date of Patent: August 13, 2019
    Assignees: Rohm and Haas Electronic Materials LLC, Rohm and Haas Electronic Materials Korea Ltd.
    Inventors: Seon-Hwa Han, Sung Wook Cho, Hae-Kwang Pyun, Jung-June Lee, Shintaro Yamada
  • Patent number: 10369725
    Abstract: The present invention relates to a method for preparing a free-standing polymer film with micropores in a simple and economical way, and particularly to a method for preparing a free-standing polymer film with micropores that includes: (a) forming a thin film of a water-soluble polymer on a substrate; (b) forming a thin film of a hydrophobic polymer on the water-soluble polymer thin film; (c) treating the substrate having the polymer thin films formed on with a mixed solution of a solvent and a C1-C3 alcohol and drying the substrate; and (d) immersing the dried substrate in water to dissolve the water-soluble polymer thin film and thereby to peel the hydrophobic polymer thin film from the substrate.
    Type: Grant
    Filed: December 4, 2015
    Date of Patent: August 6, 2019
    Assignee: The Industry & Academic Cooperation in Chungnam National University (IAC)
    Inventors: Ho-Suk Choi, Van Tien Bui
  • Patent number: 10345287
    Abstract: A method for calibrating multiple nanostructures in parallel for quantitative biosensing using a chip for localized surface plasmon resonance (LSPR) biosensing and imaging. The chip is a glass coverslip compatible for use in a standard microscope with at least one array of functionalized plasmonic nanostructures patterned onto it using electron beam nanolithography. The chip is used to collect CCD-based LSPR imagery data of each individual nanostructure and LSPR spectral data of the array. The spectral data is used to determine the fractional occupancy of the array. The imagery data is modeled as a function of fractional occupancy to determine the fractional occupancy of each individual nanostructure.
    Type: Grant
    Filed: September 27, 2013
    Date of Patent: July 9, 2019
    Assignee: The United States of America, as represented by the Secretary of the Navy
    Inventors: Marc P. Raphael, Joseph A. Christodoulides, Jeff M. Byers
  • Patent number: 10332652
    Abstract: The conductive film is arranged on the support and contains a binder and a metal portion, in which a position at which the contour line reaches the metal portion included in the thin conductive wire is set as an upper end position, and an average area ratio VA of the metal portion in a region ranging from the upper end position to 100 nm toward the support side is 1% or more and less than 50%, and a position at which the contour line reaches the thin conductive wire does not include the metal portion is set to a lower end position, and an average area ratio VM1 of the metal portion in a region ranging from a middle position between the upper end position and the lower end position to 50 nm toward the support side and to 50 nm toward the surface X side is 50% or more.
    Type: Grant
    Filed: September 4, 2017
    Date of Patent: June 25, 2019
    Assignee: FUJIFILM Corporation
    Inventors: Kensuke Katagiri, Shin Tajiri, Toshinari Fujii
  • Patent number: 10312137
    Abstract: Embodiments of the present disclosure provide an apparatus and methods for forming a hardmask layer that may be utilized to transfer patterns or features to a film stack with accurate profiles and dimension control for manufacturing three dimensional (3D) stacked semiconductor devices. In one embodiment, a method of forming a hardmask layer on a substrate includes forming a seed layer comprising boron on a film stack disposed on a substrate by supplying a seed layer gas mixture in a processing chamber, forming a transition layer comprising born and tungsten on the seed layer by supplying a transition layer gas mixture in the processing chamber, and forming a bulk hardmask layer on the transition layer by supplying a main deposition gas mixture in the processing chamber.
    Type: Grant
    Filed: June 7, 2016
    Date of Patent: June 4, 2019
    Assignee: Applied Materials, Inc.
    Inventors: Eswaranand Venkatasubramanian, Susmit Singha Roy, Pramit Manna, Abhijit Basu Mallick
  • Patent number: 10303048
    Abstract: The present disclosure relates to a patterned structure, the structure comprising: i) a substrate, ii) a first layer on top of the substrate, comprising a filler material and a guiding material, wherein at least a top surface of the first layer comprises one or more zones of filler material and one or more zones of guiding material, and iii) a second layer on top of the first layer comprising a pattern of a first material, the pattern being either aligned or anti-aligned with the underlying one or more zones of guiding material; wherein the first material comprises a metal or a ceramic material and wherein the guiding material and the filler material either both comprise or both do not comprise the metal or ceramic material.
    Type: Grant
    Filed: February 15, 2017
    Date of Patent: May 28, 2019
    Assignees: IMEC VZW, KATHOLIEKE UNIVERSITEIT LEUVEN, KU LEUVEN R&D
    Inventors: Boon Teik Chan, Arjun Singh, Safak Sayan
  • Patent number: 10281817
    Abstract: A method of manufacturing an imprint master template including forming a first layer pattern only in a partial region and a second layer formed in the entire region, and then a back exposure process is performed.
    Type: Grant
    Filed: June 12, 2017
    Date of Patent: May 7, 2019
    Assignee: Samsung Display Co., Ltd.
    Inventors: Taewoo Kim, Eunjung Kim, Seung-Won Park, Daehwan Jang, Hyungbin Cho, Gugrae Jo
  • Patent number: 10209420
    Abstract: Provided are a polarizing plate having high transmittance characteristics and excellent controllability of reflectance characteristics, a method of manufacturing the polarizing plate, and an optical apparatus including the polarizing plate. A polarizing plate having a wire grid structure includes a transparent substrate and grid-shaped protrusions that are arranged on the transparent substrate at a pitch shorter than a wavelength of light in a use band and extend in a predetermined direction, the grid-shaped protrusion includes, in order from the transparent substrate side, a reflection layer, a dielectric layer, and an absorption layer, a width of the reflection layer is smaller than a width of the dielectric layer, and a grid tip formed at a tip of the grid-shaped protrusion has a tapered shape where a side face thereof is inclined in such a direction that a width thereof is decreased toward a tip side when viewed from the predetermined direction.
    Type: Grant
    Filed: December 27, 2017
    Date of Patent: February 19, 2019
    Assignee: Dexerials Corporation
    Inventor: Tomu Takeda
  • Patent number: 10201974
    Abstract: A process for producing a liquid discharge head including a substrate having a liquid supply path passing through from its first surface to second surface and an discharge port forming member having a discharge port communicating with the supply path through a flow path, the process including providing a first layer of photosensitive resin in a region covering an opening of the supply path in the first surface; forming a latent image of a pattern of the flow path in the first layer by exposure; providing a second layer of negative photosensitive resin on the first layer; curing a portion, opposing to the opening of the supply path in the first surface, of the second layer; forming a latent image of a pattern of the discharge port in the second layer by exposure; and developing latent images of patterns of the flow path and discharge port.
    Type: Grant
    Filed: February 16, 2016
    Date of Patent: February 12, 2019
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Jun Yamamuro, Kazuhiro Asai, Keiji Matsumoto, Koji Sasaki, Masahisa Watanabe, Kunihito Uohashi, Seiichiro Yaginuma, Ryotaro Murakami, Kenji Fujii
  • Patent number: 10192733
    Abstract: A method of manufacturing a semiconductor device including attaching, by a liquid treatment, a first liquid to a surface of a semiconductor substrate having a fine pattern formed therein; substituting the first liquid attached to the surface of the semiconductor substrate with a solution, the solution comprising a sublimate dissolved in a second liquid; vaporizing the second liquid and precipitating the sublimate to the surface of the semiconductor substrate to forma solid precipitate comprising the sublimate; and removing the precipitate by sublimation. For example, the sublimate may be a material having at least two carboxyl groups bonded to cyclohexane or a material formed of two carboxyl groups bonded to benzene with the bonding sites of the two carboxyl groups being adjacent to one another.
    Type: Grant
    Filed: February 23, 2017
    Date of Patent: January 29, 2019
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Junichi Igarashi, Katsuhiro Sato, Masaaki Hirakawa
  • Patent number: 10171919
    Abstract: In one aspect, the present invention provides nano-scale heaters, such as nano-scale thermoacoustic loudspeakers comprising suspended metal nanobridges prepared using atomic layer deposition (ALD). The loudspeakers of the invention are capable of producing audible sound when stimulated with an electrical current or other energetic stimulus. In another aspect, the present invention provides methods of preparing and using such nanodevices.
    Type: Grant
    Filed: May 16, 2017
    Date of Patent: January 1, 2019
    Assignee: The Regents of the University of Colorado, a body corporate
    Inventors: Victor M. Bright, Joseph J. Brown
  • Patent number: 10157752
    Abstract: Methods of patterning a target material layer are provided herein. The method includes steps of positioning a semiconductor wafer having the target material layer thereon in an etch chamber and of providing a flow of etch gases into the etch chamber, the flow of etch gases etchant gas comprising a plurality of gases. The semiconductor wafer has a patterned hardmask feature formed from a compound on the target material layer. The method also includes steps of etching the target material layer using the patterned hardmask feature as a mask feature, wherein one of the gases chemically alters the patterned hardmask feature and at least one of the gases chemically repairs the patterned hardmask feature so that the patterned hardmask feature retains its dimensions during the etching. Associated semiconductor wafer are also provided herein.
    Type: Grant
    Filed: February 8, 2016
    Date of Patent: December 18, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chih-Yuan Ting, Chung-Wen Wu
  • Patent number: 10153240
    Abstract: Methods and apparatus are disclosed which reduce the stress concentration at the redistribution layers (RDLs) of a package device. A package device may comprise a seed layer above a passivation layer, covering an opening of the passivation layer, and covering and in contact with a contact pad. A RDL is formed above the passivation layer, above and in contact with the seed layer, covering the opening of the passivation layer, and electrically connected to the contact pad through the seed layer. The RDL has an end portion with a surface that is smooth without a right angle. The surface of the end portion of the RDL may have an obtuse angle, or a curved surface.
    Type: Grant
    Filed: October 19, 2016
    Date of Patent: December 11, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Lin Lu, Hsien-Wei Chen, Kai-Chiang Wu, Hung-Jui Kuo
  • Patent number: 10128337
    Abstract: Methods for forming fin structures with desired profile and dimensions for three dimensional (3D) stacking of fin field effect transistor (FinFET) for semiconductor chips are provided. The methods include a structure reshaping process to reshape a shaped structure, such as a diamond like structure formed on a fin structure. In one embodiment, a method for forming a structure on a substrate includes performing an epitaxial deposition process to form a shaped structure on a fin structure disposed on a substrate, performing a mask layer deposition process to form a mask layer having a first width on the shaped structure, and performing a mask trimming process to trim the mask layer from the first width from a second width.
    Type: Grant
    Filed: June 3, 2016
    Date of Patent: November 13, 2018
    Assignee: Applied Materials, Inc.
    Inventors: Jie Zhou, Zhong Qiang Hua, Chentsau Ying, Srinivas D. Nemani, Ellie Y. Yieh
  • Patent number: 10118155
    Abstract: A method of transferring a single metal atom from a first location to a second location on the surface of a metal oxide is disclosed. The method includes obtaining a material having a first metal atom deposited on a first oxygen atom vacancy of the metal oxide and transferring the first metal atom of the metal on the first oxygen atom vacancy to a second location on the metal oxide by applying a voltage to the first metal atom. The second location can be a second metal atom on a second oxygen atom vacancy of the metal oxide, where the first and second metal atoms form a first metal atom-second metal atom species, or a metal atom of the metal oxide, where the first metal atom and the metal atom of the metal oxide forms a first metal atom-metal atom of the metal oxide species.
    Type: Grant
    Filed: August 11, 2016
    Date of Patent: November 6, 2018
    Assignees: SABIC Global Technologies B.V., UCL Business PLC
    Inventors: Andy Mellor, Chi Yim, Chi Pang, Geoff Thornton, Hicham Idriss
  • Patent number: 10108092
    Abstract: Provided is a photolithography method, including: a) forming a photoresist layer satisfying D=m*(?/2n) (D is a thickness of the photoresist layer, n is a refractive index of the photoresist, ? is a wavelength of irradiated light at the time of exposure, and m is a natural number of 1 or more) on a substrate; and b) manufacturing a photoresist pattern having a ring shape by exposing the photoresist layer and developing the exposed photoresist layer using a photo mask including a transparent substrate and a plate-type metal dot contacting a light emitting surface of the transparent substrate.
    Type: Grant
    Filed: June 9, 2015
    Date of Patent: October 23, 2018
    Assignee: Korea Research Institute of Standards and Science
    Inventor: Eun-Ah You
  • Patent number: 10082660
    Abstract: The invention relates to a transparent object carrier, which has a marking impressed in the interior, to a diagnostic instrument, preferably a microscope, in combination with a transparent object carrier inserted for diagnostic analysis, and to a method, comprising the steps of providing a transparent object carrier, impressing a marking, which is located in the interior of the carrier, supplying the transparent object carrier with a biological or chemical sample, and, optionally, dividing the transparent object carrier and thereby producing a plurality of smaller transparent object carriers that enclose material from the biological or chemical sample.
    Type: Grant
    Filed: October 27, 2014
    Date of Patent: September 25, 2018
    Assignee: EUROIMMUN MEDIZINISCHE LABORDIAGNOSTIKA AG
    Inventors: Winfried Stoecker, Norbert Rottmann, Norbert Koop
  • Patent number: 10040686
    Abstract: A CNT dispersion liquid of the preset invention includes a CNT agglomerate arranged with a mesh body formed from a plurality of CNTs, the CNT agglomerate being dispersed in a dispersion medium is provided wherein a CNT agglomerate is obtained by extracting from the dispersion liquid and drying the CNT agglomerate the obtained CNT agglomerate has a pore size of 0.02 ?m or more and 2.0 ?m or less being maximized a differential pore volume in a pore size range of 0.002 ?m or more and 10.00 ?m or less measured using a mercury intrusion porosimeter.
    Type: Grant
    Filed: May 3, 2013
    Date of Patent: August 7, 2018
    Assignee: NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY
    Inventors: Kenji Hata, Kazufumi Kobashi, Don N. Futaba
  • Patent number: 10011490
    Abstract: A CNT dispersion liquid of the preset invention includes a CNT agglomerate arranged with a mesh body formed from a plurality of CNTs, the CNT agglomerate being dispersed in a dispersion medium is provided wherein a CNT agglomerate is obtained by extracting from the dispersion liquid and drying the CNT agglomerate the obtained CNT agglomerate has a pore size of 0.02 ?m or more and 2.0 ?m or less being maximized a differential pore volume in a pore size range of 0.002 ?m or more and 10.00 ?m or less measured using a mercury intrusion porosimeter.
    Type: Grant
    Filed: May 3, 2013
    Date of Patent: July 3, 2018
    Assignee: NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY
    Inventors: Kenji Hata, Kazufumi Kobashi, Don N. Futaba
  • Patent number: 9985190
    Abstract: Embodiments are related to systems and methods for fluidic assembly, and more particularly to diodes offering orientation control properties in a fluidic assembly system.
    Type: Grant
    Filed: May 18, 2016
    Date of Patent: May 29, 2018
    Assignee: eLux Inc.
    Inventors: Changqing Zhan, Mark Albert Crowder, Paul John Schuele
  • Patent number: 9899222
    Abstract: A trench structure on a SiC substrate and method for fabricating thereof is provided. The fabricating method includes: providing a SiC substrate; forming a protection layer on the SiC substrate; forming an resisting layer on the protection layer; patterning the resisting layer and the protection layer to form an opening; patterning the SiC substrate by using the patterned resisting layer as a hard mask to form a trench; removing the patterned resisting layer; performing a high-temperature annealing process to form a rounded bottom of the trench; and removing the protection layer.
    Type: Grant
    Filed: December 21, 2015
    Date of Patent: February 20, 2018
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Kuan-Wei Chu, Ming-Jinn Tsai