By Confining Filler Patents (Class 228/215)
  • Patent number: 6467676
    Abstract: An improved underfill adhesive encapsulant with fluxing activities containing an epoxy resin or a mixture of epoxy resin. An anhydride is used as the curing agent to harden the epoxy resin. A hydroxyl-containing fluxing precursor compound is added to the encapsulant composition to react with the anhydride curing agent to produce an active fluxing agent under typical reflow conditions. The use of a fluxing precursor gives improved reliability compared to conventional fluxing agents used in existing no-flow underfill encapsulants. A suitable catalyst such as imidazole, imidazole derivative or metal acetylacetonate is provided in the present encapsulant at concentrations that give good curing kinetics. A thermoplastic is optionally included to allow the cured encapsulant to be reworked.
    Type: Grant
    Filed: September 21, 2000
    Date of Patent: October 22, 2002
    Assignee: Advanpack Solutions PTE Ltd.
    Inventor: Tie Wang
  • Patent number: 6431432
    Abstract: A solder mask is placed on a substrate but this solder mask is used to control solder spread but merely helps to protect traces that are distant from the bond pads. The solder mask has an opening that is preferably greater than the area of a die to be attached; this opening exposes both the bond pads and at least portions of traces proximate to the bond pads. The portions of the traces that are proximate to the bond pads are oxidized, thereby preventing solder from flowing onto these portions of the traces during the solder reflow process.
    Type: Grant
    Filed: June 15, 2000
    Date of Patent: August 13, 2002
    Assignee: LSI Logic Corporation
    Inventors: John Pierre McCormick, Kishor V. Desai
  • Publication number: 20020104873
    Abstract: A method for electrically coupling electrode pads comprising forming a reflowed solder bump on a first electrode pad supported by a first substrate. The reflowed solder bump includes a solder material having a solder melting temperature. The method further includes forming a second electrode pad on a second substrate. The second electrode pad has an electrode structure defined by at least one converging continuous arcuate surface terminating in an apex and having an electrode material whose melting temperature is greater than the solder melting temperature of the solder material. The solder bump is heated to reflow or to soften the solder material, and subsequently the apex of the second electrode pad is pressed or inserted into the heated solder bump to couple the first electrode pad to the second electrode pad. A method for solder bump reflow comprising pressing or inserting the apex of an electrode into a reflowed solder bumps, and then reflowing solder material of the reflowed solder bump.
    Type: Application
    Filed: February 6, 2001
    Publication date: August 8, 2002
    Inventors: Michael G. Lee, Connie M. Wong, Wen-Chou Vincent Wang
  • Publication number: 20020100794
    Abstract: A method of bonding a bonding element to a metal bonding pad comprises the following steps. A semiconductor structure having an exposed, recessed metal bonding pad within a layer opening is provided. The layer has an upper surface. A conductive cap having a predetermined thickness is formed over the metal bonding pad. A bonding element is bonded to the conductive cap to form an electrical connection with the metal bonding pad.
    Type: Application
    Filed: March 15, 2002
    Publication date: August 1, 2002
    Applicant: CHARTERED SEMICONDUCTOR MANUFACTURING LTD.
    Inventors: Kwok Keung Paul Ho, Simon Chooi, Yi Xu, Yakub Aliyu, Mei Sheng Zhou, John Leonard Sudijono, Subhash Gupta, Sudipto Ranendra Roy
  • Patent number: 6415974
    Abstract: A structure of solder bumps with improved coplanarility, comprising a substrate, a passivation layer, a plurality of Under Ball Metallurgy (UBM) layers and a plurality of solder bumps. The substrate has at least an active surface, and a plurality of bonding pads are provided thereon. The UBM layers with various areas are electrically connected to the bonding pads. Finally, the solder bumps are formed with uniform-height on the UBM layers. A method of forming solder bumps with improved coplanarity. A UBM structure with various sizes of openings is provided to control the volume of the solder, wherein the various sizes of openings are corresponding to the current distribution across the wafer. The purpose of the various openings is to control the volume of the solder in order to form uniform-heights of solder bumps, the coplanarity of the solder bumps can thus be improved.
    Type: Grant
    Filed: April 25, 2001
    Date of Patent: July 9, 2002
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventor: Jui-Meng Jao
  • Publication number: 20020066776
    Abstract: There is provided a method for forming end-face electrodes in which the end-face electrode can be securely formed with solder at a position in which a side electrode is formed and it can be formed without being affected by a jig for fixing a solder solid. By forming linear gaps on a master substrate, module substrates and a waste substrate are formed. At the side end of the gap of the module substrate, a side electrode is formed. A solder solid is pressed into the part of the gap in which the side electrode is formed and a reflow jig is placed. The surface of the solder solid is coated with flux and the solder solid is melted by heating so as to form the end-face electrode protruding from the substrate surface in the side electrode.
    Type: Application
    Filed: September 19, 2001
    Publication date: June 6, 2002
    Inventors: Hiroaki Mouri, Joji Shibata
  • Patent number: 6394334
    Abstract: The present invention discloses a method and apparatus for forming solder bumps by a molten solder screening technique in which a flexible die head constructed of a metal sheet is utilized for maintaining an intimate contact between the die head and a solder receiving mold surface, The flexible die head, when used in combination with a pressure means, is capable of conforming to any curved mold surface as long as the curvature is not more than 2.5 &mgr;m per inch of die length. The present invention further provides a method and apparatus for filling a multiplicity of cavities in a mold surface by providing a stream of molten solder and then intimately contacting the surface of the molten solder with a multiplicity of cavities such that the molten solder readily fills the cavities. The apparatus further provides means for removing excess molten solder from the surface of the mold without disturbing the molten solder already filled in the cavities.
    Type: Grant
    Filed: March 28, 2000
    Date of Patent: May 28, 2002
    Assignee: International Business Machines Corporation
    Inventors: Guy Paul Brouillette, Peter Alfred Gruber, Frederic Maurer
  • Patent number: 6389691
    Abstract: A method for forming routing conductors and solder bumps on a microelectronic substrate includes the steps of forming an under bump metallurgy layer on the substrate and forming a solder structure on the under bump metallurgy layer where the solder structure includes an elongate portion and an enlarged width portion. The portions of the under bump metallurgy layer not covered by the solder structure can be selectively removed using the solder structure as a mask. In addition, the solder is caused to flow from the elongate portion of the solder structure to the enlarged width solder portion thereby forming a raised solder bump. This step is preferably performed by heating the solder structure above its liquidus temperature allowing surface tension induced internal pressures to affect the flow. Various solder structures are also disclosed.
    Type: Grant
    Filed: April 5, 1999
    Date of Patent: May 21, 2002
    Assignee: Unitive International Limited
    Inventors: Glenn A. Rinne, Joseph Daniel Mis
  • Patent number: 6378758
    Abstract: A microelectronic connection component is provided with leads having a surface wettable by a bonding material such as a solder at the tips of the leads which are intended to be bonded with microelectronic devices. The leads have non-wettable surfaces bounding the wettable surfaces. During bonding, the non-wettable surfaces confine liquid bonding material such as liquid solder and prevent the liquid bonding material from spreading along the leads.
    Type: Grant
    Filed: January 19, 1999
    Date of Patent: April 30, 2002
    Assignee: Tessera, Inc.
    Inventor: Belgacem Haba
  • Patent number: 6375063
    Abstract: A multi-step stud design and method for fabricating the same of special utility for producing closely packed interconnects in magnetic recording heads, particularly higher density magnetoresistive and giant magnetoresistive tape heads. The multi-step stud fabrication process and structure enables the achievement of significantly higher interconnect densities resulting in an increased number of channels per millimeter on a single computer mass storage device recording head. A resultant stronger encapsulation surrounding the stud further provides increased channel reliability. The improved uniformity of the photoresist aperture achieved for each step in the stud structure, and lower current spreading resistance because of the wider underlying stud base size, increases stud uniformity resulting in improved stud yields. This increased yield compared with conventional single step stud processes reduces cost, even with the additional photolithography and plating processes involved.
    Type: Grant
    Filed: July 16, 1999
    Date of Patent: April 23, 2002
    Assignee: Quantum Corporation
    Inventors: Vijay K. Basra, Lawrence G. Neumann
  • Patent number: 6367150
    Abstract: An epoxy-based soldering flux is used to solder a flip-chip IC device to a metallic bond site on a substrate material. The soldering flux is composed of a thermosetting epoxy resin and a cross-linking agent with inherent flux activity. When heated the cross-linking agent cleans the metal oxides from the metal surfaces on the chip and then reacts with the epoxy resin to form a thermosetting epoxy residue. The flux residue left on the board after soldering does not inhibit the flow of an underfill encapsulant. The underfill binds to the thermosetting residue of the flux which increases adhesion strength preventing delamination of the chip during thermal cycling.
    Type: Grant
    Filed: September 4, 1998
    Date of Patent: April 9, 2002
    Assignee: Northrop Grumman Corporation
    Inventor: Kenneth J. Kirsten
  • Publication number: 20020038814
    Abstract: By using an application unit having: a storage chamber for a viscous material; a discharge hole, for the viscous material, provided so as to communicate with the storage chamber, where a viscous-material feeding device for feeding the viscous material to the storage chamber is coupled to the application unit; and a discharge-pressure adjusting device for imparting a discharge pressure to the viscous material stored in the storage chamber, a screen mask having openings corresponding to the application object or the application object itself and the discharge hole of the application unit are brought into contact with each other, either the application unit and the screen mask or the application unit and the application object are moved relative to each other while the discharge pressure is imparted to the viscous material in the storage chamber, and the viscous material is applied onto the application object while the storage chamber is replenished at all times with the viscous material by the viscous-material
    Type: Application
    Filed: April 24, 2001
    Publication date: April 4, 2002
    Inventors: Toshinori Mimura, Hiroaki Onishi, Hiroshi Yamauchi, Toshiaki Yamauchi, Jun Shirai, Yoshiyuki Nagai, Muneyoshi Fujiwara
  • Publication number: 20020033412
    Abstract: A flip chip interconnect system comprises an elongated pillar comprising two elongated portions, a first portion including solder with or without lead and a second portion including copper or gold or other material having a higher reflow temperature than the first portion. The second portion is to be connected to the semiconductor chip and has a length preferably of more than 55 microns to reduce the effect of &agr; particles from the solder from affecting electronic devices on the chip. The total length of the pillar is preferably in the range of 80 to 120 microns.
    Type: Application
    Filed: April 26, 2001
    Publication date: March 21, 2002
    Inventor: Francisca Tung
  • Publication number: 20020033411
    Abstract: A flex circuit apparatus for a disc drive is provided and is configured to limit a collapse of a chip during a reflow attachment of the chip to a flex circuit substrate. The apparatus includes a connection pad and a trace operably disposed on an operating surface of the flex circuit substrate. The trace is adjacently and operably connected to the connection pad. A barrier crosses the trace and is configured to limit a flow of material down the trace. In another embodiment, a method for limiting a collapse of a chip during reflow attachment of the chip to a flex circuit substrate is provided.
    Type: Application
    Filed: June 28, 2001
    Publication date: March 21, 2002
    Inventors: Michael J. Peterson, Robert M. Echols, Erik J. Lindquist, Darryl W. Leslie
  • Patent number: 6349872
    Abstract: Substrate warpage is eliminated without adversely affecting connection reliability when an IC chip or other packaging component is mounted on a substrate by thermocompression bonding with an interposed thermosetting adhesive. In a packaging method for the thermocompression bonding of a substrate and an IC chip or other packaging component between a stage and a head by means of an interposed thermosetting adhesive, the temperature of the stage during thermocompression bonding is set above the temperature corresponding to the inflection point of the elastic modulus in the relationship between the elastic modulus and the temperature of the cured adhesive.
    Type: Grant
    Filed: April 13, 2000
    Date of Patent: February 26, 2002
    Assignee: Sony Chemicals Corp.
    Inventors: Yukio Yamada, Hiroyuki Fujihira, Motohide Takeichi
  • Publication number: 20020017553
    Abstract: A structure of solder bumps with improved coplanarility, comprising a substrate, a passivation layer, a plurality of Under Ball Metallurgy (UBM) layers and a plurality of solder bumps. The substrate has at least an active surface, and a plurality of bonding pads are provided thereon. The UBM layers with various areas are electrically connected to the bonding pads. Finally, the solder bumps are formed with uniform-height on the UBM layers. A method of forming solder bumps with improved coplanarity. A UBM structure with various sizes of openings is provided to control the volume of the solder, wherein the various sizes of openings are corresponding to the current distribution across the wafer. The purpose of the various openings is to control the volume of the solder in order to form uniform-heights of solder bumps, the coplanarity of the solder bumps can thus be improved.
    Type: Application
    Filed: April 25, 2001
    Publication date: February 14, 2002
    Inventor: Jui-Meng Jao
  • Patent number: 6341723
    Abstract: Disclosed is a method of manufacturing a golf club head in which in integrating a metal plate part with a club head main body, either a fused metal or a fused ceramic is adhered onto a surface of the metal plate part before the metal plate part is welded to the club head main body, and the metal plate part is then welded to the club head main body thus integrating the metal plate part with the club head main body.
    Type: Grant
    Filed: December 16, 1999
    Date of Patent: January 29, 2002
    Assignee: The Yokohama Rubber Co., Ltd.
    Inventors: Norihiko Nakahara, Shinji Yamamoto
  • Publication number: 20010050303
    Abstract: A method for reworking integrated circuit (IC) wafers having copper-metallized bond pads covered by deposited layers of a barrier metal and a bondable metal. After identifying the wafers with off-spec metal layers, the wafers are chemically etched using selective etchants consecutively until the metal layers over the bond pads are removed without damaging the copper metallization. Replacement metal layers are finally deposited over the bond pads. Specifically, the bondable metal, such as gold, is selectively removed by a cyclic dithio-oxamine compound, dissolved in tetra-hydro-furane or acetone. The barrier metals, such as nickel and palladium, are removed by a mixture of inorganic and organic oxidizing acids.
    Type: Application
    Filed: May 24, 2001
    Publication date: December 13, 2001
    Inventors: Cheryl Hartfield, Thomas M. Moore
  • Patent number: 6316125
    Abstract: The invention provides a new and improved process and exothermic reaction mixture for producing molten weld metal. The molten weld metal is used in joining one metallic piece with at least one other metallic piece. The process and exothermic reaction mixture have distinct advantages over the prior art. These advantages include a higher filler metal yield, an increased tensile strength, and a higher quality corrosion resistant weld. These advantages are accomplished by a process wherein a reactant mixture is provided which has a reducing agent, a metallic compound, and at least two filler metals that at least in part do not chemically react with the metallic compound, one of which is aluminum. The metallic compound subsequently forms, with the reducing agent, having a high heat of formation which provides an exothermic reaction with sufficient heat to melt the filler metals.
    Type: Grant
    Filed: April 1, 1999
    Date of Patent: November 13, 2001
    Assignee: Erico International Corporation
    Inventors: Nicolae Gaman, Harrie van den Nieuwelaar
  • Publication number: 20010035452
    Abstract: A robust, reliable and low-cost metal structure and process enabling electrical wire/ribbon connections to the interconnecting copper metallization of integrated circuits. The structure comprises a layer of barrier metal that resists copper diffusion, deposited on the non-oxidized copper surface in a thickness such that the barrier layer reduces the diffusion of copper at 250° C. by more than 80% compared with the absence of the barrier metal. The structure further comprises an outermost bondable layer which reduces the diffusion of the barrier metal at 250° C. by more than 80% compared with the absence of the bondable metal. Finally, a metal wire is bonded to the outermost layer for metallurgical connection.
    Type: Application
    Filed: March 23, 2001
    Publication date: November 1, 2001
    Inventors: Howard R. Test, Gonzalo Amador, Willmar E. Subido
  • Patent number: 6295709
    Abstract: A PCB assembly which allows economical and reliable rework. The PCB assembly contains a soldermask and a trace with a portion of the trace exposed by a soldermask relief When one needs to rework the PCB assembly, one bonds a rework wire, using conventional intermetalic bonding materials, to the portion of the trace exposed by the soldermask relief There is no need to bond a rework wire to a component. Further, there is no need to scrape a off the soldermask and possibly damage the traces and/or vias. The bonds are high reliability bonds, and the labor required to perform such bonds are minimal.
    Type: Grant
    Filed: August 19, 1997
    Date of Patent: October 2, 2001
    Assignee: Micron Technology, Inc.
    Inventor: Dean A. Klein
  • Publication number: 20010011675
    Abstract: A semiconductor device in chip format having a chip which has at least one first insulating layer and electrical connection pads free of the insulating layer is described. On the first insulating layer, interconnects run from the electrical connection pads to base regions of external connection elements. A further applied insulating layer is provided with openings leading from the outside to the base regions of the external connection elements. In the openings there is a conductive adhesive, onto which small balls which are metallic at least on the outside are placed. The semiconductor element can also contain a solder paste instead of a conductive adhesive in the openings, and metallized small plastic balls are placed onto the solder paste. The invention furthermore relates to methods for producing the semiconductor device described.
    Type: Application
    Filed: January 16, 2001
    Publication date: August 9, 2001
    Inventors: Hans-Jurgen Hacke, Klaus-Peter Galuschki
  • Publication number: 20010010324
    Abstract: A bump forming apparatus comprises a container for retaining therein a solder melt, a solder forming member having a side wall portion and a ceiling portion which form, above a substrate's flat surface, a chamber for receiving therein the solder melt. The solder forming member also includes a height regulator portion provided on an exterior of the side wall portion and having a flat surface for restricting the height of the solder melt during formation. Heating means for heating the solder melt may also be provided. A hole in the solder forming portion allows solder melt to flow from the container to the chamber. Pressurizing means for pressurizing the solder melt in the container to thus expedite passage of solder melt into the chamber of the forming member may be used. Depressurization means for reducing the inside pressure of the container to cause the unused metal to return from the chamber into the container may also be used.
    Type: Application
    Filed: April 10, 2001
    Publication date: August 2, 2001
    Applicant: International Business Machines Corporation
    Inventors: Yohji Maeda, Yutaka Tsukada
  • Patent number: 6220497
    Abstract: In method for soldering metal microstructured plates, stacks of plates and solder layers are prepared by placing the solder layers between each adjacent plate. The thickness of the solder layers range from 3 to 25 &mgr;m. The stack is then soldered by heating it in a vacuum or an inert atmosphere.
    Type: Grant
    Filed: January 19, 1999
    Date of Patent: April 24, 2001
    Assignee: Xcellsis GmbH
    Inventors: Uwe Benz, Lothar Haug, Wolfgang Kleinekathoefer, Peter Waitkat
  • Patent number: 6220503
    Abstract: A method and apparatus for desoldering electronic components from a substrate. A vacuum is used to enhance the flow of a hot gas under an electronic component to reflow the solder connections attaching the electronic component to a substrate. Water vapor is added to the hot gas to increase the heat capacity of the hot gas. A system for periodically changing the direction of flow of the hot gas and vacuum under the electronic component is used to uniformly heat the solder connections. A method and apparatus for depositing underfill material between an electronic component and the substrate on which the electronic component is mounted. A vacuum is applied to enhance the flow of underfill material into the space between the electronic component and the substrate.
    Type: Grant
    Filed: February 2, 1999
    Date of Patent: April 24, 2001
    Assignee: International Business Machines Corporation
    Inventors: Wilton L. Cox, Joseph D. Poole, Kris A. Slesinger
  • Patent number: 6164522
    Abstract: An improved method of manufacturing thick film circuit wherein an IC is attached to a central conductor pad with adhesive, and wherein spreading of the adhesive is constrained by a ring of porous dielectric material formed between the central conductor pad and the peripheral conductor pads to which the IC terminals are bonded. When the adhesive material is printed and begins to spread, it contacts the porous dielectric ring, which absorbs the adhesive material and stops the spreading. In this way, the porous dielectric ring controls the dimensions of the cured adhesive, thereby preventing the adhesive from contaminating the peripheral conductor pads. Even with the addition of the intervening dielectric ring, the length of the wire-bond connections and the overall dimension of the IC and its conductor pads are both significantly decreased, contributing to improved circuit area utilization and wire-bond durability.
    Type: Grant
    Filed: August 27, 1999
    Date of Patent: December 26, 2000
    Assignee: Delphi Technologies, Inc.
    Inventors: Frans Peter Lautzenhiser, John Karl Isenberg
  • Patent number: 6161750
    Abstract: A weld tab has a tab which contains a circular groove therein. A metal stick is received in the circular groove. The tab has an end which has a snapping groove to receive a pad. The pad has two ends each received in the snapping groove of the tab.
    Type: Grant
    Filed: August 9, 1999
    Date of Patent: December 19, 2000
    Inventors: Chien-Chang Yang, Marlon Chen
  • Patent number: 6131800
    Abstract: A method of applying a surface coating to a stator vane (1) of a gas turbine, the stator vane (1) comprising a platform (3) with an outer surface (4) connected to the stator of the gas turbine and an airfoil (2) connected to the platform (3), the method comprising the steps of each stator vane (1) is provided as a singlet, a base layer coating (7) affording resistance to oxidation is applied to surfaces of said stator vane (1) and said outer surface (4) of the platform (3) to be exposed to hot gases of the gas turbine, and a top layer coating (8) affording thermal resistance is applied to all coated surfaces of said stator vane (1) and the outer surface (4) of the platform (3), and welding the stator vanes (1) together, wherein a welding filler material (10) is placed between said walls of two adjacent platforms (3) of said stator vane (1), welding said singlets to one another at the margins of walls of said platform (3) to said welding filler material (10).
    Type: Grant
    Filed: January 28, 2000
    Date of Patent: October 17, 2000
    Assignee: ABB Alstom Power (Switzerland) Ltd
    Inventors: John Fernihough, Alexander Beeck, Gordon David Anderson
  • Patent number: 6119923
    Abstract: A method for soldering a first component having a metal surface to a second component having a metal surface includes holding the metal surface of the first component in a position above a placement area on the metal surface of the second component to establish a gap between the surfaces. The method further includes reflowing solder within the gap.A structure including a thermally conductive baseplate, an electrical insulator attached to the baseplate, and a metallic shield mounted on the insulator. The structure also includes an integrated power device having a power-dissipating electronic device, and a first metal layer connected to the shield through a solder joint. A substrate includes an aperture, and the integrated power device is mounted with the power-dissipating device sitting within the aperture. The substrate also includes a conductive run electrically connected to a second metal layer of the integrated power device.
    Type: Grant
    Filed: June 3, 1998
    Date of Patent: September 19, 2000
    Assignee: VLT Corporation
    Inventors: Patrizio Vinciarelli, Robert E. Belland, George J. Ead, Fred M. Finnemore, Lance L. Andrus
  • Patent number: 6089442
    Abstract: A method of connecting first electrodes formed on a first substrate to second electrodes formed on a second substrate and partially coated with a resist pattern so as to substantially expose an opening thereof at a surface of the second electrodes includes (a) coating the second electrodes with a solder at the opening of the resist pattern, (b) aligning the first electrodes with the second electrodes, and (c) electrically connecting the first electrodes to the second electrodes through the solder by heat-pressing the first and second electrodes with a heat-pressure bonding head including a tip face having a width smaller than a width of the opening of the resist pattern so as to heat-press the first and second electrodes at an entire region of the tip face of the heat-pressure bonding head. The method is effective in performing a good electrical connection between electrodes through a solder irrespective of an amount of the solder.
    Type: Grant
    Filed: April 7, 1997
    Date of Patent: July 18, 2000
    Assignee: Canon Kabushiki Kaisha
    Inventors: Toshimichi Ouchi, Riichi Saito, Masanori Takahashi
  • Patent number: 6085968
    Abstract: A method of forming solder bumps on a wafer. The wafer includes at least one substrate, a plurality of solder-wettable pads and a solder wettable retention ring about the periphery of the wafer. The method of forming solder bumps includes forming a non-solder-wettable mask on the wafer which includes a plurality of apertures which align with the solder-wettable pads, and the solder wettable retention ring surrounds the mask. The mask and wafer are positioned within an aperture of a stencil so that the solder wettable retention ring aligns with a gap between the periphery edge of the mask and an inside edge of the aperture of the stencil. Solder paste is applied to the mask so that the solder paste fills the apertures of the mask and the gap. The solder paste is reflowed forming solder bumps on the pads and a solder ring on the solder wettable retention ring. The mask is removed after formation of the solder bumps.
    Type: Grant
    Filed: January 22, 1999
    Date of Patent: July 11, 2000
    Assignee: Hewlett-Packard Company
    Inventors: Susan J. Swindlehurst, Hubert A. Vander Plas, Jacques Leibovitz
  • Patent number: 6056191
    Abstract: The present invention discloses a method and apparatus for forming solder bumps by a molten solder screening technique in which a flexible die head constructed of a metal sheet is utilized for maintaining an intimate contact between the die head and a solder receiving mold surface. The flexible die head, when used in combination with a pressure means, is capable of conforming to any curved mold surface as long as the curvature is not more than 2.5 .mu.m per inch of die length. The present invention further provides a method and apparatus for filling a multiplicity of cavities in a mold surface by providing a stream of molten solder and then intimately contacting the surface of the molten solder with a multiplicity of cavities such that the molten solder readily fills the cavities. The apparatus further provides means for removing excess molten solder from the surface of the mold without disturbing the molten solder already filled in the cavities.
    Type: Grant
    Filed: April 30, 1998
    Date of Patent: May 2, 2000
    Assignee: International Business Machines Corporation
    Inventors: Guy Paul Brouillette, Peter Alfred Gruber, Frederic Maurer
  • Patent number: 6045427
    Abstract: In an X-ray image intensifier, an incident window on which X-rays are incident is fixed to a support frame fixed to a glass vessel. The incident window has a dome portion and a flat portion around the dome portion, and is fixed to the support frame through an annular brazing sheet. The brazing sheet has brazing material layers. The brazing material layers are melted, thereby welding the brazing sheet, the incident window, and the support frame with each other. A groove is formed in the brazing sheet to form a brazing material puddle, so the brazing material will not reach the input screen of the incident window during melting.
    Type: Grant
    Filed: October 10, 1997
    Date of Patent: April 4, 2000
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hitoshi Yamada, Tadashi Shimizu
  • Patent number: 5906310
    Abstract: A method for soldering a first component having a metal surface to a second component having a metal surface includes holding the metal surface of the first component in a position above a placement area on the metal surface of the second component to establish a gap between the surfaces. The method further includes reflowing solder within the gap.A structure including a thermally conductive baseplate, an electrical insulator attached to the baseplate, and a metallic shield mounted on the insulator. The structure also includes an integrated power device having a power-dissipating electronic device, and a first metal layer connected to the shield through a solder joint. A substrate includes an aperture, and the integrated power device is mounted with the power-dissipating device sitting within the aperture. The substrate also includes a conductive run electrically connected to a second metal layer of the integrated power device.
    Type: Grant
    Filed: September 5, 1995
    Date of Patent: May 25, 1999
    Assignee: VLT Corporation
    Inventors: Patrizio Vinciarelli, Robert E. Belland, George J. Ead, Fred M. Finnemore, Lance L. Andrus
  • Patent number: 5873703
    Abstract: A surface defect in a gamma titanium aluminide article is repaired by weld repairing the defect and thereafter sealing the surface-connected cracks in the weldment. The surface-connected cracks are repaired by applying to the region of the weldment a powder of a brazing filler metal that is compatible with the gamma titanium aluminide alloy and with the weldment, and thereafter heating the article to a brazing temperature above the liquidus of the brazing filler metal. The article is preferably hot isostatically pressed after the repair is completed to close internal defects that cannot otherwise be closed due to the surface connected cracks.
    Type: Grant
    Filed: January 22, 1997
    Date of Patent: February 23, 1999
    Assignee: General Electric Company
    Inventors: Thomas J. Kelly, Russell W. Smashey, Eric J. Boerger, Ronald L. Sheranko
  • Patent number: 5868302
    Abstract: In a method and a device for mounting an electronic component, a solder paste is printed on lands of a substrate with the use of a mask having a projecting part at a portion facing the substrate and positioned to between neighboring lands, and the projecting part prevents the solder paste on of the neighboring lands from flowing so as to come in contact with a other of the neighboring land to cause a shortcircuit between the neighboring lands.
    Type: Grant
    Filed: September 4, 1996
    Date of Patent: February 9, 1999
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hiroaki Onishi, Masato Hirano
  • Patent number: 5816868
    Abstract: One and two piece surface mount pin constructions include excess solder receiving channels. In the one piece construction an elongate channel is provided through a tubular pin which is flared or swaged at the lower end to form a base. In the two piece construction a solid pin is provided at a lower end with a uniform cross section in the form of a regular polygon, such as a square, hexagon or octagon. The resulting edges are press-fit against an internal surface of a sleeve which is also swaged at a lower end to form a base. The spaces between the sleeve and the flat or convex surfaces on the captured end of the pin provide the solder-receiving channels. A bead or shoulder on the pins can provide a stop for a vacuum nozzle. When a flared upper lip is used for this purpose it can also serve as a reservoir or well to receive excess solder beyond the amount that can be received in the channels.
    Type: Grant
    Filed: February 12, 1996
    Date of Patent: October 6, 1998
    Assignee: Zierick Manufacturing Corp.
    Inventors: Janos Legrady, Ronald M. Fredriks
  • Patent number: 5796189
    Abstract: A method of creating a brazed joint between a plurality of solid and hollow strands of a stator bar and a stator bar end fitting comprising the steps of:a) inserting between free ends of the plurality of solid and hollow strands a preformed braze alloy such that the braze alloy is at least flush with the free ends of the hollow and solid strands;b) applying stop off material to free end edges of at least the hollow strands;c) inserting the solid and hollow strands and preformed braze alloy in an opening of a stator bar end fitting;d) heating the braze alloy to cause the braze alloy to flow about and between the solid and hollow strands and between the fitting and the solid and hollow strands, but wherein the stop off material prevents flow of braze alloy onto the free end edges of the hollow strands.
    Type: Grant
    Filed: January 23, 1996
    Date of Patent: August 18, 1998
    Assignee: General Electric Co.
    Inventors: Michael Patrick Manning, Robert Timothy Lembke
  • Patent number: 5787580
    Abstract: A method for making a RF module by a ball grid array package includes: perforating a feed-through hole which penetrates top and bottom surfaces of a terminal position of a chip populated on a substrate; forming a conductive line connecting top and bottom surfaces of said substrate into said feed-through hole; coating a part excepting a ball grid array pad on said conductive line with an insulator, by using emulsion mesh on said top surface of said substrate; making a stencil mask which provides a predetermined-sized aperture on a top surface of said ball grid array pad by using a metal mesh, and printing a solder paste on said ball grid array pad by using said stencil mask; and forming a ball grid array package solder ball through a reflow soldering of the solder paste in a nitrogen atmosphere. This method accuratly and easily forms a desired RF module without a solder printing process about a minute terminal pattern, thereby reducing a cost of production and preventing a poor product.
    Type: Grant
    Filed: November 19, 1996
    Date of Patent: August 4, 1998
    Assignee: LG Information & Communications, Ltd.
    Inventor: Jun-Hwan Woo
  • Patent number: 5766674
    Abstract: In a method of producing a printed wiring board, solder layers are formed on pads beforehand. After the solder layers have been covered with a solder resist, the solder layers are caused to flow so as to render only the portion of the solder resist overlying the pads fragile. Then, the fragile portions of the solder resist are removed by roughening with the result that solder resist dams for preventing the solder from flowing are formed. This kind of procedure allows thick solder layers to be formed simultaneously with the solder resist dams without resorting to a great number of steps or an extra mask.
    Type: Grant
    Filed: February 20, 1996
    Date of Patent: June 16, 1998
    Assignee: NEC Corporation
    Inventor: Koichi Hirosawa
  • Patent number: 5733400
    Abstract: An intravascular catheter carries a helical reinforcement member embedded within at least a portion of the tubular wall of the catheter. The helical reinforcement member comprises a helical first portion having coils of greater pitch than the pitch of helical coils of a second portion. Preferably, the catheter is for insertion into brain arteries, and comprises a flexible tube having an outer diameter of no more that about 0.05 inch, for example 3 French or smaller. The flexible tube defines outer and inner tubular layers. The inner tubular layer surrounds a catheter lumen and comprises chemically inert fluorinated polymer such as PTFE. The outer tubular layer comprises at least three longitudinally spaced, connected tubular sections. The sections are of successively increasing flexibility from the proximal toward the distal catheter end.
    Type: Grant
    Filed: May 8, 1996
    Date of Patent: March 31, 1998
    Assignee: Cordis Corporation
    Inventors: Susana M. Gore, Mark Mueller, Nicholas Green, Jeffrey G. Gold, Peter P. Soltesz
  • Patent number: 5704535
    Abstract: A shield (50) for use in wave soldering processes to selectively affix solder to an area of circuit board (20), having one or more electronic components (21) on the solder side of the board, is disclosed. Shield (50) includes a generally planar base member (51) of low thermal conductivity which forms the foundation of shield (50). Marginally disposed registration ridges (54) are formed on the upper surface (52). Registration ridges (54) serve to hold circuit board (20) against shield (50) in a fixed position. Ridges (54) are positioned to closely receive the peripheral edges of circuit board (20). One or more solder flow openings (56) are formed through base member (51) extending from upper side (52) to lower side (53). Solder flow openings (56) are positioned to align with the selected areas of circuit board (20) to which solder is to be affixed. One or more recesses (55) are provided in the upper surface (52) of base member (51) to receive and shield electronic components (21).
    Type: Grant
    Filed: February 18, 1997
    Date of Patent: January 6, 1998
    Assignee: Micron Electronics, Inc.
    Inventor: Curtis C. Thompson, Sr.
  • Patent number: 5676303
    Abstract: The invention is an apparatus and method for wire splicing using an explosive joining process. The apparatus consists of a prebend, U-shaped strap of metal that slides over prepositioned wires. A standoff means separates the wires from the strap before joining. An adhesive means holds two ribbon explosives in position centered over the U-shaped strap. A detonating means connects to the ribbon explosives. The process involves spreading strands of each wire to be joined into a flat plane. The process then requires alternating each strand in alignment to form a mesh-like arrangement with an overlapped area. The strap slides over the strands of the wires, and the standoff means is positioned between the two surfaces. The detonating means then initiates the ribbon explosives that drive the strap to accomplish a high velocity, angular collision between the mating surfaces. This collision creates surface melts and collision bonding resulting in electron-sharing linkups.
    Type: Grant
    Filed: April 4, 1996
    Date of Patent: October 14, 1997
    Assignee: The United States of America as represented by the Administrator of the National Aeronautics and Space Administration
    Inventors: Laurence J. Bement, Ronnie B. Perry
  • Patent number: 5668699
    Abstract: There is disclosed a technique for constructing a printed circuit board assembly to provide solder joints with a uniform height. A solder mask is provided on the external surfaces of the printed circuit board to minimize the mount of conductive pad area that is exposed to solder. The solder mask includes a plurality of relatively small openings with a predetermined pattern to minimize the build up of solder, while insuring sufficient solder height to connect to the grounding component located on the chassis to insure adequate EMI protection. Preferably a polka dot pattern is used for certain conductive pads, while a single narrow strip or the solder mask opening configuration is used for rectangular pad configurations. Other configurations and patterns are also available to provide an adequate electrical connection while insuring uniform solder height.
    Type: Grant
    Filed: July 18, 1996
    Date of Patent: September 16, 1997
    Assignee: Dell USA L.P.
    Inventors: James S. Bell, Gita Khadem, Joseph A. Vivio
  • Patent number: 5620131
    Abstract: During formation of solder bumps on the bonding pads of a component, a two-layer dam structure is utilized to block solder from flowing from the pads to adjacent portions of a metallization pattern. After the solder bumps are formed, the top dam layer is dissolved, whereby any solder debris present on the top dam layer is also removed from the structure. The bottom dam layer, which remains intact during the removal step, serves to confine solder movement during a subsequent bonding operation in which the solder bumps are reflowed to cause them to adhere to aligned pads on another component.
    Type: Grant
    Filed: June 15, 1995
    Date of Patent: April 15, 1997
    Assignee: Lucent Technologies Inc.
    Inventors: Casey F. Kane, Joseph Shmulovich
  • Patent number: 5520323
    Abstract: Contacts such as contact points, contact strips, or contact sections are usually provided with hard solder on a copper-silver basis in the form of a flat solder layer. The contact is then connected over this solder layer with a contact carrier. The solder layer is melted, whereupon the free surface of the solder layer (13, 130) is covered during melting with a material (1, 5, 15) that has no solubility with silver or copper. The material can, during melting of the solder, form a covering (1, 15) beneath the contact (10, 12, 100) provided on its solder side with the solder layer (13, 130) or can also form a covering over the contact (10, 12, 100) provided on its solder side with the solder layer (13, 130). As materials for covering the solder layer (13, 130), high-melting metals, preferably tantalum, or a ceramic are used.
    Type: Grant
    Filed: June 20, 1994
    Date of Patent: May 28, 1996
    Assignee: Siemens Aktiengesellschaft
    Inventors: Franz Hauner, Manfred Schneider
  • Patent number: 5518165
    Abstract: Methods of soldering circuit boards are provided in which a snap bar is provided on the conductor side of a printed circuit board for reducing defects, such as bridging, during mass soldering. This and other provided process and design techniques, such as lead lengths, orientation, mask finish, and the location of the leads on the board, have significantly reduced reworking and defective components and are especially effective when applied to 50 mil connector products.
    Type: Grant
    Filed: June 23, 1993
    Date of Patent: May 21, 1996
    Assignee: Compaq Computer Corporation
    Inventors: David B. Throop, Duane L. Sevy
  • Patent number: 5488539
    Abstract: A method and apparatus is disclosed for protecting a solder pad for a chip on tape packaged integrated circuit mounted on a surface of a printed circuit board that is exposed to a wave soldering operation. A pad cover may be used to protect the solder pad. The pad cover is mounted over the solder pad in a manner that protects the solder pad from being exposed to solder during the wave solder operation. After the wave solder is completed, the cover is removed and the leads of the chip on tape packaged integrated circuit are connected to associated solder pad traces on the printed circuit board. This type of arrangement is particularly useful in arrangements which require a heat sink to cool the chip on tape packaged integrated circuit.
    Type: Grant
    Filed: January 21, 1994
    Date of Patent: January 30, 1996
    Assignee: Sun Microsystems, Inc.
    Inventors: James F. Testa, Jens Horstmann, Hassan Siahpolo
  • Patent number: 5460318
    Abstract: A solder geometry for epi-down diebonding an optoelectronic component to a heat sink platform includes a solder deposition pattern having exposure windows to create gaps or diebond bridges in the solder pattern. The active regions of the components are disposably registered within the gaps of the solder pattern.
    Type: Grant
    Filed: June 1, 1994
    Date of Patent: October 24, 1995
    Assignee: GTE Laboratories Incorporated
    Inventors: Robert A. Boudreau, Richard H. Sargent
  • Patent number: 5402926
    Abstract: A method of brazing a plurality of components by heating the components superposed on each other with a brazing material interposed between adjacent bonding surfaces of the components, wherein the brazing material has a relatively low degree of wettability with respect to the material of the components to be brazed, and is applied to a patterned film of a high-wettability metal having a relatively high degree of wettability with respect to the brazing material, which film is formed on at least one of bonding surfaces of the components, so as to cover predetermined areas of the bonding surface while leaving adjacent non-bonding areas of the bonding surface uncovered so as to restrict the flow of brazing material.
    Type: Grant
    Filed: September 28, 1993
    Date of Patent: April 4, 1995
    Assignee: NGK Insulators, Ltd.
    Inventors: Yukihisa Takeuchi, Natsumi Shimogawa, Nobuo Takahashi