With Distributed Amplified Current Patents (Class 257/160)
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Patent number: 11362204Abstract: A thyristor is formed from a vertical stack of first, second, third, and fourth semiconductor regions of alternated conductivity types. The fourth semiconductor region is interrupted in a gate area of the thyristor. The fourth semiconductor region is further interrupted in a continuous corridor that extends longitudinally from the gate area towards an outer lateral edge of the fourth semiconductor region. A gate metal layer extends over the gate area of the thyristor. A cathode metal layer extends over the fourth semiconductor region but not over the continuous corridor.Type: GrantFiled: December 6, 2019Date of Patent: June 14, 2022Assignee: STMicroelectronics (Tours) SASInventors: Samuel Menard, Lionel Jaouen
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Patent number: 9871129Abstract: A thyristor is disclosed comprising: a first region of a first conductivity type; a second region of a second conductivity type and adjoining the first region; a third region of the first conductivity type and adjoining the second region; a fourth region of the second conductivity type and comprising a first segment and a second segment separate from the first segment, the first segment and second segment each adjoining the third region; a first contact adjoining the first region; a second contact adjoining the first segment; and a trigger contact adjoining the second segment and separate from the second contact.Type: GrantFiled: May 16, 2014Date of Patent: January 16, 2018Assignee: Silergy Corp.Inventors: Rob Van Dalen, Maarten Jacobus Swanenberg, Inesz Emmerik-Weijland
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Patent number: 8390124Abstract: Provided is a semiconductor device including a substrate, and a first wiring layer, a second wiring layer, and a switch via formed on the substrate. The first wiring layer has first wiring formed therein and the second wiring layer has second wiring formed therein. The switch via connects the first wiring and the second wiring. The switch via includes at least at its bottom a switch element including a resistance change layer. A resistance value of the resistance change layer changes according to a history of an electric field applied thereto.Type: GrantFiled: February 16, 2010Date of Patent: March 5, 2013Assignee: Renesas Electronics CorporationInventors: Naoya Inoue, Yoshihiro Hayashi, Kishou Kaneko
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Patent number: 7956381Abstract: A multi-layered semiconductor apparatus capable of producing at least 500 W of continuous power includes at least two device substrates arranged in a stack. Each of the at least two device substrates has a first side and a second side opposite to the first side, and each of the at least two device substrates is configured to produce an average power density higher than 100 W/cm2. A plurality of active devices are provided on the first side of each of the at least two device substrates. The plurality of active devices are radiatively coupled among the at least two device substrates. At least one of the at least two device substrates is structured to provide a plurality of cavities on its second side to receive corresponding ones of the plurality of active devices on the first side of an adjacent one of the at least two device substrates.Type: GrantFiled: August 11, 2008Date of Patent: June 7, 2011Assignee: HRL Laboratories, LLCInventors: Peter D. Brewer, Keith V. Guinn, Jonathan J. Lynch
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Patent number: 7453104Abstract: In an operational amplifier including first and second power supply terminals, first and second input terminals, and a first and second output terminals, a first differential amplifier circuit includes first and second MOS transistors with a common source connected to a first tail current source, first and second load resistors and a first non-doped MOS transistor connected between the first and second resistors and the second power supply terminal. A second differential amplifier circuit includes third and fourth MOS transistors with a common source connected to a second tail current source, third and fourth load resistors and a second non-doped MOS transistor connected between the third and fourth load resistors and the second power supply terminal.Type: GrantFiled: January 21, 2005Date of Patent: November 18, 2008Assignee: NEC Electronics CorporationInventor: Toshiyuki Etoh
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Patent number: 7312482Abstract: The present invention is directed to improve high frequency characteristics by reducing inductance of a source. In an HEMT assembled in a power amplifier device, each of a drain electrode, a source electrode, and a gate electrode is constructed by a base portion and a plurality of fingers projected in a comb-teeth shape from the base portion, and the fingers of the electrodes mesh with each other. In the source electrode, a width of the fingers positioned at both ends of the plurality of fingers is wider than a width of each of the fingers positioned between both ends. The width of each of the fingers positioned at both ends is a width equal to or larger than a sum of the widths of the plurality of fingers positioned between both ends, and the width of the base portion is wider than that of each of the fingers positioned at both ends. An electrode pad provided for the source base portion and an external electrode terminal are connected to each other via a conductive wire.Type: GrantFiled: October 3, 2006Date of Patent: December 25, 2007Assignee: Renesas Technology Corp.Inventors: Akishige Nakajima, Hidenori Suenaga, Eigo Tange
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Patent number: 7064359Abstract: A switching semiconductor device includes a first compound layer formed on a single crystal substrate which includes silicon carbide or sapphire, and including a general formula InxGa1-xN, where 0?x?1; a second compound layer formed on the first compound layer, and including a general formula InyALzGa1-y-zN, where 0?y?1 and 0<z?1; and a gate electrode formed on the second compound layer. The gate electrode is electrically connected to a resistance element formed on a first interlayer insulating film that covers the gate electrode, through a metal wiring formed on a second interlayer insulating film that covers the first interlayer insulating film.Type: GrantFiled: August 6, 2004Date of Patent: June 20, 2006Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Hidetoshi Ishida, Tsuyoshi Tanaka, Daisuke Ueda
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Patent number: 6914280Abstract: Since a 5 GHz-band broadband has a frequency twice that of 2.4 GHz, the parasitic capacitance greatly influences deterioration in isolation of a switching device used in this frequency region. Therefore, to improve isolation, a shunt FET is added to the device. The switching device also includes a protecting element that has a first n+-type region, an insulating region and a second n+-type region. This protecting element is connected in parallel between two electrodes of the shunt FET. Since electrostatic charges are discharged between the first and second n+-type regions, the electrostatic energy reaching an operation region of the shunt FET can be reduced without an increase in parasitic capacitance.Type: GrantFiled: October 17, 2003Date of Patent: July 5, 2005Assignee: Sanyo Electric Co., Ltd.Inventors: Tetsuro Asano, Mikito Sakakibara, Yoshibumi Nakajima, Hidetoshi Ishihara
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Publication number: 20030057436Abstract: Three or more MESFETs are fabricated side by side on a semiconductor chip. A transmission line substantially identical in width with an are a within which the MESFETS are fabricated is formed in parallel with the row of MESFETs. The MESFETs are connected to the transmission line by way of a side constituting one edge of the transmission line. Further, regulation circuits are connected in shunt with the transmission line, whereby outputs are merged while being matched by means of the transmission line and the regulation circuits.Type: ApplicationFiled: July 15, 2002Publication date: March 27, 2003Applicant: Mitsubishi Denki Kabushiki KaishaInventor: Shin Chaki
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Patent number: 6423987Abstract: With a self-protect thyristor, having a MOSFET (M1) that is connected in series with the thyristor and a second, self-controlled MOSFET (M2) between the p-base of the thyristor and the external cathode (KA), several unit cells for the thyristor are arranged parallel connected in a semiconductor wafer. The voltage at the series MOSFET (M1) functions as an indicator for the overcurrent and excess temperature, and an additional MOSFET (M4) is provided where source (region) is connected conducting to the source of the series MOSFET (M1), where drain is conductivity connected with the gate of the series MOSFET (M1) and where gate conductivity connected with the drain of the series MOSFET (M1). A resistance (Rg) is provided between the gate electrode (G1) of the series MOSFET (M1) and the gate (G) of the thyristor.Type: GrantFiled: April 19, 2000Date of Patent: July 23, 2002Assignee: Vishay Semiconductor GmbHInventors: Rainer Constapel, Heinrich Sciilangenotto, Shuming Xu
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Publication number: 20020005525Abstract: A semiconductor device comprising a bipolar transistor having an emitter layer consisting of a semiconductor containing indium, and a protective insulating film containing silicon and oxygen which is formed on the surface of the guard ring of the emitter layer, wherein the protective insulating film has a density of oxygen of less than 7×1022 cm−3. This semiconductor device prevents performance deterioration and ensures high performance in a power amplifier.Type: ApplicationFiled: May 24, 2001Publication date: January 17, 2002Applicant: Hitachi, Ltd.Inventors: Hiroyuki Takazawa, Tohru Oka, Isao Ohbu, Yoshinori Imamura
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Publication number: 20010040241Abstract: A sensor 1 produces an output that changes linearly with absolute temperature. In response to the output, a reference voltage generator 13 produces reference voltages Vhigh and Vlow that change linearly with absolute temperature. A Schmidt trigger 14 compares the output signal from a sensor signal amplifier 12 with the reference voltages for performing on-off output. A sensor signal amplifier 12 with a temperature-independent amplification factor amplifies the output signal from the sensor 1 while performing offset compensation. A sensor signal processing circuit 2 is formed out of thin-film silicon disposed on an insulating substrate. The output from the sensor 1 undergoes accurate temperature compensation over a wide temperature range from a low temperature to a high temperature, achieving a reliable operation with accuracy at high temperature.Type: ApplicationFiled: June 14, 2001Publication date: November 15, 2001Inventors: Shuichi Nagano, Horst-Lothar Fiedler
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Patent number: 5998812Abstract: An amplifying-gate thyristor having an increased integrated circuit includes a main thyristor and an amplifying thyristor. The amplifying thyristor is of the gate turnoff-type. The main thyristor and the amplifying thyristor are such that the amplifying thyristor remains in the conductive state while the main thyristor is conductive. A control circuit turns off the amplifying thyristor when the current through the main thyristor is approximately its hold current.Type: GrantFiled: January 19, 1998Date of Patent: December 7, 1999Assignee: SGS-Thomson Microelectronics S.A.Inventors: Eric Bernier, Denis Berthiot
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Patent number: 5869361Abstract: A thin film transistor includes a substrate with a trench having first and second sides and a bottom, and a gate electrode at one of the first and second sides of the trench. The thin film transistor further includes a gate insulating layer on the entire surface of the substrate including the gate electrode, and an active layer on the gate insulating layer along the trench, the active layer having source and drain regions substantially outside the trench.Type: GrantFiled: January 8, 1998Date of Patent: February 9, 1999Assignee: LG Semicon Co., Ltd.Inventor: Seok-Won Cho