Abstract: A semiconductor device includes a semiconductor substrate and first and second bipolar transistors. The semiconductor substrate includes first and second main surfaces opposing each other. The first bipolar transistor is formed on the first main surface of the semiconductor substrate and includes a first emitter layer. The second bipolar transistor is formed on the first main surface of the semiconductor substrate and includes a second emitter layer and a resistor layer. The resistor layer is stacked on the second emitter layer in a direction normal to the first main surface.

Abstract: A semiconductor device according to the present invention includes a semiconductor layer, a trench formed selectively in an obverse surface portion of the semiconductor layer and defining a unit cell of predetermined shape in the obverse surface portion, a second conductivity type layer formed to conform to a portion or an entirety of an inner surface of the trench, an obverse surface layer of a first conductivity type formed so as to be exposed from an obverse surface of the semiconductor layer in the unit cell, a reverse surface layer of the first conductivity type formed so as to be exposed from a reverse surface of the semiconductor layer, a drift layer of the first conductivity type formed between the obverse surface layer and the reverse surface layer of the semiconductor layer and being of lower concentration than the obverse surface layer and the reverse surface layer, a first electrode contacting the obverse surface layer and forming an ohmic contact with the obverse surface layer, and a second elect

Abstract: An electronic RF power device includes a transistor chip, a device input terminal and a device output terminal. Further, the electronic RF power device includes an output impedance transformation circuit, an output contact clip bonded to the transistor chip and to the output device terminal and at least one bond wire bonded to the output impedance transformation circuit and to the transistor chip.

Abstract: A semiconductor switching device includes a package, and a semiconductor switching element provided in the package and having a collector electrode and an emitter electrode. A main collector terminal and a main emitter terminal reflect voltage drop generated during application of current by a floating component in the package. A second collector terminal and a second emitter terminal detect a voltage between the collector electrode and the emitter electrode without reflecting the voltage drop. A third emitter terminal is arranged close to the second emitter terminal, and detects the voltage drop generated between the main emitter terminal and the second emitter terminal.

Abstract: An electrostatic discharge (ESD) protection device includes a semiconductor substrate, a base region in the semiconductor substrate and having a first conductivity type, an emitter region in the base region and having a second conductivity type, a collector region in the semiconductor substrate, spaced from the base region, and having the second conductivity type, a breakdown trigger region having the second conductivity type, disposed laterally between the base region and the collector region to define a junction across which breakdown occurs to trigger the ESD protection device to shunt ESD discharge current, and a gate structure supported by the semiconductor substrate over the breakdown trigger region and electrically tied to the base region and the emitter region. The lateral width of the breakdown trigger region is configured to establish a voltage level at which the breakdown occurs.

Abstract: A semiconductor switching device includes a package, and a semiconductor switching element provided in the package and having a collector electrode and an emitter electrode. A main collector terminal and a main emitter terminal reflect voltage drop generated during application of current by a floating component in the package. A second collector terminal and a second emitter terminal detect a voltage between the collector electrode and the emitter electrode without reflecting the voltage drop. A third emitter terminal is arranged close to the second emitter terminal, and detects the voltage drop generated between the main emitter terminal and the second emitter terminal.

Abstract: A semiconductor component is disclosed. One embodiment provides a semiconductor body having a cell region with at least one zone of a first conduction type and at least one zone of a second conduction type in a rear side. A drift zone of the first conduction type in the cell region is provided. The drift zone contains at least one region through which charge carriers flow in an operating mode of the semiconductor component in one polarity and charge carriers do not flow in an operating mode of the semiconductor component in an opposite polarity.

Abstract: A heterojunction bipolar transistor (HBT) device and system having electrostatic discharge ruggedness, and methods for making the same, are disclosed. An HBT device having electrostatic discharge ruggedness may include one or more emitter fingers including an emitter layer, a transition layer formed over the emitter layer, and an emitter cap layer formed over the transition layer.

Abstract: The objective of this invention is to provide a semiconductor device having a thyristor that can shorten the turn-off time. A first electroconductive type first semiconductor region 20 is formed on a substrate, and a second electroconductive type second semiconductor region 22, a second electroconductive type third semiconductor region 23, designated as an anode, and a first electroconductive type fourth semiconductor region 24, designated as an anode gate, are formed on the surface layer part of the first semiconductor region. Also, a first electroconductive type fifth semiconductor region 26, designated as a cathode, and a second electroconductive type sixth semiconductor region 25, designated as a cathode gate, are formed on the surface layer part of the second semiconductor region.

Abstract: A light-emitting device operating on a high drive voltage and a small drive current. LEDs (1) are two-dimensionally formed on an insulating substrate (10) of e.g., sapphire monolithically and connected in series to form an LED array. Two such LED arrays are connected to electrodes (32) in inverse parallel. Air-bridge wiring (28) is formed between the LEDs (1) and between the LEDs (1) and electrodes (32). The LED arrays are arranged zigzag to form a plurality of LEDs (1) to produce a high drive voltage and a small drive current. Two LED arrays are connected in inverse parallel, and therefore an AC power supply can be used as the power supply.

Abstract: A light-emitting device operating on a high drive voltage and a small drive current. LEDs (1) are two-dimensionally formed on an insulating substrate (10) of e.g., sapphire monolithically and connected in series to form an LED array. Two such LED arrays are connected to electrodes (32) in inverse parallel. Air-bridge wiring (28) is formed between the LEDs (1) and between the LEDs (1) and electrodes (32). The LED arrays are arranged zigzag to form a plurality of LEDs (1) to produce a high drive voltage and a small drive current. Two LED arrays are connected in inverse parallel, and therefore an AC power supply can be used as the power supply.

Abstract: Manufacturers encounter limitations in forming low resistance ohmic electrical contact to semiconductor material P-type Gallium Nitride (p-GaN), commonly used in photonic applications, such that the contact is highly transparent to the light emission of the device. Carbon nanotubes (CNTs) can address this problem due to their combined metallic and semiconducting characteristics in conjunction with the fact that a fabric of CNTs has high optical transparency. The physical structure of the contact scheme is broken down into three components, a) the GaN, b) an interface material and c) the metallic conductor. The role of the interface material is to make suitable contact to both the GaN and the metal so that the GaN, in turn, will make good electrical contact to the metallic conductor that interfaces the device to external circuitry. A method of fabricating contact to GaN using CNTs and metal while maintaining protection of the GaN surface is provided.

Abstract: The first base electrodes and the first emitter electrodes are all formed like strips, and are alternately arranged in parallel, and the area of the second emitter electrode is expanded to be larger than that of the second base electrode. With this, the number of current paths increases in each of which a current is pulled up almost straight from the emitter region to the second emitter electrode through the first emitter electrodes, thereby preventing the current densities of the entire chip from becoming uneven.

Abstract: A bipolar power semiconductor component configured as an IGBT includes a semiconductor body, in which a p-doped emitter, an n-doped base, a p-doped base and an n-doped main emitter are arranged successively in a vertical direction. The p-doped emitter has a number of heavily p-doped zones having a locally increased p-type doping.

Abstract: A bipolar transistor with a specific area resistance less than about 500 mOhms·mm2 comprises a first semiconductor region of a first conductivity type defining a collector region (2). A second semiconductor region of a second conductivity type defines a base region (3). A third semiconductor region of the first conductivity type defines an emitter region (4). A metal layer provides contacts (6, 7) to said base (3) and emitter regions (4). The metal layer has thickness greater than about 3 ?m.

Abstract: In a bipolar device, such as transistor or a thyristor, the emitter layer or the anode layer is formed of two high-doped and low-doped layers, a semiconductor region for suppressing recombination comprising an identical semiconductor having an impurity density identical with that of the low-doped layer is present being in contact with a base layer or a gate layer and a surface passivation layer, and the width of the semiconductor region for suppressing recombination is defined equal with or longer than the diffusion length of the carrier. This provides, among other things, an effect of attaining reduction in the size of the bipolar transistor or improvement of the switching frequency of the thyristor without deteriorating the performance.

Abstract: A light-emitting device operating on a high drive voltage and a small drive current. LEDs (1) are two-dimensionally formed on an insulating substrate (10) of e.g., sapphire monolithically and connected in series to form an LED array. Two such LED arrays are connected to electrodes (32) in inverse parallel. Air-bridge wiring (28) is formed between the LEDs (1) and between the LEDs (1) and electrodes (32). The LED arrays are arranged zigzag to form a plurality of LEDs (1) to produce a high drive voltage and a small drive current. Two LED arrays are connected in inverse parallel, and therefore an AC power supply can be used as the power supply.

Abstract: In a method and structure for current balancing the emitter current in a multi-finger n-emitter of a BJT or BSCR, back-end or polysilicon resistors are applied between the emitter fingers and the power rail, with the resistors chosen to be larger the closer the emitter fingers are to the collector.

Abstract: A multiple layer overvoltage protection device is provided. The method begins by providing a substrate having a first impurity concentration of a first conductivity type to define a mid-region layer. A dopant of a second conductivity type is introduced into the substrate with a second impurity concentration less than the first impurity concentration. An upper base region having a second type of conductivity is formed on the upper surface of the mid-region layer. A lower base region layer having a second type of conductivity is formed on a lower surface of the mid-region layer. A first emitter region having a first type of conductivity is formed on a surface of the upper base region layer. A first metal contact is coupled to the upper base region layer and a second metal contact is coupled to the lower base region layer.

Abstract: The first base electrodes and the first emitter electrodes are all formed like strips, and are alternately arranged in parallel, and the area of the second emitter electrode is expanded to be larger than that of the second base electrode. With this, the number of current paths increases in each of which a current is pulled up almost straight from the emitter region to the second emitter electrode through the first emitter electrodes, thereby preventing the current densities of the entire chip from becoming uneven.

Abstract: A light-emitting device operating on a high drive voltage and a small drive current. LEDs (1) are two-dimensionally formed on an insulating substrate (10) of e.g., sapphire monolithically and connected in series to form an LED array. Two such LED arrays are connected to electrodes (32) in inverse parallel. Air-bridge wiring (28) is formed between the LEDs (1) and between the LEDs (1) and electrodes (32). The LED arrays are arranged zigzag to form a plurality of LEDs (1) to produce a high drive voltage and a small drive current. Two LED arrays are connected in inverse parallel, and therefore an AC power supply can be used as the power supply.

Abstract: A light-emitting device operating on a high drive voltage and a small drive current. LEDs (1) are two-dimensionally formed on an insulating substrate (10) of e.g., sapphire monolithically and connected in series to form an LED array. Two such LED arrays are connected to electrodes (32) in inverse parallel. Air-bridge wiring (28) is formed between the LEDs (1) and between the LEDs (1) and electrodes (32). The LED arrays are arranged zigzag to form a plurality of LEDs (1) to produce a high drive voltage and a small drive current. Two LED arrays are connected in inverse parallel, and therefore an AC power supply can be used as the power supply.

Abstract: A light-emitting device operating on a high drive voltage and a small drive current. LEDs (1) are two-dimensionally formed on an insulating substrate (10) of e.g., sapphire monolithically and connected in series to form an LED array. Two such LED arrays are connected to electrodes (32) in inverse parallel. Air-bridge wiring (28) is formed between the LEDs (1) and between the LEDs (1) and electrodes (32). The LED arrays are arranged zigzag to form a plurality of LEDs (1) to produce a high drive voltage and a small drive current. Two LED arrays are connected in inverse parallel, and therefore an AC power supply can be used as the power supply.

Abstract: A semiconductor device, includes: a semiconductor substrate of 100 micrometers or less in thickness; an electrode pattern formed above the semiconductor substrate; and an insulation film of 50 micrometers or greater in thickness residing on parts of the upper surface side of the semiconductor substrate other than at least on the electrode pattern.

Abstract: A high-breakdown-voltage semiconductor device comprises a high-resistance semiconductor layer, trenches formed on the surface thereof in a longitudinal plane shape and in parallel, first regions formed on the semiconductor layer to be sandwiched between adjacent ones of the trenches and having an impurity concentration higher than that of the semiconductor layer, a second region having opposite conductivity to the first regions and continuously disposed in a trench sidewall and bottom portion, a sidewall insulating film disposed on the second region of the trench sidewall, a third region disposed on the second region of the trench bottom portion and having the same conductivity as and the higher impurity concentration than the second region, a fourth region disposed on the back surface of the semiconductor layer, a first electrode formed on each first region, a second electrode connected to the third region, and a third electrode formed on the fourth region.

Abstract: A bipolar transistor comprising a collector region of a first conduction type, and a subcollector region of the first conduction type at a first side of the collector region. The transistor further includes a base region of the second conduction type provided at a second side of the collector region, and an emitter region of the first conduction type which is provided above the base region on the side remote from the collection region. A carbon-doped semiconductor region is provided on the first side alongside the collector region. The bipolar transistor is characterized in that the carbon-doped semiconductor region has a carbon concentration of 1019-1021 cm?3 and the base region has a smaller cross section than the collector region and the collector region has, in the overlap region with the base region, a region having an increased doping compared with the remaining region.

Abstract: A light-emitting device operating on a high drive voltage and a small drive current. LEDs (1) are two-dimensionally formed on an insulating substrate (10) of e.g., sapphire monolithically and connected in series to form an LED array. Two such LED arrays are connected to electrodes (32) in inverse parallel. Air-bridge wiring (28) is formed between the LEDs (1) and between the LEDs (1) and electrodes (32). The LED arrays are arranged zigzag to form a plurality of LEDs (1) to produce a high drive voltage and a small drive current. Two LED arrays are connected in inverse parallel, and therefore an AC power supply can be used as the power supply.

Abstract: A compact, inexpensive static induction thyristor (SIThy) which is less likely to be broken down at a high voltage rise-up rate during operation and which is used in a high-voltage pulse generator capable of generating a high-voltage short pulse is provided. Thicknesses and impurity concentrations of a base region and a buffer region are determined such that a peak voltage obtained by a peak current at which a punch-through state is brought about does not exceed a breakdown voltage of the SIThy. Such design can achieve an SIThy having a self protecting function of autonomously preventing its breakdown without compromising a turn-on performance in which the peak voltage does not drastically exceed the breakdown voltage of the SIThy even when the peak current increases. Further, a compact SIThy capable of generating a short pulse can be achieved by reducing a gate-channel current-carrying area to a minimum.

Abstract: A semiconductor film is formed on a substrate. Subsequently, a resist film is formed on the semiconductor film, and dry etching is performed to the semiconductor film using the resist film as a mask. Due to the dry etching, the edge portion of the semiconductor film protrudes from the resist film. Next, the p-type impurities are introduced into the edge portion of the semiconductor film using the resist film as a mask. The volume density of the p-type impurities in a channel edge portion of the semiconductor film is two to five times the volume density of the p-type impurities in a channel center section. Subsequently, the resist film is removed to form a gate insulating film and a gate electrode.

Abstract: A heterojunction bipolar transistor with InGaP as the emitter layer and capable of both reliable electrical conduction and thermal stability wherein a GaAs layer is inserted between the InGaP emitter layer and AlGaAs ballast resistance layer, to prevent holes reverse-injected from the base layer from diffusing and reaching the AlGaAs ballast resistance layer.

Abstract: The present invention provides a water-soluble luminescent quantum dot, a biomolecular conjugate thereof and a composition comprising such a quantum dot or conjugate. Additionally, the present invention provides a method of obtaining a luminescent quantum dot, a method of making a biomolecular conjugate thereof, and methods of using a biomolecular conjugate for ultrasensitive nonisotopic detection in vitro and in vivo.

Abstract: A semiconductor thyristor device that incorporates buried region breakdown junctions laterally offset from an emitter region. By spacing the buried regions around the emitter region, current carriers emitted from the buried regions are distributed over a large area of the emitter region, thereby providing a high current capability during initial turn on of the device. In order to achieve low breakover voltage devices, the buried regions are characterized with high impurity concentrations, with the breakdown junctions located near the surface of the chip. The low voltage thyristor device minimizes the area of high dopant concentration junctions, thus minimizing the chip capacitance and permitting high speed, low voltage signal operation.

Abstract: A high-breakdown-voltage semiconductor device comprises a high-resistance semiconductor layer, trenches formed on the surface thereof in a longitudinal plane shape and in parallel, first regions formed on the semiconductor layer to be sandwiched between adjacent ones of the trenches and having an impurity concentration higher than that of the semiconductor layer, a second region having opposite conductivity to the first regions and continuously disposed in a trench sidewall and bottom portion, a sidewall insulating film disposed on the second region of the trench sidewall, a third region disposed on the second region of the trench bottom portion and having the same conductivity as and the higher impurity concentration than the second region, a fourth region disposed on the back surface of the semiconductor layer, a first electrode formed on each first region, a second electrode connected to the third region, and a third electrode formed on the fourth region.

Abstract: A high gain phototransistor uses lateral and vertical transistor structures and a triple base. The base regions of two vertical structures are in the bulk of a semiconductor substrate while the base of a single lateral structure is adjacent a light receiving phototransistor surface. Minority carrier generation extends from the base region of the lateral transistor to the base regions of the vertical transistors and is present in the vertical regions within a diffusion length of the optically generated carriers of the lateral base. The bases of all three transistor structures are electrically connected. The collector electrodes of one of the vertical structures and the lateral structure are electrically connected, while the emitter electrodes of the other of the vertical structures and the lateral structures are electrically connected. Finally, the remaining vertical collector and emitter electrodes are electrically connected via a buried layer adjacent the phototransistor wafer substrate.

Abstract: A wafer comprising a semiconductor layer formed on a substrate is diced on the back surface of the substrate to a depth of about ¾ thickness of the substrate. Thus a separation groove 21 is formed in a direction of a dicing line. A groove 22 is formed at the portion of the semiconductor layer corresponding to the groove 21. The groove 22 reaches the substrate. The back surface 11b of the substrate 11 is polished until the substrate become a lamella having only a trace of the groove 22. A metal layer 10 is formed by depositing aluminum (Al) so as to cover the entire back 11b of the substrate 11, and a groove 23 formed at the portion of the metal layer corresponding to the groove 21. An adhesive sheet 24 is adhered on an electrode pad 20. A scribe line is formed by scribing the metal layer 10 along the groove 23. The wafer is loaded by a roller in a breaking process. Accordingly, a wafer having the metal layer on the back surface 11b of the substrate can be obtained.

Abstract: A semiconductor device is disclosed and includes a drain region of a first conductivity type, having a first major surface. Diffused into the drain region is a body region of a second conductivity type. A source region is diffused in the body region and it has a general polygonal shape when viewed at the first major surface with two notches directed towards the center of the source region from opposite sides. The body region is accessible through the notches. An oxide layer covers the source and body regions except for a contact opening position over the source region between the two notches exposing only that portion of the source region that is between the two notches and at least a portion of the accessible body region in each of the two notches to facilitate a source contact.

Abstract: A semiconductor thyristor device that incorporates buried regions centrally located on the chip with respect to the other semiconductor regions. By centering an upper and lower buried region, larger-area contacts can be realized, thereby increasing the current capability of the device. In order to achieve low breakover voltage devices, the buried regions are offset laterally with respect to the respective emitter regions. The low voltage thyristor devices can be incorporated into five-pin protection modules for protecting customer circuits.

Abstract: A method and device produced for design, construction, and use of integrated circuits in wide bandgap semiconductors, including methods for fabrication of n-channel and p-channel junction field effect transistors on a single wafer or die, such that the produced devices may have pinchoff voltages of either positive or negative polarities. A first layer of either p-type or n-type is formed as a base. An alternating, channel layer of either n-type or p-type is then formed, followed by another layer of the same type as the first layer. Etching is used to provide contacts for the gates, source, and drain of the device. In one variation, pinchoff voltage is controlled via dopant level and thickness the channel region. In another variation, pinchoff voltage is controlled by variation of dopant level across the channel layer; and in another variation, pinchoff voltage is controlled by both thickness and variation of dopant level.

Abstract: A microcathode which integrates both an electron emitter, or cathode, and an extractor electrode. The electron emitter is attached to the back side of a thin film microstructure on a first surface of a substrate. Electrons are emitted from the electron emitter and into a via extending through the substrate. An electron beam is formed which is pulled through the via and out of the microcathode by an extractor electrode on a second surface of the substrate. The extractor electrode modulates the electron beam current, defines the beam profile, and accelerates the electrons toward an anode located outside of the microcathode. Microcathode of this invention are particularly suitable as electron emitting devices useful for various types of electron beam utilizing equipment such as flat cathode ray tube displays, microelectronic vacuum tube amplifiers, electron beam exposure devices and the like.

Abstract: A semiconductor device is disclosed and includes a drain region of a first conductivity type, having a first major surface. Diffused into the drain region is a body region of a second conductivity type. A source region is diffused in the body region and it has a general polygonal shape when viewed at the first major surface with two notches directed towards the center of the source region from opposite sides. The body region is accessible through the notches. An oxide layer covers the source and body regions except for a contact opening position over the source region between the two notches exposing only that portion of the source region that is between the two notches and at least a portion of the accessible body region in each of the two notches to facilitate a source contact.

Abstract: The present invention provides a water-soluble luminescent quantum dot, a biomolecular conjugate thereof and a composition comprising such a quantum dot or conjugate. Additionally, the present invention provides a method of obtaining a luminescent quantum dot, a method of making a biomolecular conjugate thereof, and methods of using a biomolecular conjugate for ultrasensitive nonisotopic detection in vitro and in vivo.

Abstract: A power semiconductor device has an integral source/emitter ballast resistor. The gate has partial gate structures spaced apart from each other. Emitter resistors are provided beneath sidewall spacers on the ends of the gate structures. The emitter resistors have little effect on the threshold voltage under normal operating conditions, but rapidly saturate the device during short circuit conditions. This in turn increases the short circuit withstand capability o the device.

Abstract: A transistor array including a plurality of transistors. Each transistor includes an emitter. An emitter region contact overlies each emitter region. At least one base region underlies each emitter region and is common to a plurality of transistors in the array. At least one base contact overlies the at least one base region and is associated with each transistor. A plurality of the base contacts are common to at least two transistors in the array. At least one collector reach through is associated with each transistor. A collector reach through contact overlies each collector reach through. A buried layer subcollector region of electrically conducting material electrically connects the collector reach through region to the collector pedestal region of each transistor.

Abstract: A method of fabricating a self-aligned bipolar junction transistor in a semiconductor structure having a first layer of silicon carbide generally having a first conductivity type and a second layer of silicon carbide generally having a second conductivity type, opposite to the first conductivity type. The method comprises forming a pillar in the second silicon carbide layer, the pillar having a side wall and defining an adjacent horizontal surface on the second layer, forming a dielectric layer having a predetermined thickness on the second semiconductor layer, including the side wall and the horizontal surface. After formation of the dielectric layer, the dielectric layer on a portion of the horizontal surface adjacent the side wall is anisotropically etched while at least a portion of the dielectric layer remains on the side wall, thereby exposing a portion of the horizontal surface.

Abstract: A power transistor comprising a collector region formed in a semiconductor substrate, a base region formed within the collector region, and a hoop-shaped emitter region formed within the base region. The hoop-shaped emitter region divides the base region into an external section and at least one internal section surrounded by the emitter region on the substrate surface, the external and internal base sections being connected within the substrate. A base contact is formed on the surface of each internal base section surrounded by the emitter region. By this design, the electric current is more uniform within the emitter region, and safe operating area (SOA) destruction can be prevented. The invention is also directed to semiconductor integrated circuit devices using the above power transistor, and a method of forming the same.

Abstract: Field emission display and method for fabricating the same, the field emission display including a cathode array having a cathode electrode formed on a substrate, insulating layers and carbon nanotube films for use as emitter electrodes formed alternately on the cathode electrode, and a gate electrode formed on the insulating layer, thereby permitting fabrication of a large sized cathode plate at a low cost because the film is formed by screen printing and exposure, which can reduce the cumbersome steps in fabrication of the related art Spindt emitter tip, and both a low voltage and a high voltage FEDs because the carbon nanotube film used as the emitter has a low work function, with an easy and stable electron emission capability.

Abstract: Power semiconductor devices having discontinuous emitter regions therein include a semiconductor substrate containing therein a collector region of second conductivity type, a buffer region of first conductivity type which forms a first P-N junction with the collector region and a drift region of first conductivity type which forms a non-rectifying junction with the buffer region. A base region of second conductivity type is also provided in the drift region and forms a second P-N junction therewith. In addition, a base contact region of second conductivity type is provided in the base region of second conductivity type. The base contact region typically has a much higher second conductivity type doping concentration therein than the base region. A preferred emitter region is also provided in the substrate. This preferred emitter region comprises an emitter contact region which is entirely surrounded in the substrate by the highly doped base contact region and a carrier emitting region.

Abstract: A four-layer low voltage thyristor device (30) in which the breakover voltage is independent of the holding current. Rather than forming a buried region (38) underlying the emitter region (42), the buried region 38 is formed laterally to the side of the emitter (42). In order to form a low breakover voltage device, the buried region (38) is required to be highly doped, but the resulting junction (40) does not approach the emitter junction (48). A low breakover voltage (5 V-12-V) thyristor can thus be realized.

Abstract: A method for fabricating a field emission device (200) includes the steps of forming on the surface of a substrate (110) a cathode (112), forming on the cathode (112) a dielectric layer (114), forming an emitter well (115) in the dielectric layer (114), forming within the emitter well (115) an electron emitter structure (118) having a surface (123), forming on a portion of the dielectric layer (114) a gate electrode (116), depositing on the dielectric layer (114) a sacrificial layer (210), thereafter depositing on the surface (123) of the electron emitter structure (118) a coating material (220, 320, 420) that has an emission-enhancing material, and then removing the sacrificial layer (210).

Abstract: There is disclosed an insulated gate bipolar transistor which includes a p type semiconductor region (11) formed in a surface of an n.sup.- semiconductor layer (3) by double diffusion in corresponding relation to a p type base region (4) of an IGBT cell adjacent thereto, and an emitter electrode (9) formed on and connected to the p type semiconductor region (11) through a contact hole (CH.sub.P) having a width (W.sub.ch2) which is greater than a width (W.sub.ch1) of a contact hole (CH.sub.1), thereby preventing device breakdown due to latch-up by the operation of a parasitic thyristor during an ON state and during an ON-state to OFF-state transition even if main and control electrodes in an active region are reduced in size.