Abstract: A semiconductor package includes a semiconductor die, a thermal conductive through via and a conductive paste. The thermal conductive through via is electrically insulated from the semiconductor die. The conductive paste is disposed over the semiconductor die, wherein the thermal conductive through via is thermally coupled to the semiconductor die through the conductive paste.

Abstract: An insulated gate type thyristor includes: a first current terminal semiconductor region of a first conductivity type having a high impurity concentration; a first base semiconductor region of a second conductivity type opposite to the first conductivity type having a low impurity concentration and formed on the first current terminal semiconductor region; a second base semiconductor region of the first conductivity type having a low impurity concentration and formed on the first base semiconductor region; a second current terminal semiconductor region of the second conductivity type having a high impurity concentration and formed on the second base semiconductor region; a trench passing through the second current terminal semiconductor region and entering the second base semiconductor region leaving some depth thereof, along a direction from a surface of the second current terminal semiconductor region toward the first base semiconductor region; and an insulated gate electrode structure formed in the trench.

Abstract: An IGBT having a trench gate structure is disclosed which generates decreased noise at switching and displays superiority in saturation voltage to turn-off loss characteristics (trade-off characteristics). In a part of a region on an emitter side surface interposed between trench gates, a sub well region is provided, which is connected to an emitter electrode through diodes. When the IGBT is in a turned-on state, the diodes are brought into a non-conduction state to isolate the sub well region from the emitter electrode, by which carriers are accumulated. When the IGBT is in a turned-off state, the diodes are brought into a conduction state to electrically connect the sub well region to the emitter electrode, by which carriers are discharged at a high speed. In an early stage of turning-on of the IGBT, capacitance of a portion of the gate facing the sub well region is converted to gate-emitter capacitance to thereby reduce gate-collector capacitance, by which electromagnetic noise at switching is reduced.

Abstract: Switching operations, such as those used in memory devices, are enhanced using a thyristor-based semiconductor device adapted to switch between a blocking state and a conducting state. According to an example embodiment of the present invention, a thyristor-based semiconductor device includes a thyristor having first and second base regions coupled between first and second emitter regions, respectively. A first control port capacitively couples a first signal to the first base region, and a second control port capacitively couples a second signal to the second base region. Each of the first and second signals have a charge that is opposite in polarity, and the opposite polarity signals effect the switching of the thyristor at a lower power, relative to the power that would be required to switch the thyristor having only one control port.

Abstract: A semiconductor component is arranged in a semiconductor body and has at least one integrated radially symmetrical lateral resistance having a location-dependent sheet resistance, the radial dependence of which is preferably configured such that the differential resistance dR is radially constant or the power dissipated in the resistance is radially constant.

Abstract: A semiconductor device provided with a planar bipolar transistor and a built-in ingredient acting as an element to protect the bipolar transistor from an external surge voltage e.g. an electrostatic surge voltage and the like, is provided with a planar bipolar transistor further provided with a doped region having a conductivity opposite to that of a semiconductor substrate in which the foregoing planar bipolar transistor is produced, the doped region being produced along the top surface of the semiconductor substrate at a location close to the bipolar transistor, and the emitter of the bipolar transistor being connected the doped region and a fixed potential (V.sub.EE) or the ground potential, whereby the operation speed of a circuit including the transistor is not reduced by potential parasitic capacitors which otherwise accompany the built-in ingredients produced to protect the transistor from an external surge voltage e.g. an electrostatic surge voltage and the like.

Abstract: The invention provides a silicon controlled rectifier having an anode and a cathode and including an NPN transistor and a PNP transistor. The NPN transistor has an emitter coupled to the cathode, a base and a collector. The PNP transistor has a base coupled to the NPN collector, an emitter coupled to the anode, a first collector coupled to the NPN base and a second collector coupled to the NPN collector.

Abstract: The invention provides a Bipolar structure such as a silicon controlled rectifier (SCR) that exhibits advantageously low triggering and holding voltages for use in high speed (e.g., 900 MHz->2 GHz) submicron ESD protection circuits for Bipolar/BiCMOS circuits. The Bipolar structure features a low shunt capacitance and a low series resistance on the input and output pins, allowing for the construction of ESD protection circuits having small silicon area and little to no impedance added in the signal path. In a preferred aspect of the invention, the SCR is assembled in the N-well of the Bipolar/BiCMOS device, as opposed to the P-substrate, as is customary in the prior art. A preferred aspect of the invention utilizes a Zener diode in combination with a resistor to control BSCR operation through the NPN transistor.