Abstract: Certain aspects of the present disclosure provide semiconductor variable capacitors. One example semiconductor variable capacitor generally includes a semiconductor region, an insulative layer, and a first non-insulative region, the insulative layer being disposed between the semiconductor region and the first non-insulative region. In certain aspects, the semiconductor variable capacitor may also include a second non-insulative region disposed adjacent to the semiconductor region, and a third non-insulative region disposed adjacent to the semiconductor region, the second non-insulative region and the third non-insulative region having different doping types. In certain aspects, the semiconductor variable capacitor may also include an implant region disposed between the semiconductor region and the insulative layer. The implant region may be used to adjust the flat-band voltage of the semiconductor variable capacitor.

Abstract: Disclosed is a semiconductor device having a radio frequency switch. Also disclosed are an antenna switch module and a method of manufacturing the semiconductor device. The semiconductor device includes a metal wiring insulating film bonded to a silicon substrate. In the semiconductor device, a crystal defect layer extends into the silicon substrate from a surface of the silicon substrate. Crystal defects are throughout the crystal defect layer. The semiconductor device and an integrated circuit are in the antenna switch module. The integrated circuit in the antenna switch module is mounted with the radio-frequency switch device and the silicon substrate. The method of manufacturing the semiconductor device includes a step of forming crystal defects throughout a silicon substrate. Radiation or a diffusion is used to form the crystal defects. After the step of forming the crystal defects, the method includes a step of implanting ions into a surface of the silicon substrate to form a crystal defect layer.

Abstract: Certain aspects of the present disclosure generally relate to a semiconductor variable capacitor offering at least two types of capacitance tuning, as well as techniques for fabricating the same. For example, a CMOS-compatible silicon on insulator (SOI) process with a buried oxide (BOX) layer may provide a transcap with a front gate (above the BOX layer) and a back gate (beneath the BOX layer). The front gate may offer lower voltage, coarse capacitance tuning, whereas the back gate may offer higher voltage, fine capacitance tuning. By offering both types of capacitance tuning, such transcaps may provide greater capacitance resolution. Several variations of transcaps with front gate and back gate tuning are illustrated and described herein.

Abstract: A method for fabricating a bonding pad structure includes forming a dielectric layer on a substrate; forming a first metal pattern layer in the dielectric layer. The first metal pattern layer includes a first body portion having a plurality of first openings in a central region of the first body portion and a plurality of second openings arranged along a peripheral region of the first body portion and surrounding the plurality of first openings; and a plurality of first island portions correspondingly disposed in the plurality of second openings and spaced apart from the first body portion. The method further includes forming a plurality of first interconnect structures in the dielectric layer and corresponding to the plurality of first island portions; and forming a bonding pad on the dielectric layer and directly above the first metal pattern layer.

Abstract: Disclosed is a semiconductor device having a radio frequency switch. Also disclosed are an antenna switch module and a method of manufacturing the semiconductor device. The semiconductor device includes a metal wiring insulating film bonded to a silicon substrate. In the semiconductor device, a crystal defect layer extends into the silicon substrate from a surface of the silicon substrate. Crystal defects are throughout the crystal defect layer. The semiconductor device and an integrated circuit are in the antenna switch module. The integrated circuit in the antenna switch module is mounted with the radio-frequency switch device and the silicon substrate. The method of manufacturing the semiconductor device includes a step of forming crystal defects throughout a silicon substrate. Radiation or a diffusion is used to form the crystal defects. After the step of forming the crystal defects, the method includes a step of implanting ions into a surface of the silicon substrate to form a crystal defect layer.

Abstract: A symmetric varactor structure may include a first varactor component. The first varactor component may include a gate operating as a second plate, a gate oxide layer operating as a dielectric layer and a body operating as a first plate of an area modulating capacitor. In addition, doped regions may surround the body of the first varactor component. The first varactor component may be supported on a backside by an isolation layer. The symmetric varactor structure may also include a second varactor component electrically coupled to the backside of the first varactor component through a backside conductive layer.

Abstract: Disclosed is a semiconductor device having a radio frequency switch. Also disclosed are an antenna switch module and a method of manufacturing the semiconductor device. The semiconductor device includes a metal wiring insulating film bonded to a silicon substrate. In the semiconductor device, a crystal defect layer extends into the silicon substrate from a surface of the silicon substrate. Crystal defects are throughout the crystal defect layer. The semiconductor device and an integrated circuit are in the antenna switch module. The integrated circuit in the antenna switch module is mounted with the radio-frequency switch device and the silicon substrate. The method of manufacturing the semiconductor device includes a step of forming crystal defects throughout a silicon substrate. Radiation or a diffusion is used to form the crystal defects. After the step of forming the crystal defects, the method includes a step of implanting ions into a surface of the silicon substrate to form a crystal defect layer.

Abstract: A Micro-Electro-Mechanical Systems (MEMS) device includes a first substrate with a first surface and a second surface, the first substrate including a base layer, a moveable beam disposed on the base layer, at least one metal layer, and one or more standoffs disposed on the base layer such that one or more metal layers are situated on the top surface of the one or more standoffs. The MEMS device further includes a second substrate including one or more metal layers bonded to the one or more standoffs resulting in an electrical connection between at least a portion of the one or more metal layers of the second substrate and one or more of the at least one electrode on the bottom surface and the at least one electrode on the top surface.

Abstract: A novel semiconductor variable capacitor is presented. The semiconductor structure is simple and is based on a semiconductor variable capacitor with MOS compatible structure suitable for integrated circuits, which has at least three terminals, one of which is used to modulate the capacitance value between the other two terminals of the device, by increasing or decreasing its DC voltage with respect to one of the main terminals of the device. Furthermore, the present invention decouples the AC signal and the DC control voltage preventing distortion of the RF signal. The present invention describes a controllable capacitor whose capacitance value is not necessarily linear with its control voltage, but although possibly abrupt in its characteristic, is utilized to manufacture a semiconductor variable capacitor with digital control to improve its noise and linearity performance while maintaining high quality factor.

Abstract: A novel semiconductor variable capacitor is presented. The semiconductor structure is simple and is based on a semiconductor variable capacitor with MOS compatible structure suitable for integrated circuits, which has at least three terminals, one of which is used to modulate the capacitance value between the other two terminals of the device, by increasing or decreasing its DC voltage with respect to one of the main terminals of the device. Furthermore, the present invention decouples the AC signal and the DC control voltage preventing distortion of the RF signal. The present invention describes a controllable capacitor whose capacitance value is not necessarily linear with its control voltage, but although possibly abrupt in its characteristic, is utilized to manufacture a semiconductor variable capacitor with digital control to improve its noise and linearity performance while maintaining high quality factor.

Abstract: A novel semiconductor variable capacitor is presented. The semiconductor structure is simple and is based on a semiconductor variable MOS capacitor structure suitable for integrated circuits, which has at least three terminals, one of which is used to modulate the equivalent capacitor area of the MOS structure by increasing or decreasing its DC voltage with respect to another terminal of the device, in order to change the capacitance over a wide ranges of values. Furthermore, the present invention decouples the AC signal and the DC control voltage avoiding distortion and increasing the performance of the device, such as its control characteristic. The present invention is simple and only slightly dependent on the variations due to the fabrication process. It exhibits a high value of capacitance density and, if opportunely implemented, shows a quasi linear dependence of the capacitance value with respect to the voltage of its control terminal.

Abstract: A germanium semiconductor radiation detector contact made of yttrium metal. A thin (˜1000 ?) deposited layer of yttrium metal forms a thin hole-barrier and/or electron-barrier contact on both p- and n-type germanium semiconductor radiation detectors. Yttrium contacts provide a sufficiently high hole barrier to prevent measurable contact leakage current below ˜120 K. The yttrium contacts can be conveniently segmented into multiple electrically independent electrodes having inter-electrode resistances greater than 10 G?. Germanium semiconductor radiation detector diodes fabricated with yttrium contacts provide good gamma-ray spectroscopy data.

Abstract: Structures and methods are provided for nanosecond electrical pulse anneal processes. The method of forming an electrostatic discharge (ESD) N+/P+ structure includes forming an N+ diffusion on a substrate and a P+ diffusion on the substrate. The P+ diffusion is in electrical contact with the N+ diffusion. The method further includes forming a device between the N+ diffusion and the P+ diffusion. A method of annealing a structure or material includes applying an electrical pulse across an electrostatic discharge (ESD) N+/P+ structure for a plurality of nanoseconds.

Abstract: A metal-oxide-metal capacitor comprises a first electrode, a second electrode, a plurality of first fingers and a plurality of second fingers. Each first finger and its corresponding second finger are in parallel and separated by a low k dielectric material. A guard ring is employed to enclose the metal-oxide-metal capacitor so as to prevent moisture from penetrating into the low k dielectric material.

Abstract: A semiconductor ceramic contains a donor element solid-solved in crystal grains of a SrTiO3-based compound, and an acceptor element in a grain boundary layer. The number of tetravalent acceptor elements is 1×1017/g or more, as determined from an electron spin resonance absorption spectrum. A mixture of a calcined powder and an acceptor compound is pulverized to a specific surface area of 5.0 to 7.5 m2/g before mixing with a binder. Semiconductor ceramic layers having a varistor function are formed by using the semiconductor ceramic forming a highly reliable capacitor which can suppress characteristics variations to stably obtain good electrical characteristics.

Abstract: A plate varactor includes a dielectric substrate and a first electrode embedded in a surface of the substrate. A capacitor dielectric layer is disposed over the first electrode, and a layer of graphene is formed over the dielectric layer to contribute a quantum capacitance component to the dielectric layer. An upper electrode is formed on the layer of graphene. Other embodiments and methods for fabrication are also included.

Abstract: This disclosure provides systems, methods and apparatus for electromechanical systems variable capacitance devices. In one aspect, an electromechanical systems variable capacitance device includes a substrate with a first metal layer including a first bias electrode overlying the substrate. A member suspended above the first metal layer includes a dielectric beam and a second metal layer including a first radio frequency electrode and a ground electrode. The member and the first metal layer define a first air gap. A third metal layer over the member includes a second bias electrode, and the third metal layer and the member define a second air gap. The member includes a plane of symmetry substantially parallel a plane containing the first bias electrode.

Abstract: A three-dimensional integrated circuit includes a semiconductor substrate where the substrate has an opening extending through a first surface and a second surface of the substrate and where the first surface and the second surface are opposite surfaces of the substrate. A conductive material substantially fills the opening of the substrate to form a conductive through-substrate-via (TSV). An active circuit is disposed on the first surface of the substrate, an inductor is disposed on the second surface of the substrate and the TSV is electrically coupled to the active circuit and the inductor. The three-dimensional integrated circuit may include a varactor formed from a dielectric layer formed in the opening of the substrate such that the conductive material is disposed adjacent the dielectric layer and an impurity implanted region disposed surrounding the TSV such that the dielectric layer is formed between the impurity implanted region and the TSV.

Abstract: A semiconductor device includes a semiconductor substrate that is made of either of silicon carbide (SiC) and gallium nitride (GaN), and has a defect region containing a crystal defect; a first insulating film that coats the defect region and is arranged on the semiconductor substrate; and a conductor film that electrically connects to a principal surface of the semiconductor substrate, the principal surface being exposed to a region that is not coated with the first insulating film.

Abstract: A high-Q differential varactor includes reduced inner spacing dimensions between differential fingers.

Abstract: A three-dimensional integrated circuit includes a semiconductor substrate where the substrate has an opening extending through a first surface and a second surface of the substrate and where the first surface and the second surface are opposite surfaces of the substrate. A conductive material substantially fills the opening of the substrate to form a conductive through-substrate-via (TSV). An active circuit is disposed on the first surface of the substrate, an inductor is disposed on the second surface of the substrate and the TSV is electrically coupled to the active circuit and the inductor. The three-dimensional integrated circuit may include a varactor formed from a dielectric layer formed in the opening of the substrate such that the conductive material is disposed adjacent the dielectric layer and an impurity implanted region disposed surrounding the TSV such that the dielectric layer is formed between the impurity implanted region and the TSV.

Abstract: A semiconductor device includes a diode, a passivation layer and a conductive layer. The diode includes an epitaxial layer on a semiconductor substrate, and first and second diode contacts on different planes. The passivation layer has a planar top surface, and includes multiple consecutive layers of a benzocyclobutene (BCB) material formed on the diode, an aggregate thickness of the passivation layer exceeding a thickness of the epitaxial layer. The conductive layer is formed on the top surface of passivation layer, the conductive layer connecting with the first and the second diodes contact through first and second openings in the passivation layer, respectively. The passivation layer enhances a capacitive isolation between the conductive layer and the diode.

Abstract: Featured is a controller for a motor that is ultra-compact, with a power density of at least about 20 watts per cubic cm (W/cm3). The controller utilizes a common ground for power circuitry, which energizes the windings of the motor, and the signal circuitry, which controls this energization responsive to signals from one or more sensors. Also, the ground is held at a stable potential without galvanic isolation. The circuits, their components and connectors are sized and located to minimize their inductance and heat is dissipated by conduction to the controller's exterior such as by a thermally conductive and electrically insulating material (e.g., potable epoxy). The controller uses a single current sensor for plural windings and preferably a single heat sensor within the controller. The body of the controller can also function as the sole plug connector.

Abstract: A pad (20) is electrically connected to a first I/O cell (14) while also physically overlying active circuitry of a second I/O cell (16). Note that although the pad (20) overlies the second I/O cell (16), the pad (20) is not electrically connected to the I/O cell (16). Such a pattern may be replicated in any desired manner so that the I/O cells (e.g. 300-310) may have a finer pitch than the corresponding pads (320-324 and 330-335). In addition, the size of the pads may be increased (e.g. pad 131 may be bigger than pad 130) while the width “c” of the I/O cells (132-135) does not have to be increased. Such a pattern (e.g. 500) may be arranged so that the area required in one or more dimensions may be minimized.

Abstract: On-chip capacitors with a variable capacitance, as well as design structures for a radio frequency integrated circuit, and method of fabricating and method of tuning on-chip capacitors. The on-chip capacitor includes first and second ports powered with opposite polarities, first and second electrodes, and first and second voltage-controlled units. Each of the first and second voltage-controlled units is switched between a first state in which the first and second electrodes are electrically isolated from the first and second ports and a second state. When the first voltage-controlled unit is switched to the second state, the first electrode is electrically connected with the first port. When the second voltage-controlled unit is switched to the second state the second electrode is electrically connected with the second port. The on-chip capacitor has a larger capacitance value when the first and second voltage-controlled units are in the second state.

Abstract: A semiconductor capacitor device. A dielectric layer is on a substrate. A stack capacitor structure is disposed in the dielectric layer and comprises first and overlying second MIM capacitors electrically connected in parallel. The first and second MIM capacitors have individual upper and lower electrode plates and different compositions of capacitor dielectric layers.

Abstract: Methods and heterostructure barrier varactor (HBV) diodes optimized for application with frequency multipliers at providing outputs at submillimeter wave frequencies and above. The HBV diodes include a silicon-containing substrate, an electrode over the silicon-containing substrate, and one or more heterojunction quantum wells of alternating layers of Si and SiGe of one or more electrodes of the diode. Each SiGe quantum well preferably has a floating SiGe layer between adjacent SiGe gradients followed by adjacent Si layers, such that, a single homogeneous structure is provided characterized by having no distinct separations. The plurality of Si/SiGe heterojunction quantum wells may be symmetric or asymmetric.

Abstract: A MEMS device and method comprising a MEMS structure adjacent to a SOI base; a sacrificial support operatively connecting the base to the MEMS structure; a suspension member operatively connecting the base to the MEMS structure, wherein the suspension member is longer than the sacrificial support; and an electrode operatively connected to the base. The device may further comprise a current pulse generator adapted to send a current pulse through the sacrificial support, wherein the current pulse causes the sacrificial support to detach from the MEMS structure. Moreover, the sacrificial support structures may be electrically resistive.

Abstract: In an embodiment of the present invention is provided a varactor comprising a substrate, a plurality of bottom electrodes positioned on a surface of the substrate separated to form a gap therein, a tunable dielectric material positioned on the surface of the substrate and within the gap, the tunable dielectric at least partially overlaying the plurality of electrodes, and a top electrode in contact with the tunable dielectric.

Abstract: A micro-electro-mechanical system varactor. The varactor includes a substrate, a lower bias conductor partially overlaying the substrate, a first signal conductor partially overlaying the substrate, a dielectric layer at least partially overlaying the first signal conductor, a support structure coupled to the substrate, and a flexible structure coupled to the support structure. The flexible structure is suspended over the substrate, includes an upper bias conductor overlaying at least part of the lower bias conductor and a top conductor overlaying at least part of the first signal conductor, configured to deflect in response to a bias voltage applied between the upper bias conductor and the lower bias conductor, and configured for separation between the top conductor and the dielectric layer by a varying separation distance dependent upon the bias voltage.

Abstract: Active devices in a thin film diode (TFD) liquid crystal display (LCD) panel used to control liquid crystal are formed by a metal layer, a transparent conductive layer, and an insulating layer sequentially on a substrate, wherein the metal layer is used as transmitting signal and the transparent conductive layer is used as bottom metal layer of metal-insulator-metal (MIM) thin film diode. The metal layer, the transparent conductive layer, and the insulating layer are defined with desired patterns. Further, a dielectric layer is formed over the substrate, metal layer, the transparent conductive layer, and the insulating layer, and defined to form the locations of electrode terminal and MIM thin film diode by using lithographic process. Next, another transparent conductive layer is formed on the dielectric layer and defined to form a pixel electrode and top metal layer of the MIM thin film diode by using lithographic process.

Abstract: A direct attach optical receiver module and a system and method for testing the direct attach optical receiver module are provided. An optical receiver module may include an optical detector and an integrated circuit with an integrated amplifier circuit and at least one integrated capacitor. In one example, the optical detector may be physically attached to the integrated circuit and the output port of the optical detector may be electrically coupled to the input port of the integrated circuit. In another example, a redistribution layer that includes a tuning inductor may be being physically attached between the optical detector and the integrated circuit.

Abstract: Generally provided is a circuit assembly construction for controlling impedance in an electronic package. A large scale, parallel-plate capacitor includes two electrodes separated by a dielectric material. The electrodes serve as reference voltage planes for the electronic package. At least one of the electrodes is patterned such that both electrodes are accessible from a common side of the capacitor. The capacitor is positioned with a first electrode mounted adjacent to an interconnect circuit portion of the electronic package. An electronic device portion of the electronic package is electrically connected, directly or indirectly, to one or more of the electrodes of the capacitor.

Abstract: A high precision microelectromechanical capacitor with programmable voltage source includes a monolithic MEMS device having a capacitance actuator, a trim capacitor, and a high precision, programmable voltage source. The trim capacitor has a variable capacitance value, preferably for making fine adjustments in capacitance. The capacitance actuator is preferably mechanically coupled to and electrically isolated from the trim capacitor and is used to control the capacitance value of the trim capacitor. The capacitance adjustment of the trim capacitor is non-destructive and may be repeated indefinitely. The trim capacitor may be adjusted by mechanically changing the distance between its electrodes. The programmable voltage source provides a highly accurate and stable output voltage potential corresponding to control signals for controlling the capacitance actuator.

Abstract: The present invention provides an varactor, a method of manufacture thereof. In an exemplary embodiment, the varactor includes a semiconductor substrate and well of a first and second conductivity type, respectively. A conductive region in the well has a same conductivity type as the well but a lower resistivity than the well. At least a portion of the well is between at least two sides of the conductive region and an area delineated by an outer perimeter of a conductive layer over the well. Such varactors have a lower series resistance and therefore have an increased quality factor.

Abstract: Disclosed herein is an optical modulator module package structure. In the optical modulator module package structure, an optical modulator device and a drive integrated circuit device are flip-chip bonded to a substrate, and an opening of the substrate is blocked using a piece of glass.

Abstract: A capacitive dynamic quantity sensor whose size is small and whose reliability and mass productivity are high is provided. In order to realize signal transmission from a lower electrode to an upper electrode, silicon columns which are electrically isolated from one another but not mechanically isolated from one another are formed to connect both electrodes.

Abstract: A lower interconnection is provided on a semiconductor substrate. A MIM capacitive element is provided on a first interlayer insulation film in which the lower interconnection is buried, and includes a lower electrode, an upper electrode, and a dielectric film sandwiched therebetween. An upper interconnection is provided on a second interlayer insulation film in which the MIM capacitive element is buried. A contact electrically connects the lower electrode and the upper interconnection. The lower electrode is mainly formed of Al, so that they are lower in electrical resistance than barrier metal, and also low in stress value. Therefore, it becomes possible to widen the area of the lower electrode for electrically connecting the contact while restraining their influences on charge accumulation and close contact between the lower electrode and the insulation film. In addition, since the electrical resistance is lowered, the thickness of the lower electrode can be increased.

Abstract: A radio frequency (RF) micro electro-mechanical system (MEMS) device and method of making same are provided, the device including an RF circuit substrate and an RF conducting path disposed on the RF circuit substrate, a piezoelectric thin film actuator, and a conducting path electrode. The piezoelectric thin film actuator has a proximal end that is fixed relative to the RF circuit substrate and a cantilever end that is spaced from the RF circuit substrate. The conducting path electrode is disposed on the cantilever end of the piezoelectric thin film actuator. The cantilever end of the piezoelectric thin film actuator is movable between a first position whereat the conducting path electrode is spaced from the RF path electrode and a second position whereat the conducting path electrode is spaced from the RF path electrode a second distance, wherein the second distance is less than the first distance. The RF MEMS device is particularly useful as a tunable capacitor.

Abstract: A conductive material is provided in an opening formed in an insulative material. The process involves first forming a conductive material over at least a portion of the opening and over at least a portion of the insulative material which is outside of the opening. Next, a metal-containing fill material is formed over at least a portion of the conductive material which is inside the opening and which is also over the insulative material outside of the opening. The metal-containing material at least partially fills the opening. At least a portion of both the metal-containing fill material and the conductive material outside of the opening is then removed. Thereafter, at least a portion of the metal-containing fill material which is inside the opening is then removed.

Abstract: Electrically tunable electromagnetic bandgap (“TEBG”) structures using a ferroelectric thin film on a semiconductor substrate, tunable devices that include such a TEBG structure, such as a monolithic microwave integrated circuit (“MMIC”), and a method producing such a TEBG structure are disclosed. The present invention provides a semiconductive substrate having an oxide layer, a first conductive layer positioned on the oxide layer, a ferroelectric layer covering the first conductive layer, and a second conductive layer positioned on a surface of the tunable ferroelectric layer. The use of the ferroelectric layer, which have a DC electric field dependent permittivity, enables a small size, tunable EBG structure.

Abstract: The invention relates to a variable capacitor and method of making it. The variable capacitor comprises a fixed charge plate disposed in a substrate, a movable charge plate disposed above the fixed charge plate, and a stiffener affixed to the movable charge plate. The movable charge plate may be patterned to form a movable actuator plate where the fixed charge plate is elevated above a fixed actuator plate.

Abstract: An electronic device supported on a semiconductor substrate. The semiconductor device includes a diffusion area in the substrate and a polysilicon layer extending over the substrate and contacting the diffusion area. The electronic device further includes a conductive contact covering and contacting both the polysilicon layer and the diffusion area. Therefore, the semiconductor device disclosed in this invention includes poly-to-diffusion connection for a semiconductor device that has a diffusion are and a polysilicon area. The semiconductor device further includes a contact that covers both the diffusion area and the polysilicon area with a contact filling material forming the connection between these two areas.

Abstract: A variable capacitor comprising a substrate having a first type ion-doped buried layer, a first type ion-doped well, a second type ion-doped region and a conductive layer thereon. The first type ion-doped well is formed within the substrate. The first type ion-doped well has a cavity. The first type ion-doped buried layer is in the substrate underneath the first type ion-doped well. The first type ion-doped buried layer and the first type ion-doped well are connected. The second type ion-doped region is at the bottom of the cavity of the first type ion-doped well. The conductive layer is above and in connection with the first type ion-doped buried layer.

Abstract: A packaged semiconductor chip comprising a first semiconductor chip 120 having an upwardly-facing front face 145, a downwardly-facing rear face 155, edges 160 bounding the faces and contacts 150 exposed at the front surface 145, the first semiconductor chip 120 including active components. The packaged semiconductor chip 100 further includes a connecting element 105 which may include passive components, the connecting element 105 may be electrically connected to at least some of the contacts 150, the connecting element 105 overlying the front face 145 of the first chip 120 and projecting outwardly beyond the edges 160 of the first chip 120.

Abstract: Micro-electro-mechanical system (MEMS) variable capacitor apparatuses, system and related methods are provided.

Abstract: A semiconductor device includes a plurality of barrier layers and a plurality of quantum well layers which are alternately interleaved with each other and disposed on a substrate of semiconductor material so as to form a multiple-heterojunction varactor diode. The barrier layers and quantum well layers are doped with impurities. The varactor diode includes an ohmic contact which is electrically connected to a heavily doped embedded region and a Schottky contact which is electrically connected to a depletion region of the diode. The ohmic contact and the Schottky contact enable an external voltage source to be applied to the contacts so as to provide a bias voltage to the varactor diode. A variable capacitance is produced as a result of the depletion region varying with a variation in the bias voltage. The varactor diode also provides a constant series resistance.

Abstract: A memory device with composite contact plug and method for manufacturing the same. The composite contact plug comprises a first insulating layer deposited on a semiconductor substrate. A contact hole is formed to penetrate through the first insulation layer. A barrier layer is deposited in the contact hole and fills a portion of the contact hole. A contact plug is formed on the barrier layer and fills the contact hole. The first insulating layer is etched back until the surface of the first insulating layer is below the contact plug. A diffusion barrier layer is then deposited on the first insulating layer and the contact plug. The diffusion barrier layer is planarized until the contact plug is exposed to form a composite contact plug. The memory device is constructed on the composite contact plug.

Abstract: A low-capacitance bonding pad for a semiconductor device. A diffusion region is formed in a substrate, and a bonding pad is formed on the substrate and aligned with the diffusion region. The bonding pad is made from a stacked metal layer and a metal layer. The stacked metal layer is made from a plurality of metal layers and a plurality of dielectric layers, and the metal layers and the dielectric layers are stacked alternately. The metal layers stacked in the stacked metal layer are formed with small areas. Each of the metal layers stacked in the stacked metal layer is coupled with the adjacent metal layer by via plugs.

Abstract: A variable capacitor includes an N+ layer including a variable capacitance region, a P+ layer epitaxially grown on the N+ layer and formed from a SiGe film and a Si film, and a P-type electrode. An NPN-HBT (Hetero-junction Bipolar Transistor) includes a collector diffusion layer formed simultaneously with the N+ layer of the variable capacitor, a collector layer, and a Si/SiGe layer epitaxially grown simultaneously with the P+ layer of the variable capacitor. Since a depletion layer formed in a PN junction of the variable capacitor can extend entirely across the N+ layer, reduction in variation range of the capacitance can be suppressed.