Abstract: A center bond flip-chip device carrier and a method for making and using it are described. The carrier includes a flexible substrate supporting a layer of conductive material and a layer of elastomeric material. At least one pocket is formed in the layer of elastomeric material and sized and shaped to house a solder ball. The solder ball is electrically connected to a die positioned on the layer of elastomeric material and also electrically connected to the layer of conductive material.

Abstract: A method for forming packaged substrates, including flip-chip dice individually or in a multi-die wafer. The method includes using a stereolithographic process to form a protective dielectric polymeric sealing structure on at least the active surface of the substrate. In addition, the invention encompasses forming a similar layer on a second substrate to be joined to the first substrate. Contact pads of the second substrate are exposed through the layer thereon to facilitate joining of the two substrates. Semiconductor devices formed by the method are also disclosed.

Abstract: This is a semiconductor power module provided with: a ceramic substrate; a metallic plate bonded to a surface of this substrate; a cylindrical metallic flange which is hermetically bonded to a surface of substrate or the metallic plate; a ceramic housing for hermetically sealing an opening of the metallic flange; and at least one or more semiconductor chips soldered to the metallic plate. The metallic flange is made of metal with a low thermal expansion coefficient. A hermetically sealed container is created by welding the metallic flange, the ceramic substrate and the housing with silver brazing. Moreover, external collector, emitter and gate electrodes are bonded on the housing by using the silver brazing. The collector, emitter and gate conductive pillars are respectively connected to the external collector, emitter and gate electrodes with calking. Thus, this hermetically sealed container is strong in mechanical strength and high in explosion-proof durability and excellent in moisture resistance.

Abstract: The method which applies to plastic encapsulated integrated circuit packages comprises the steps of increasing the thickness of the epoxy adhesive that is used to couple an integrated circuit die to a mounting structure and reducing the thickness of the integrated circuit die. Each step may be taken independently or concurrently.

Abstract: A semiconductor device package includes multiple built-up layers of metal sandwiching non-conductive layers. The metal layers have grids of degassing holes arranged in rows and columns. The rows and columns are locatable via a first coordinate system. Signal traces are embedded within the non-conductive layers such that the signal traces are also sandwiched between the metal layers with degassing holes. The signal traces generally run at zero degrees, 45 degrees, and 90 degrees relative to a second coordinate system. The first coordinate system is rotated relative to the second coordinate system to lower impedance variations of different traces. Impedance variations decrease due to the decreased variation in the number of degassing holes passed over or under by a trace. The grid of degassing holes on one metal layer can be offset in two dimensions relative to the degassing holes on another layer.

Abstract: A semiconductor package substrate includes at least one insulative layer, at least two metal lines next to one another on a first side of the insulative layer, and a first metal layer on a second side of the insulative layer opposing the first side. An opening is formed in the first metal layer in an area between the metal lines. Two lands remain part of the first metal layer. The lands are located adjacent the opening and each land opposes a respective one of the metal lines located next to one another.

Abstract: A protective containment apparatus for preventing damage to expensive components of an assembly due to the failure of an electronic component in a nearby potted circuit which is known to fail catastrophically. The containment apparatus can employ a resilient material 38 placed around the at-risk electronic component 34 prior to potting the circuit. The resilient material 38 absorbs the expanding gases and fragmented parts of the at-risk component 34 which are expelled during the catastrophic failure. The cushioning effect of the resilient material 38 prevents the fragments and parts of the potting material from becoming projectiles that can damage any nearby components of the assembly. The containment apparatus can also employ a restrictive material 42 placed around the at-risk component 34 prior to potting the circuit.

Abstract: A low-cost integrated circuit package is provided for packaging integrated circuits. In preferred embodiments, the package comprises a flexible circuit that is laminated to a stiffener using a dielectric adhesive, with the conductive traces on the flexible circuit facing toward the stiffener but separated therefrom by the adhesive. The conductive traces include an array of flip-chip attachment pads. A window is formed in the stiffener over the attachment pad array, such as by etching. The adhesive is then removed over the attachment pads by laser ablation, but left in place between the pads, thus forming a flip-chip attachment site. In preferred embodiments, this invention eliminates the need for high-resolution patterned adhesive, and it also eliminates the need for application of a solder mask at the flip-chip attachment site, because the remaining adhesive performs the solder mask function of preventing bridging between attachment pads.

Abstract: A power semiconductor module is specified in which a layer of foam is arranged under the housing cover in the housing. The foam not only enables mechanical support of the potting compound, so that the latter is prevented from becoming detached, but can also absorb a large pressure increase in the event of a short circuit by virtue of compression. In this way, a compensating volume is created without the housing being destroyed. The housing remains closed and no material is hurled into the surroundings.

Abstract: The present invention discloses a power semiconductor component 1 having a special pressure contact system which is suitable, for example, for circuit-breakers, rectifiers, or the like in industrial drives. A pressure-equalizing element 9 in the form of a box 10, 15 with a flowable or plastically deformable medium 12 is inserted between a pressure plunger 7a and a power semiconductor 2. Because of the hydrostatic pressure in the box 10, an inhomogeneous pressure delivered at one side is passed on to the other side as a homogeneous pressure. A homogeneous pressure delivery can be achieved, even in the edge region of the pressure surfaces 11a, 11b, by means of an inlet camber of the lateral surface 13. The box 10, 15 preferably consists of copper or AlSiC, and the medium 12 of a liquid metal (Ga, Hg), a plastic metal (Pb, Al) or of metal balls (Cu) in silicone oil.

Abstract: A method for attaching a semiconductor wafer section to a lead frame comprises a carrier having an outside surface and an adhesive coating the carrier. Prior to use, the structure can be placed onto spools for easy shipment and storage.

Abstract: A semiconductor element-housing package which hermetically houses a semiconductor element for protection against moisture in the atmosphere by bonding an insulating substrate and a lid by means of a sealing material, with a moisture absorbent having surface pores 10-100 .ANG. in radius which is mixed in the insulating substrate and/or the sealing material formed of a resin.

Abstract: The semiconductor device disclosed has a cap in which, at an undersurface periphery portion, a plurality of looped projections are formed for intercepting a continuous bubble path that may be formed for a gas to escape. The preparatory stage steps of assembling the device includes forming a plated layer on a lead frame, adhesively fixing the lead frame on a base plate, cutting and separating leads from the lead frame, and shaping the leads into a predetermined form. The assembling stage steps of the device includes mounting a semiconductor chip on the base plate and bonding electrodes on the semiconductor chip and the leads, and mounting the cap which has the looped projections for intercepting a continuous bubble path that may be formed for a gas to escape. Since the steps such as forming a plated layer and shaping the leads have been completed in the preparatory stage, the assembling steps which include the mounting of the cap having the looped projections can be efficiently carried out.

Abstract: A circuit package for a varistor chip includes a housing made of an electrical insulating and burn-resistant composition. The housing includes a surrounding wall with upright front and rear wall portions and opposite side wall portions which interconnect the front and rear wall portions and which have lower sections that are formed with aligned pairs of wire holes, and a bottom wall connected to a bottom end of the surrounding wall. Each of two electrical contact pieces is disposed inside the housing and is located adjacent to a respective one of the front and rear wall portions of the surrounding wall. The contact pieces receive the varistor chip therebetween and are provided with contact portions that abut against the varistor chip. Each of the contact pieces has opposite sides formed with a pair of contact tabs. Each of the contact tabs is juxtaposed with a respective one of the wire holes and is used to establish external electrical connection with the varistor chip.

Abstract: A power semiconductor module (201) is disclosed comprising at least one semiconductor chip, which is arranged on a baseplate (202) and is surrounded by a housing (204) arranged above the baseplate (202), and which can be externally connected by means of connecting lugs (205). The connecting lugs (205) are electrically connected to the at least one semiconductor chip and are routed to the outside through corresponding through-passage openings (210) in the housing (204). An explosion of the module in the event of a disturbance is reliably prevented or its effect is largely attenuated as a result of the fact that the connecting lugs (205) are constructed as parts of connection laminates (206), which are arranged inside the housing (204) and parallel to the baseplate (202) and are mechanically connected to the latter over a large area.

Abstract: A flexible circuit board includes an insulating flexible film having a lower surface provided with first wiring patterns having first inner ends, and second outer ends extending to a peripheral area of the insulating flexible film. A semiconductor element is electrically connected to and supported by the first inner ends of the first patterns. A connecting circuit board includes an insulating base substrate having an upper surface provided with second wiring patterns having first inner ends, and second outer ends extending to a peripheral area of the base substrate, and a lower surface provided with external connecting terminals electrically connected to the first inner ends of the second wiring patterns by vias. A resin fills a space between the lower surface of the flexible circuit board and the upper surface of the connecting circuit board so that the semiconductor element is hermetically sealed with the resin.

Abstract: In a conductive contact structure for two conductors, a lower electrode also serves as a cooling element, and two grooves are formed in the lower surface of an electrode. A grease-like insulating material high in thermal conductivity is applied to the lower surface of the electrode except the middle region thereof which is defined by the two grooves; that is, it is applied only to the right and left regions of the lower surface which are located on both sides of the middle region. A pressurizing force is applied through an upper conductor to an electrode whose lower surface is fixed through an insulating board to the upper surface of the electrode. The middle region of the lower surface of the electrode is in contact with the surface of the lower conductor, and the right and left regions are elastically deformed in such a manner that they are slightly raised above the surface of the lower conductor, thus forming spaces therebetween. The spaces thus formed are filled with the insulating material.

Abstract: A hydrogen out venting window is disposed on or in a hermetically sealed electronic package lid, the window including a catalyst which dissociates internally trapped molecular hydrogen at an interior surface of the catalyst into atomic hydrogen and which recombines the atomic hydrogen back into molecular hydrogen at an exterior surface of the catalyst with the atomic hydrogen diffusing from the interior surface to the exterior surface to vent out the molecular hydrogen from the interior of the package to the exterior of the package, the window taking various forms including a catalyst sandwich with the package lid disposed between an interior catalysis plate and an exterior catalysis plate, a plate window with a catalysis covering plate disposed over a hole in the package lid, a plug window having a catalysis plug disposed in a hole in the package lid, or a lid window where the package lid is the catalyst, the catalyst being a suitable transition metal such as pallidium or platinum, or alloy, disposed on or i

Abstract: A resin-sealed semiconductor device, including a chip mounting die pad, porous fluorocarbon material located just beneath the die pad, beneath a die-pad supporting layer, gold lead wires, or in a sealing resin surrounding the other components, wherein any water vapor generated by the heat of soldering will be held within the porous fluorocarbon rather than crack the sealant under internal pressure.