Thermoelectric (e.g., Peltier Effect) Cooling Patents (Class 257/930)
  • Patent number: 6829237
    Abstract: A compact multi-stage switching network (100), and a router (510) incorporating such multi-stage switching network, adapted for simultaneously routing a plurality of data packets from a first plurality of input ports (110) to selected ones of a second plurality of output ports (190) comprising: a first stack (140) of IC switching layers (113) that are stacked in physical contact with one another, each IC switching layer containing at least one switching element circuit (142); a second stack (160) of IC switching layers (113) that are stacked in physical contact with one another, each IC switching layer (113) containing at least one switching element circuit (162); and interconnecting circuitry (150) that connects the first stack (140) of IC layers to the second stack (160) of IC layers to form the compact multi-stage switching network. The stacks (140, 160) are preferably mated to one another in a transverse fashion in order to achieve a natural full-mesh connection.
    Type: Grant
    Filed: October 9, 2001
    Date of Patent: December 7, 2004
    Assignee: Irvine Sensors Corporation
    Inventors: John C. Carson, Volkan H. Ozguz
  • Patent number: 6828579
    Abstract: A superlattice thermoelectric device. The device includes p-legs and n-legs, each leg includes a large number of at least two different very thin alternating layers of elements. The n-legs in the device includes alternating layers of silicon and silicon carbide. In preferred embodiments p-legs include a superlatice of B-C layers, with alternating layers of different stoichiometric forms of B-C. This preferred embodiment is designed to produce 20 Watts with a temperature difference of 300 degrees C. with a module efficiency of about 30 percent. The module is about 1 cm thick with a cross section area of about 7 cm2 and has about 10,000 sets of n and p legs each set of legs being about 55 microns thick and having about 5,000 very thin layers (each layer about 10 nm thick).
    Type: Grant
    Filed: December 12, 2001
    Date of Patent: December 7, 2004
    Assignee: Hi-Z Technology, Inc.
    Inventors: Saied Ghamaty, Norbert B. Elsner
  • Patent number: 6812563
    Abstract: A microcooling device is provided. The microcooling device includes a substrate, a microchannel array, and a condenser. A predetermined region of a lower surface of the substrate contacts a heat source. The microchannel array is placed on the substrate so that a coolant concentrating portion is opposite to the predetermined region of the lower surface. The condenser fixes the microchannel array, condenses vapor generated in a process of cooling the heat source, and allows the condensed vapor to flow into the microchannel array.
    Type: Grant
    Filed: July 19, 2002
    Date of Patent: November 2, 2004
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jeung-sang Go, Tae-gyun Kim, Kyung-il Cho
  • Patent number: 6809392
    Abstract: A micromachined structure having electrically isolated components is formed by thermomigrating a dopant through a substrate to form a doped region within the substrate. The doped region separates two portions of the substrate. The dopant is selected such that the doped region electrically isolates the two portions of the substrate from each other via junction isolation.
    Type: Grant
    Filed: February 20, 2003
    Date of Patent: October 26, 2004
    Assignee: Georgia Tech Research Corporation
    Inventors: Mark G. Allen, Charles C. Chung
  • Patent number: 6800933
    Abstract: Various embodiments of a semiconductor-on-insulator substrate incorporating a Peltier effect heat transfer device and methods of fabricating the same are provided. In one aspect, a circuit device is provided that includes an insulating substrate, a semiconductor structure positioned on the insulating substrate and a Peltier effect heat transfer device coupled to the insulating substrate to transfer heat between the semiconductor structure and the insulating substrate.
    Type: Grant
    Filed: April 23, 2001
    Date of Patent: October 5, 2004
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Charles R. Mathews, Miguel Santana, Jr., Alfredo Herrera
  • Publication number: 20040178517
    Abstract: A split-body Peltier device includes a plurality of thermoelectric junctions having dissimilar metallic conductors that are functionally interconnected in series and/or parallel by metallic conductors that may be identical to the junction materials. By using these metallic conductors, interconnection electrical resistance is reduced to allow a significant separation between the hot junction and the cold junction without dramatically increasing the ohmic heating. Further, the relatively small area-to-length ratio of the interconnecting material promotes heat loss along its length that effectively prevents heat at the hot junction from reaching the cold junction through the interconnecting material via conduction, thereby substantially eliminating Thermal Back Diffusion and accommodating auxiliary cooling devices to improve the device performance.
    Type: Application
    Filed: December 3, 2002
    Publication date: September 16, 2004
    Inventor: Wing Ming Siu
  • Patent number: 6774298
    Abstract: A thermoelectric module which includes case 1, heat-radiation side insulating substrate 4a, heat-absorption side insulating substrate 4b, first soldering layer 5a formed of a first soldering agent to connect the heat-radiation side insulating substrate 4a and the case 1, a plurality of P-type and N-type semiconductor chips interposed between the heat-radiation side insulating substrate 4a and the heat-absorption side insulating substrate 4b, the plurality of P-type and N-type semiconductor chips being arranged alternately, and a second soldering layer 15a (15b) formed of a second soldering agent to connect the heat-radiation side insulating substrate 4a and one end of each of the plural P-type and N-type semiconductor chips (the heat-absorption side insulating substrate 4b and the other end of each of the plural P-type and N-type semiconductor chips), the first soldering agent and the second soldering agent being identical in raw material.
    Type: Grant
    Filed: January 31, 2002
    Date of Patent: August 10, 2004
    Assignee: Aisin Seiki Kabushiki Kaisha
    Inventors: Hitoshi Tauchi, Masato Itakura, Hirotsugu Sugiura
  • Patent number: 6770808
    Abstract: A thermoelectric module includes plural thermoelectric semiconductor chips connected in series, first and second substrates, plural first and second electrodes formed on the first and second substrates, first solder through which the first and second electrodes are bonded to end portions of the thermoelectric semiconductor chips. The first substrate includes two or more protrusions protruding toward opposite sides with respect to the second substrate when being viewed vertically. A method of assembling a thermoelectric module in a radiating member includes the steps of mounting the first substrate on a radiating member through the second solder having a liquidus temperature lower than a solidus temperature of the first solder; holding the protrusions by leading edges of support arms where the second solder is melted to push the first substrate toward the radiating member under pressure while rocking the first substrate in a direction orthogonal to the pushing direction.
    Type: Grant
    Filed: February 27, 2002
    Date of Patent: August 3, 2004
    Assignees: Aisin Seiki Kabushiki Kaisha, Oki Electric Industry Co., Ltd.
    Inventors: Masato Itakura, Hirotsugu Sugiura, Shunji Sakai
  • Patent number: 6762484
    Abstract: The invention relates to a thermoelectric element comprising at least one n-type layer (1) and at least one p-type layer (2) of one or more doped semiconductors, whereby the n-type layer(s) (2) are arranged to form at least one pn-type junction (3). At least one n-type layer (1) and at least one p-type (2) are contacted in an electrically selective manner, and a temperature gradient (T1, T2) is applied or tapped parallel (x-direction) to the boundary layer (3) between at the least one n-type layer (1) and p-type layer (2). At least one pn-type junction is formed essentially along the entire, preferably longest, extension of the n-type layer(s) (1) and the p-type layer(s) (2) and, thus, essentially along the entire boundary layer (3) thereof.
    Type: Grant
    Filed: October 25, 2002
    Date of Patent: July 13, 2004
    Inventor: Gerhard Span
  • Patent number: 6762938
    Abstract: Apparatus is disclosed for providing auxiliary cooling and thermal stability to a temperature sensitive opto-electronic component. The disclosed apparatus comprising a primary thermal control system having a first thermal connection with a primary structure supporting at least one component of an optical system and a second thermal connection being thermally connected with an external environment; and an auxiliary thermal control system having a first thermal connection being thermally connected with the temperature sensitive opto-electronic component, and the auxiliary thermal control system having a second thermal connection being thermally connected with the primary thermal control system whereby the auxiliary thermal control system provides cooling to the temperature sensitive opto-electronic component and the primary thermal control system provides additional cooling to the auxiliary thermal control system through temperature regulation of the primary structure.
    Type: Grant
    Filed: December 13, 2001
    Date of Patent: July 13, 2004
    Assignee: Coretek, Inc.
    Inventors: Parviz Tayebati, Brian Cranton, Daryoosh Vakhshoori, Masud E. Azimi, Kevin J. McCallion
  • Patent number: 6743972
    Abstract: Heat dissipating IC devices including at least one IC die comprising a semiconductor substrate with circuitry which utilize thermoelectric effects to more effectively dissipate thermal energy from electronic circuits.
    Type: Grant
    Filed: August 10, 2001
    Date of Patent: June 1, 2004
    Inventor: Chris Macris
  • Patent number: 6727423
    Abstract: A thermoelectric module includes a case, a insulating base plate for a exoergic side, a insulating base plate for endoergic side, a first soldering layer which joins the insulating base plate for the exoergic side to the case via a first soldering material, and a second soldering layer which joins P-type and N-type semiconductor tips to the insulating base plate for an exoenergic side and a insulating base plate for an endoergic side, using second soldering material. The melting point temperature of the first soldering material for the first soldering layer is higher than the melting point temperature of the second material for the second soldering layer.
    Type: Grant
    Filed: September 28, 2001
    Date of Patent: April 27, 2004
    Assignee: Aisin Seiki Kabushiki Kaisha
    Inventors: Hitoshi Tauchi, Masato Itakura, Hirotsugu Sugiura
  • Patent number: 6727422
    Abstract: A heat sink/heat spreader structure utilizing thermoelectric effects to efficiently transport thermal energy from a variety of heat sources including integrated circuits and other electronic components. A method for manufacturing the heat sink/spreader is also disclosed.
    Type: Grant
    Filed: August 10, 2001
    Date of Patent: April 27, 2004
    Inventor: Chris Macris
  • Publication number: 20040075167
    Abstract: The invention relates to devices for providing a thermoelectric element which is, depending on the design, in particular suited for small powers and relatively high voltages and has the features of performance of conventional thermal generators, and which can be at the same time manufactured at low costs, and it is suggested to connect at least two electrically coupled semiconductor components or one semiconductor component and one metal film on at least one insulating substrate, the substrate being a flexible foil element, a process for the manufacture of such a thermoelectric element is also suggested.
    Type: Application
    Filed: October 30, 2003
    Publication date: April 22, 2004
    Inventors: Joachim Nurnus, Armin Lambrecht
  • Patent number: 6717043
    Abstract: A thermoelectric power generator is provided capable of generating electric power from solar heat, geothermal heat or exhaust heat of low or medium temperature. The thermoelectric power generator operates via a working mechanism where a slightly hydrated sulfide semiconductor layer, having one side in contact with a low Fermi level redox reaction and having the other side in contact with a high Fermi level reaction generated by reactive metal cathode, allows electron transfer from the redox reaction into the cathode. This is accomplished by a thermal excitation step between both energy bands followed by a charge separation step driven by the internal electric field. The difference between the Fermi levels of the energy bands results in a useful electromotive ability.
    Type: Grant
    Filed: March 1, 2002
    Date of Patent: April 6, 2004
    Assignees: Shin-Etsu Chemical Co., Ltd.
    Inventors: Niichiro Hasegawa, Mutsuko Hasegawa
  • Patent number: 6711018
    Abstract: In a heat-dissipating module for an electronic device, a heat-conducting unit is adapted to be disposed in close contact with a heat-generating component, and includes inner and outer tubes that cooperatively confine an enclosed chamber filled with a thermal superconductor material. A fan unit is disposed to generate currents of air through a chamber confined by the inner tube so as to dissipate the heat transferred to the heat-conducting unit from the heat-generating component. Alternatively, the heat-conducting unit can be configured into a tubular member, and a heat-dissipating unit is provided on the tubular member to help dissipate heat.
    Type: Grant
    Filed: May 17, 2002
    Date of Patent: March 23, 2004
    Inventor: Chin-Kuang Luo
  • Patent number: 6696635
    Abstract: A thermoelectric cooler utilizing superlattice and quantum-well materials may be deposited directly onto a die using thin-film deposition techniques. The materials may have a figure-of-merit of greater than one.
    Type: Grant
    Filed: March 7, 2002
    Date of Patent: February 24, 2004
    Assignee: Intel Corporation
    Inventor: Ravi Prasher
  • Patent number: 6697399
    Abstract: A bottom plate (4a) of a box-shaped package (4) is made of a metal. Portions of the package (4) (peripheral wall (4b) and cover plate (4c)) other than the bottom plate (4a) are made of a resin or a ceramic that is more economical than the metal. The material cost of the package (4) can thus be reduced in comparison with the case where the package (4) is made of the metal as a whole. A Peltier module (5) is fixed to the bottom plate (4a). A base (6) is fixed over the Peltier module (5), and a semiconductor laser chip (2) is disposed on this base (6). Heat from the semiconductor laser chip (2) and from the Peltier module (5) can be efficiently radiated through the bottom plate (4a) made of the metal, and deterioration of heat radiation performance can be prevented.
    Type: Grant
    Filed: May 25, 2001
    Date of Patent: February 24, 2004
    Assignee: The Furukawa Electric Co., Ltd.
    Inventors: Toshio Kimura, Takashi Shigematsu, Shinichiro Iizuka, Takeshi Aikiyo
  • Patent number: 6686532
    Abstract: A heat sink/heat spreader structure utilizing thermoelectric effects to efficiently transport thermal energy from a variety of heat sources including integrated circuits and other electronic components. A method for manufacturing the heat sink/spreader is also disclosed.
    Type: Grant
    Filed: September 18, 2000
    Date of Patent: February 3, 2004
    Inventor: Chris Macris
  • Patent number: 6667548
    Abstract: A semiconductor chip is shown containing an integral heat spreading layer that more effectively transmits heat from the die to ambient as a result of spreading the heat out on the die over a larger cross sectional area. Local hot spots are minimized which allows the semiconductor chip to operate at a higher frequency for a given upper threshold temperature. Also shown is a method of manufacturing such a semiconductor chip, and the associated method of cooling a semiconductor chip.
    Type: Grant
    Filed: April 6, 2001
    Date of Patent: December 23, 2003
    Assignee: Intel Corporation
    Inventors: Michael O'Connor, Kevin J. Haley, Biswajit Sur
  • Patent number: 6639242
    Abstract: A method and structure for a semiconductor structure that includes a substrate having at least one integrated circuit heat generating structure is disclosed. The invention has at least one integrated circuit cooling device on the substrate adjacent the heat generating structure. The cooling device is adapted to remove heat from the heat generating structure. The cooling device includes a cold region and a hot region. The cold region is positioned adjacent the heat generating structure. The cooling device has one of a silicon germanium super lattice structure. The cooling device also has a plurality of cooling devices that surround the heat generating structure. The cooling device includes a thermoelectric cooler.
    Type: Grant
    Filed: July 1, 2002
    Date of Patent: October 28, 2003
    Assignee: International Business Machines Corporation
    Inventors: Fen Chen, Timothy D. Sullivan
  • Publication number: 20030193087
    Abstract: A Peltier module is appropriate to a cooler incorporated in an optical communication module, and includes a series of Peltier junctions sandwiched between two substrates and power supply electrodes respectively connected to the outermost Peltier junctions, wherein the power supply electrodes pass through hollow spaces formed in one of the substrates so that conductive wires approach the contact areas in the upper surfaces of the power supply electrodes through the hollow space without a sharp bend.
    Type: Application
    Filed: May 13, 2003
    Publication date: October 16, 2003
    Applicant: Yamaha Corporation
    Inventors: Takahiro Hayashi, Kenzaburou Iijima
  • Patent number: 6628002
    Abstract: A heat removal system for integrated circuit chips, lasers, portable electronic devices, and the like which produce destructive amounts of heat employs a device which delivers working fluid to a high heat flux surface in a manner to avoid any change in phase of the fluid. The invention is based on the recognition that the heat flux produced by such sources is so high that prior art heat sinks fail to remove heat at a sufficient rate from a high heat flux surface and become inefficient in removing heat. The fluid here is maintained at a pressure and pumped at a rate to provide a sufficiently short dwell time to maintain the fluid in a supracritical state thus avoiding vapor lock. The fluid also may be cooled by, for example, either an evaporative or an absorption chiller driven by the heat from the heat source or by a thermoelectric cooler.
    Type: Grant
    Filed: October 2, 2001
    Date of Patent: September 30, 2003
    Assignee: Margolin Development
    Inventors: Charles Louis Ritz, George David Margolin
  • Patent number: 6613602
    Abstract: A method and system for forming a thermoelement for a thermoelectric cooler is provided. In one embodiment a substrate having a plurality of pointed tips covered by a metallic layer is formed. Portions of the metallic layer are covered by an insulator and other portions of the metallic layer are exposed. Next, a patterned layer of thermoelectric material is formed by depositions extending from the exposed portions of the metallic layer in the presence of a deposition mask. Finally, a metallic layer is formed to selectively contact the patterned layer of thermoelectric material.
    Type: Grant
    Filed: December 13, 2001
    Date of Patent: September 2, 2003
    Assignee: International Business Machines Corporation
    Inventors: Emanuel Israel Cooper, Steven Alan Cordes, David R. DiMilia, Bruce Bennett Doris, James Patrick Doyle, Uttam Shyamalindu Ghoshal, Robin Altman Wanner
  • Publication number: 20030122245
    Abstract: An electronic module and method of fabrication are provided employing an integrated thermal dissipation assembly. The thermal dissipation assembly includes a thermoelectric assembly configured to couple to an electronic device within the module for removing heat generated thereby, and a programmable power control circuit integrated with the thermoelectric assembly. The programmable power control circuit allows cooling capacity of the thermoelectric assembly to be tailored to anticipated heat dissipation of the electronic device by adjusting, for a given power source, voltage level to the thermoelectric elements of the thermoelectric assembly. Power to the thermoelectric assembly can be provided through conductive power planes disposed within a supporting substrate. The power control circuit includes one or more voltage boost circuits connected in series between the given power source and the thermoelectric elements of the associated thermoelectric assembly.
    Type: Application
    Filed: February 18, 2003
    Publication date: July 3, 2003
    Applicant: International Business Machines Corporation
    Inventors: Richard C. Chu, Michael J. Ellsworth, Robert E. Simons
  • Patent number: 6586835
    Abstract: An improved integrated circuit package for providing built-in heating or cooling to a semiconductor chip is provided. The improved integrated circuit package provides increased operational bandwidth between different circuit devices, e.g. logic and memory chips. The improved integrated circuit package does not require changes in current CMOS processing techniques. The structure includes the use of a silicon interposer. The silicon interposer can consist of recycled rejected wafers from the front-end semiconductor processing. Micro-machined vias are formed through the silicon interposer. The micro-machined vias include electrical contacts which couple various integrated circuit devices located on the opposing surfaces of the silicon interposer. The packaging includes a Peltier element.
    Type: Grant
    Filed: August 31, 1998
    Date of Patent: July 1, 2003
    Assignee: Micron Technology, Inc.
    Inventors: Kie Y. Ahn, Leonard Forbes, Eugene H. Cloud
  • Publication number: 20030116869
    Abstract: A split-body Peltier device includes a plurality of thermoelectric junctions having dissimilar metallic conductors that are functionally interconnected in series and/or parallel by metallic conductors that may be identical to the junction materials. By using these metallic conductors, interconnection electrical resistance is reduced to allow a significant separation between the hot junction and the cold junction without dramatically increasing the ohmic heating. Further, the relatively small area-to-length ratio of the interconnecting material promotes heat loss along its length that effectively prevents heat at the hot junction from reaching the cold junction through the interconnecting material via conduction, thereby substantially eliminating Thermal Back Diffusion and accommodating auxiliary cooling devices to improve the device performance.
    Type: Application
    Filed: December 3, 2002
    Publication date: June 26, 2003
    Inventor: Wing Ming Siu
  • Patent number: 6573596
    Abstract: A non-rectangular thermo module is formed by disposing a plurality of Peltier devices between a pair of heat radiating plates, wherein the heat radiating plate has a circular or straight outer peripheral contour portion and inner peripheral contour portion and right/left side edge contour portions connecting the outer peripheral contour portion and the inner peripheral contour portion and the outer peripheral contour portion is formed longer than the inner peripheral contour portion while the right/left side edge contour portions contain first straight lines which are not parallel and inclined toward the inner peripheral contour portion such that they narrow gradually, the first straight lines being provided at least in part of the right/left side edge contour portions.
    Type: Grant
    Filed: December 3, 2001
    Date of Patent: June 3, 2003
    Assignee: SMC Corporation
    Inventor: Masao Saika
  • Patent number: 6563227
    Abstract: Application of a potential difference across a doped region formed on an integrated circuit allows management of thermal energy directly on the chip surface. Individual temperature control cells are formed by ion implanting N- and P-type dopant into adjacent regions, and then forming a metal bridge across the similarly positioned ends. Placing a potential drop across metal contacts of the cell changes the temperature of the contacts relative to that of the electrically conducting bridge. Fabrication of arrays of temperature control cells of various shapes and sizes permits extremely precise heating and cooling of specific regions of the integrated circuit. Management of thermal energy on the IC in accordance with the present invention may be enhanced by forming arrays of temperature control cells possessing multiple tiers.
    Type: Grant
    Filed: August 27, 2002
    Date of Patent: May 13, 2003
    Assignee: National Semiconductor Corporation
    Inventor: Richard J. Strnad
  • Patent number: 6559538
    Abstract: An integrated circuit device having a built-in thermoelectric cooling mechanism is disclosed. The integrated circuit device includes a package and a substrate. Contained within the package, the substrate has a front side and a back side. Electric circuits are fabricated on the front side of the substrate, and multiple thermoelectric cooling devices are fabricated on the back side of the same substrate. The thermoelectric cooling devices are utilized to dissipate heat generated by the electric circuits to the package.
    Type: Grant
    Filed: October 20, 2000
    Date of Patent: May 6, 2003
    Assignee: BAE Systems Information and Electronic Systems Integration Inc.
    Inventors: Andrew T. S. Pomerene, Thomas J. McIntyre
  • Patent number: 6552256
    Abstract: A multi-stage cooler is formed from monolithically integrated thermionic and thermoelectric coolers, wherein the thermionic and thermoelectric coolers each have a separate electrical connection and a common ground, thereby forming a three terminal device. The thermionic cooler is comprised of a superlattice barrier surrounded by cathode and anode layers grown onto an appropriate substrate, one or more metal contacts with a finite surface area deposited on top of the cathode layer, and one or more mesas of different areas formed by etching around the contacts to the anode layer. The thermoelectric cooler is defined by metal contacts deposited on the anode layer or the substrate itself. A backside metal is deposited on the substrate for connecting to the common ground.
    Type: Grant
    Filed: March 6, 2001
    Date of Patent: April 22, 2003
    Assignee: The Regents of the University of California
    Inventors: Ali Shakouri, Christopher J. LaBounty, John E. Bowers
  • Publication number: 20030057512
    Abstract: In a thermoelectric generator or Peltier arrangement having a thermoelectrically active semiconductor material constituted by a plurality of metals or metal oxides the thermoelectrically active material is selected from a p- or n-doped semiconductor material constituted by a ternary compound of the general formula (I)
    Type: Application
    Filed: August 27, 2002
    Publication date: March 27, 2003
    Inventors: Hans-Josef Sterzel, Klaus Kuhling
  • Patent number: 6525343
    Abstract: A microchip for chemical reaction capable of rapidly performing an experiment irrespective of the types of the chemical substrates used for the experiment under various experimental conditions, wherein a horizontal communication path 13 comprising a plurality of chemical reaction pool portions 11, 12 and grooves communicating these chemical reaction pool portions 11, 12 to each other is formed in the surface of a diamond substrate 10 of minute size forming a substrate, a vertical communication path 20 comprising through-holes vertically communicating the chemical reaction pool portions 11, 12 to each other is provided in the diamond substrate 10, and an opening/closing valve 21 is installed at a communicating portion, and further heating/cooling portions 23, 24 such as a Peltier device are installed at those positions corresponding to the chemical reaction pool portions 11, 12, respectively, whereby a variety of experiments can be performed in a very small space without being restricted by the types of chemic
    Type: Grant
    Filed: December 4, 2001
    Date of Patent: February 25, 2003
    Assignee: Toyo Kohan Co., Ltd.
    Inventor: Michifumi Tanga
  • Patent number: 6521991
    Abstract: Connection of the leads for a thermoelectric module is readily accomplished, and after connection, the tensile strength of the connection is enhanced. One ends of the front and back side lead patterns for the thermoelectric module, formed on a support plate, are connected by solder to a Cu rod provided at an end of a group of thermoelectric semiconductor elements affixed to the support plate. After the front end of the lead for the thermoelectric module is bent and passed from the side of the front lead pattern through a through hole formed between the front and back side lead patterns, the front end is connected to the back side lead pattern by solder.
    Type: Grant
    Filed: November 21, 2000
    Date of Patent: February 18, 2003
    Assignees: Morix Corporation, Honda Giken Kogyo Kabushiki Kaisha
    Inventors: Kazukiyo Yamada, Kohei Tashiro, Hidenori Esaki, Tomohide Kudou
  • Patent number: 6512291
    Abstract: A method and apparatus are disclosed for supporting semiconductor devices on a flexible support which includes one or more thermoelectric cooling devices. The thermoelectric cooling devices, which include at least one pair of positively-doped and negatively-doped elements electrically coupled together, are positioned between a pair of flex panels. Each panel has connector sites at which connectors such as solder balls are located. The thermoelectric cooling devices may be arranged between the panels to create two or more device support areas having different temperature regimes. The thermoelectric cooling devices may be connected to the panels by placing the panels, connectors and thermoelectric cooling devices in a reflow chamber, exposing them to a reducing atmosphere, and heating to a temperature sufficient to reflow the connectors.
    Type: Grant
    Filed: February 23, 2001
    Date of Patent: January 28, 2003
    Assignee: Agere Systems Inc.
    Inventors: Mindaugas F. Dautartas, Joseph M. Freund, George J. Przybylek
  • Patent number: 6489551
    Abstract: An electronic module is provided having an integrated thermoelectric cooling assembly disposed therein coupled to the module's electronic device. The thermoelectric assembly includes one or more thermoelectric stages and a thermal space transformer, for example, disposed between a first thermoelectric stage and a second thermoelectric stage. The electronic device is mounted to a substrate with the thermoelectric assembly disposed in thermal contact with the electronic device and a thermally conductive cap is positioned over the thermoelectric assembly, and is also in thermal contact with the thermoelectric assembly. Power to the thermoelectric assembly can be provided using electrically conductive springs disposed between one or more stages of the assembly and pads on an upper surface of the substrate, which electrically connect to power planes disposed within the substrate.
    Type: Grant
    Filed: November 30, 2000
    Date of Patent: December 3, 2002
    Assignee: International Business Machines Corporation
    Inventors: Richard C. Chu, Michael J. Ellsworth, Jr., Robert E. Simons
  • Patent number: 6476483
    Abstract: In an electronic device with an active region on top of and isolated from an substrate, a first material region is defined on top of and/or adjacent to and electrically isolated from the active region and a second material region is attached to a surface of the first material region to form an interface defining a Peltier cooling junction therebetween. A current source connected in series to the first and the second material regions produces a cooling effect at the Peltier cooling junction.
    Type: Grant
    Filed: October 20, 1999
    Date of Patent: November 5, 2002
    Assignee: International Business Machines Corporation
    Inventors: Eric Adler, James S. Dunn, Kent E. Morrett, Edward J. Nowak, Stephen A. St. Onge
  • Patent number: 6476508
    Abstract: Application of a potential difference across a doped region formed on an integrated circuit allows management of thermal energy directly on the chip surface. Individual temperature control cells are formed by ion implanting N- and P- type dopant into adjacent regions, and then forming a metal bridge across the similarly positioned ends. Placing a potential drop across metal contacts of the cell changes the temperature of the contacts relative to that of the electrically conducting bridge. Fabrication of arrays of temperature control cells of various shapes and sizes permits extremely precise heating and cooling of specific regions of the integrated circuit. Management of thermal energy on the IC in accordance with the present invention may be enhanced by forming arrays of temperature control cells possessing multiple tiers.
    Type: Grant
    Filed: May 29, 2001
    Date of Patent: November 5, 2002
    Assignee: National Semiconductor Corporation
    Inventor: Richard J. Strnad
  • Patent number: 6452206
    Abstract: A superlattice structure for thermoelectric power generation includes m monolayers of a first barrier material alternating with n monolayers of a second quantum well material with a pair of monolayers defining a superlattice period and each of the materials having a relatively smooth interface therebetween. Each of the quantum well layers have a thickness which is less than the thickness of the barrier layer by an amount which causes substantial confinement of conduction carriers to the quantum well layer and the alternating layers provide a superlattice structure having a figure of merit which increases with increasing temperature.
    Type: Grant
    Filed: March 16, 1998
    Date of Patent: September 17, 2002
    Assignee: Massachusetts Institute of Technology
    Inventors: Theodore C. Harman, Mildred S. Dresselhaus, David L. Spears, Michael P. Walsh, Stephen B. Cronin, Xiangzhong Sun, Takaaki Koga
  • Patent number: 6424533
    Abstract: A thermal dissipation subassembly is provided for an electronic device. The subassembly includes a thermal spreader configured to thermally couple to a surface of a heat generating component of the electronic device. The heat generating component, e.g., an integrated circuit chip, has a non-uniform thermal distribution across the surface thereof between at least one first region of the surface and at least one second region of the surface, with the at least one first region having a higher heat flux than the at least one second region. The subassembly further includes at least one thermoelectric device aligned to at least a portion of each first region having the higher heat flux, wherein the at least one thermoelectric device facilitates dissipation of the higher heat flux. In one embodiment, one or more thermoelectric devices are embedded within the thermal spreader and thermally isolated therefrom.
    Type: Grant
    Filed: June 29, 2000
    Date of Patent: July 23, 2002
    Assignee: International Business Machines Corporation
    Inventors: Richard C. Chu, Michael J. Ellsworth, Jr., Robert E. Simons
  • Publication number: 20020074646
    Abstract: This invention provides a non-rectangular thermo module formed by disposing a plurality of Peltier devices between a pair of heat radiating plates, wherein the heat radiating plate has a circular or straight outer peripheral contour portion and inner peripheral contour portion and right/left side edge contour portions connecting the outer peripheral contour portion and the inner peripheral contour portion and the outer peripheral contour portion is formed longer than the inner peripheral contour portion while the right/left side edge contour portions contain first straight lines which are not parallel and inclined toward the inner peripheral contour portion such that they narrow gradually, the first straight lines being provided at least in part of the right/left side edge contour portions.
    Type: Application
    Filed: December 3, 2001
    Publication date: June 20, 2002
    Applicant: SMC CORPORATION
    Inventor: Masao Saika
  • Patent number: 6404042
    Abstract: A chip mount structure called “subcarrier” and semiconductor device capable of efficiently retaining the temperature of a semiconductor element at a constant level by a Peltier cooler without degrading the signal transmission characteristics of a module even when the atmospheric environment for use in the module changes in outside air temperature are provided. The subcarrier includes an element support unit that is high in thermal conductivity and also an element wiring unit of low thermal conductivity. Increasing the thermal conductivity of element support unit makes it possible to provide superior heat conduction between the semiconductor element and Peltier cooler whereas decreasing the element wiring unit's thermal conductivity enables elimination of radiation and absorption or exchange of heat from the top and side surfaces thereof, which in turn leads to an ability to greatly suppress or minimize the thermal load relative to the Peltier cooler.
    Type: Grant
    Filed: December 27, 1999
    Date of Patent: June 11, 2002
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Minoru Sone, Akira Tanioka, Motoyasu Morinaga, Hideo Furuyama
  • Patent number: 6400011
    Abstract: A semiconductor laser module includes a metal casing and a Peltier effect element mounted on the inner surface of the bottom wall of the metal casing by soldering. A Peltier effect element mounting region is provided in the inner surface of the metal casing in such a manner that the Peltier effect element mounting region is raised with respect to a region adjacent thereto.
    Type: Grant
    Filed: June 6, 1995
    Date of Patent: June 4, 2002
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventor: Atsushi Miki
  • Publication number: 20020024154
    Abstract: A thermoelectric module comprising an N-type thermoelectric element having excellent characteristics in atmospheric air even when the temperature rises to a medium-to-high temperature region of about 500° C.
    Type: Application
    Filed: June 29, 2001
    Publication date: February 28, 2002
    Inventors: Reiko Hara, Ikuto Aoyama, Kenichi Tomita, Kouichi Ishida
  • Patent number: 6337513
    Abstract: A chip packaging system and method for providing enhanced thermal cooling including a first embodiment wherein a diamond thin film is used to replace at least the surface layer of the existing packaging material in order to form a highly heat conductive path to an associated heat sink. An alternative embodiment provides diamond thin film layers disposed on adjacent surfaces of the chip and the chip package. Yet another alternative embodiment includes diamond thin film layers on adjacent chip surfaces in a chip-to-chip packaging structure. A final illustrated embodiment provides for the use of an increased number of solder balls disposed in at least one diamond thin film layer on at least one of a chip and a chip package joined with standard C4 technology.
    Type: Grant
    Filed: November 30, 1999
    Date of Patent: January 8, 2002
    Assignee: International Business Machines Corporation
    Inventors: Lawrence A. Clevenger, Louis L. Hsu, Li-Kong Wang, Tsorng-Dih Yuan
  • Publication number: 20010054772
    Abstract: A thermal coupler utilizes Peltier heating and cooling to transmit a thermal signal across an electrical isolation barrier. Application of a potential difference across a thermal emitter in the form of a first pair of parallel strips of electrically conducting materials separated by a second electrically conducting material results in a temperature difference arising at junctions between the first electrically conducting material and the second electrically conducting material. This temperature difference is propagated across the electrical isolation barrier to a similar thermal detector structure lacking an applied voltage and possessing a second pair of junctions. Differential heating of the second pair of junctions of the thermal detector creates a Seebeck voltage in the thermal detector. This Seebeck voltage is amplified and processed as a communication signal.
    Type: Application
    Filed: March 16, 2001
    Publication date: December 27, 2001
    Inventor: Richard J. Strnad
  • Patent number: 6326610
    Abstract: A first Peltier device Pe1 and at least one second Peltier device Pe2 having a current consumption smaller than that of the first Peltier device Pe1 are connected to each other in series, while a bypass circuit B for diverting an excess current I3 with respect to the second Peltier device Pe2 is connected to the second Peltier device Pe2 in parallel, so that a driving current I1 from a current control section A drives the first Peltier device Pe1 at its optimum operating point, and the excess current I3 with respect to the second Peltier device Pe2 in the driving current I1 is diverted into the bypass circuit B, so as to allow the second Peltier device Pe2 to be driven at its optimum operating point as well, where by the cooling efficiency can be improved. Also, the first and second Peltier devices Pe1, Pe2 are stacked on each other, while all the Peltier devices Pe1, Pe2 are driven by the single common current control section A, so as to attain a smaller size.
    Type: Grant
    Filed: May 11, 1999
    Date of Patent: December 4, 2001
    Assignee: Hamamatsu Photonics K.K.
    Inventors: Satoru Muramatsu, Hidetaka Suzuki
  • Patent number: 6300150
    Abstract: A termoelectric device and method for manufacturing the thermoelectric device.
    Type: Grant
    Filed: November 3, 1999
    Date of Patent: October 9, 2001
    Assignee: Research Triangle Institute
    Inventor: Rama Venkatasubramanian
  • Patent number: 6246100
    Abstract: A thermal coupler utilizes Peltier heating and cooling to transmit a thermal signal across an electrical isolation barrier. Application of a potential difference across a thermal emitter in the form of a first pair of parallel strips of electrically conducting materials separated by a second electrically conducting material results in a temperature difference arising at junctions between the first electrically conducting material and the second electrically conducting material. This temperature difference is propagated across the electrical isolation barrier to a similar thermal detector structure lacking an applied voltage and possessing a second pair of junctions. Differential heating of the second pair of junctions of the thermal detector creates a Seebeck voltage in the thermal detector. This Seebeck voltage is amplified and processed as a communication signal.
    Type: Grant
    Filed: February 3, 1999
    Date of Patent: June 12, 2001
    Assignee: National Semiconductor Corp.
    Inventor: Richard J. Strnad
  • Patent number: 6222242
    Abstract: The present invention provides a novel thermoelectric semiconductor material having excellent thermoelectric property which is not lowered like a conventional PbTe-based or PbSnTe-based semiconductor material even if a strength is improved by sintering. The thermoelectric semiconductor material of the invention is characterized by having chemical formula AB2X4 (where, A is a simple substance or mixture of Pb, Sn and Ge (IV family elements), B is a simple substance or mixture of Bi and Sb (V family elements), and X is a simple substance or mixture of Te and Se (VI family elements). In this case, a spark plasma sintering device is used to apply a pulsed current through the powder material to cause an electrical discharge among particles of the powder to synthesize the compound AB2X4 having a uniform structure. And, the invention synthesizes a compound, which is to be a thermoelectric semiconductor material, so to have a uniform structure.
    Type: Grant
    Filed: July 26, 1999
    Date of Patent: April 24, 2001
    Assignee: Komatsu Ltd.
    Inventors: Akio Konishi, Katsushi Fukuda