Abstract: A superconducting junction element has a lower electrode formed by a superconductor layer, a barrier layer provided on a portion of a surface of the lower electrode, an upper electrode formed by a superconductor and covering the barrier layer, and a superconducting junction formed by the lower electrode, the barrier layer and the upper electrode. A critical current density of the superconducting junction is controlled based on an area of the lower electrode.
Type:
Grant
Filed:
August 28, 2009
Date of Patent:
December 11, 2012
Assignees:
The Chugoku Electric Power Co., Inc., Hitachi Ltd., Fujitsu Limited, International Superconductivity Technology Center, The Juridical Foundation
Abstract: A process for growth of boron-based nanostructures, such as nanotubes and nanowires, with a controlled diameter and with controlled chemical (such as composition, doping) as well as physical (such as electrical and superconducting) properties is described. The boron nanostructures are grown on a metal-substituted MCM-41 template with pores having a uniform pore diameter of less than approximately 4 nm, and can be doped with a Group Ia or Group IIa electron donor element during or after growth of the nanostructure. Preliminary data based on magnetic susceptibility measurements suggest that Mg-doped boron nanotubes have a superconducting transition temperature on the order of 100 K.
Abstract: A semiconductor device and a method of fabricating the same are provided. The semiconductor device includes a plurality of active regions which are defined in a semiconductor substrate, a plurality of gate lines which are formed as zigzag lines, extend across the active regions, are symmetrically arranged, and define a plurality of first regions and a plurality of second regions therebetween, and wherein the first regions being narrower than the second regions. The semiconductor device further includes an insulation layer which defines a plurality of contact regions by filling empty spaces in the first regions between the gate lines and, extending from the first regions, and surrounding sidewalls of portions of the gate lines in the second regions, and wherein the contact regions partially exposing the active regions and a plurality of contacts which respectively fill the contact regions.
Abstract: A method of manufacturing a superconducting wire includes the step of drawing a wire formed by coating raw material powder for a superconductor with a metal, the step of first rolling a multifilamentary wire after the step of drawing, and the step of first sintering the multifilamentary wire after the step of the first rolling. The method further includes the step of holding a clad wire, a multifilamentary wire, or a multifilamentary wire under a reduced-pressure atmosphere in at least one of an interval between the step of drawing and the step of the first rolling and an interval between the step of the first rolling and the step of the first sintering. With this method, a superconducting wire having high and uniform performance can be obtained.
Abstract: A first rectangular groove having a rectangular cross section and a second rectangular groove substantially orthogonal to the first rectangular groove and having a rectangular cross section are formed in a first silicon substrate. A third rectangular groove located at a position facing the first rectangular groove and having a rectangular cross section is formed on a second silicon substrate. A device substrate including a frequency conversion device is provided in the second rectangular groove, so that the frequency conversion device is located where the first and second rectangular grooves are orthogonal to each other.