Abstract: A monolithic power management module provides a chip carrier with surfaces, ground traces, signal and power interconnects; a three dimensional FET formed on the chip carrier to modulate currents through the carrier or on the carrier surface; a toroidal inductor or transformer coil with a ceramic magnetic core formed on the chip carrier adjacent to the FET and having a first winding connected to the FET, and a plurality of passive ceramic components formed on the chip carrier surface.

Abstract: A superconducting circuit having: a charging loop; a load loop including a superconductor; a superconducting connection which is simultaneously part of the charging loop and the load loop; and a controller to control a state of the connection between a first and second conductive states. In both the first and second states the connection is in a superconducting state, but a resistance or impedance of the superconducting connection is higher in the first conductive state than in the second conductive state such that the superconducting circuit is configured to induce flux flow between the charging loop and the load loop when the connection is its first conductive state, and inhibits flux flow between the charging loop and the load loop when the connection is its second conductive state; in particular wherein the superconducting connection operates in a flux flow regime in the first conductive state.

Abstract: A novel method and system for using certain tin compounds as dopant sources for ion implantation are provided. A suitable tin-containing dopant source material is selected based on one or more certain attributes. Some of these attributes include stability at room temperature; sufficient vapor pressure to be delivered from its source supply to an ion chamber and, the ability to produce a suitable beam current for ion implantation to achieve the required implant Sn dosage. The dopant source is preferably delivered from a source supply that actuates under sub atmospheric conditions to enhance the safety and reliability during operation.

Abstract: A monolithic power switch provides a semiconductor layer, a three dimensional FET formed in the semiconductor layer to modulate currents through the semiconductor layer, and a toroidal inductor with a ceramic magnetic core formed on the semiconductor layer around the FET and having a first winding connected to the FET.

Abstract: Vapor-liquid-solid growth of nanowires is tailored to achieve complex one-dimensional material geometries using phase diagrams determined for nanoscale materials. Segmented one-dimensional nanowires having constant composition display locally variable electronic band structures that are determined by the diameter of the nanowires. The unique electrical and optical properties of the segmented nanowires are exploited to form electronic and optoelectronic devices. Using gold-germanium as a model system, in situ transmission electron microscopy establishes, for nanometer-sized Au—Ge alloy drops at the tips of Ge nanowires (NWs), the parts of the phase diagram that determine their temperature-dependent equilibrium composition. The nanoscale phase diagram is then used to determine the exchange of material between the NW and the drop. The phase diagram for the nanoscale drop deviates significantly from that of the bulk alloy.

Abstract: Several embodiments of a novel technique for limiting transmission of fault current are disclosed. Current power distribution systems typically have an impedance, or reactor, on the output of the network equipment to limit current in the case of a fault condition. A low resistance switch, which changes its resistance in the presence of high current, is connected in parallel with this reactor. Thus, in normal operation, the current from the power generator bypasses the reactor, thereby minimizing power loss. However, in the presence of a fault, the resistance of the switch increases, forcing the current to pass through the reactor, thereby limiting the fault current.

Abstract: A superconducting junction element has a lower electrode formed by a superconductor layer, a barrier layer provided on a portion of a surface of the lower electrode, an upper electrode formed by a superconductor and covering the barrier layer, and a superconducting junction formed by the lower electrode, the barrier layer and the upper electrode. A critical current density of the superconducting junction is controlled based on an area of the lower electrode.

Abstract: Systems, articles, and methods are provided related to nanowire-based detectors, which can be used for light detection in, for example, single-photon detectors. In one aspect, a variety of detectors are provided, for example one including an electrically superconductive nanowire or nanowires constructed and arranged to interact with photons to produce a detectable signal. In another aspect, fabrication methods are provided, including techniques to precisely reproduce patterns in subsequently formed layers of material using a relatively small number of fabrication steps. By precisely reproducing patterns in multiple material layers, one can form electrically insulating materials and electrically conductive materials in shapes such that incoming photons are redirected toward a nearby electrically superconductive materials (e.g., electrically superconductive nanowire(s)). For example, one or more resonance structures (e.g.

Abstract: A novel method and apparatus for long distance quantum communication in realistic, lossy photonic channels is disclosed. The method uses single emitters of light as intermediate nodes in the channel. One electronic spin and one nuclear spin coupled via the contact hyperfine interaction in each emitter, provide quantum memory and enable active error purification. It is shown that the fixed, minimal physical resources associated with these two degrees of freedom suffice to correct arbitrary errors, making our protocol robust to all realistic sources of decoherence. The method is particularly well suited for implementation using recently-developed solid-state nano-photonic devices.

Abstract: Disclosed herein is a protocol that enables the ?/8-gate in chiral topological superconductors in which superconducting stiffness ? has been suppressed. The protocol enables a topologically protected ?/8-gate in any pure Ising system that can be fabricated into genus=1 surface. By adding the ?/8-gate to previously known techniques, a design for universal topologically protected quantum computation which may be implemented using rather conventional materials may be obtained.

Abstract: Fabricating single-walled carbon nanotube transistor devices includes removing undesirable types of nanotubes. These undesirable types of nanotubes may include nonsemiconducting nanotubes, multiwalled nanotubes, and others. The undesirable nanotubes may be removed electrically using voltage or current, or a combination of these. This approach to removing undesirable nanotubes is sometimes referred to as “burn-off.” The undesirable nanotubes may be removed chemically or using radiation. The undesirable nanotubes of an integrated circuit may be removed in sections or one transistor (or a group of transistors) at a time in order to reduce the electrical current used or prevent damage to the integrated circuit during burn-off.

Abstract: The present invention generally relates to the fabrication of molecular electronics devices from molecular wires and Single Wall Nanotubes (SWNT). In one embodiment, the cutting of a SWNT is achieved by opening a window of small width by lithography patterning of a protective layer on top of the SWNT, followed by applying an oxygen plasma to the exposed SWNT portion. In another embodiment, the gap of a cut SWNT is reconnected by one or more difunctional molecules having appropriate lengths reacting to the functional groups on the cut SWNT ends to form covalent bonds. In another embodiment, the gap of a cut SWNT gap is filled with a self-assembled monolayer from derivatives of novel contorted hexabenzocoranenes. In yet another embodiment, a device based on molecular wire reconnecting a cut SWNT is used as a sensor to detect a biological binding event.

Abstract: The present invention provides a photosensitive resin composition for a pad protective layer that includes (A) an alkali soluble resin, (B) a reactive unsaturated compound, (C) a photoinitiator, and (D) a solvent. The (A) alkali soluble resin includes a copolymer including about 5 to about 50 wt % of a unit having the Chemical Formula 1, about 1 to about 25 wt % of a unit having the Chemical Formula 2, and about 45 to about 90 wt % of a unit having the Chemical Formula 3, and a method of making an image sensor using the photosensitive resin composition.

Abstract: An integrated circuit for quantum computing may include a superconducting shield to limit magnetic field interactions.

Abstract: A method of batch fabrication using established photolithographic techniques allowing nanoparticles or nanodevices to be fabricated and mounted into a macroscopic device in a repeatable, reliable manner suitable for large-scale mass production. Nanoparticles can be grown on macroscopic “modules” which can be easily manipulated and shaped to fit standard mounts in various devices.

Abstract: A superconductor and a method for producing the same are provided. The method for producing a superconductor includes the step of forming a superconducting layer on a base layer by performing a film deposition at least three times, wherein the film thickness of a superconducting film in each film deposition is 0.3 ?m or less. In such a case, even when the layer thickness of the superconducting layer is increased, the decrease in the Jc is suppressed and the Ic is increased.

Abstract: The self inductance associated with a capacitance A52 in a superconductor integrated circuit (FIG. 1) is reduced by adding a layer of superconductor metal (A54) overlying the capacitor, effectively producing a negative inductance to counteract the self-inductance of the capacitor leads, thereby reducing inductance of the circuit. As a result it possible to transfer a single flux quantum (“SFQ”) pulse through the capacitor. Capacitors (19 and 25 FIG. 5) of the foregoing type are incorporated in superconductor integrated circuit SFQ transmission lines (FIG. 5) to permit SQUID-to-SQUID transfer of SFQ pulses, while maintaining the circuit grounds of the respective SQUIDs in DC isolation. Bias current (10) may be supplied to multiple SQUIDs (1 & 3, 7 & 9 FIG. 5) serially, reducing the supply current required previously for operation of multiple SQUIDs.