Abstract: A method and system for providing a magnetic element that can be used in a magnetic memory is disclosed. The magnetic element includes pinned, nonmagnetic spacer, and free layers. The spacer layer resides between the pinned and free layers. The free layer can be switched using spin transfer when a write current is passed through the magnetic element. The free layer includes a first ferromagnetic layer and a second ferromagnetic layer. The second ferromagnetic layer has a very high perpendicular anisotropy and an out-of-plane demagnetization energy. The very high perpendicular anisotropy energy is greater than the out-of-plane demagnetization energy of the second layer.

Abstract: A vertical spin transistor according to an embodiment of the present invention includes: a first source/drain layer including a layer formed of magnetic material; a protruding structure including, a channel layer formed on the first source/drain layer and including a layer formed of semiconductor, and a second source/drain layer formed on the channel layer and including a layer formed of magnetic material; a gate insulating film formed on a side of the channel layer; and a gate electrode formed on a surface of the gate insulating film.

Abstract: In one embodiment, a memory device includes a plurality of magnetic data cells and a magnetic reference cell extending uninterrupted along more than one of the plurality of data cells.

Abstract: A toggle MTJ is disclosed that has a SAF free layer with two or more magnetic sub-layers having equal magnetic moments but different anisotropies which is achieved by selecting Ni˜0.8Fe˜0.2 for one sub-layer and CoFeB or the like with a uni-axial anisotropy of 10 to 30 Oe for the higher anisotropy sub-layer. When a field is applied at <10° angle from the easy axis, magnetic vectors for the two sub-layers rotate to form different angles from the easy axis. A method is also described for selectively writing to bits along a word line that is orthogonal to bit line segments and avoids the need to “read first”. A bipolar word line pulse with two opposite pulses separated by a no pulse interval is applied in the absence of a bit line pulse to write a “0”. A bit line pulse opposite the second word line pulse writes a “1”.

Abstract: A magneto-resistance transistor including a magneto-resistant element which may function as an emitter and a passive element which may function as a collector. The base may be interposed between the passive element and the magneto-resistant element, thereby coupling the passive element with the magneto-resistant element. A magnetic field of a given strength may be applied to at least a portion of the magneto-resistant transistor, the given strength determining a resistance in the at least a portion of the magneto-resistant transistor. Thus, by adjusting the given strength of the magnetic field, the resistance may be adjusted. Therefore, different emitter current inputs may be achieved with a fixed voltage. Further, a base current may vary with a controlled variation of the emitter current input.

Abstract: A ferroelectric random access memory (FRAM) includes a semiconductor substrate and an interlayer insulating layer on the substrate. A diffusion preventive layer is on the interlayer insulating layer. The diffusion preventive layer and the interlayer insulating layer have two node contact holes formed therein. Node conductive layer patterns are aligned with the node contact holes, respectively, and are disposed so as to protrude upward from the diffusion preventive layer. Lower electrodes are disposed on the diffusion preventive layer that cover the node conductive layer patterns, respectively. Thicknesses of the lower electrodes are gradually reduced from a line extending from upper surfaces of the node conductive layer patterns toward the diffusion preventive layer.

Abstract: A magnetic memory device and a manufacturing method thereof are provided. The magnetic memory device can include a word line, a freely switchable layer, a fixed layer, a dielectric layer, and a bit line. The freely switchable layer can be electrically connected to a diffusion region at one side of the word line, and the fixed layer can be horizontally adjacent to the freely switchable layer. The dielectric layer can be provided between the freely switchable layer and the fixed layer, and the bit line can be electrically connected to the fixed layer.

Abstract: Microwave generating and detection portions of a electronic circuit is improved in efficiency and reduced in size. A microwave generating element A comprises a lower electrode 1, a layer 3 formed on the lower electrode 1 in an island shape, forming a magnetoresistance element, an insulator 7 formed on the lower electrode 1 in such a manner as to surround the layer 3 forming the magnetoresistance element, and an upper electrode 5 formed on the insulator 7 and the layer 3 forming the magnetoresistance element. The layer 3 forming the magnetoresistance element includes, in order from the side of the lower electrode 1, a magnetization fixed layer 3a, an intermediate layer 3b, and a magnetization free layer 3c. The magnetization free layer 3c, which is required to produce resonance oscillation based on a current, preferably is dimensioned to be equal to or smaller than 200 nm square in a cross-sectional area and on the order of 1 to 5 nm in film thickness, for example.

Abstract: Hall device is provided by enabling stable provision of a quantum well compound semiconductor stacked structure. It has first and second compound semiconductor layers composed of Sb and at least two of five elements of Al, Ga, In, As and P, and an active layer composed of InxGa1-xAsySb1-y (0.8?x?1.0, 0.8?y?1.0), which are stacked. Compared with the active layer, the first and second compound semiconductor layers each have a wider band gap, and a resistance value five times or more greater. The lattice constant differences between the active layer and the first and second compound semiconductor layers are each designed in a range of 0.0-1.2%, and the thickness of the active layer is designed in a range of 30-100 nm.

Abstract: The present invention seeks to reduce the amount of current required for a write operation by using a process for forming the read conductor within a recessed write conductor, the write conductor itself formed within a trench of an insulating layer. The present invention protects the MTJ from the voltages created by the write conductor by isolating the write conductor and enabling the reduction of current necessary to write a bit of information.

Abstract: A magnetic tunnel junction device includes a magnetically programmable free magnetic layer. The free magnetic layer includes a lamination of at least two ferromagnetic layers and at least one intermediate layer interposed between the at least two ferromagnetic layers.

Abstract: A magnetic random access memory includes, a lower electrode, a magnetoresistive element which is arranged above the lower electrode and has side surfaces, and a protective film which covers the side surfaces of the magnetoresistive element, has a same planar shape as the lower electrode, and is formed by one of sputtering, plasma CVD, and ALD.

Abstract: Magnetic Random Access Memory (MRAM) devices include a lower electrode and a magnetic tunnel junction on the lower electrode. The magnetic tunnel junction includes a seed layer and a tunneling barrier that is oriented in a same direction as the most closely packed plane direction of the seed layer. An oxide layer may be provided between the lower electrode and the magnetic tunnel junction. The lower electrode may be a titanium-rich TiN layer having more than 50 atomic percent titanium content. Analogous fabrication methods are also described.

Abstract: One embodiment of the present invention provides a switching device that can vary a spin-polarized current based on an input signal. The switching device comprises a first conducting region, a second conducting region, and a half-metal region interposed between the first conducting region and the second conducting region. The half-metal region comprises a material which, at the intrinsic Fermi level, has substantially zero available electronic states in a minority spin channel. Changing the voltage of the half-metal region with respect to the first conducting region moves its Fermi level with respect to the electron energy bands of the first conducting region, which changes the number of available electronic states in the majority spin channel, and in doing so, changes the majority-spin polarized current passing through the switching device.

Abstract: A buried ground contact that connects the ground electrodes of transistors in adjacent memory cells that are separated by an isolation region is described. In some embodiments, the buried ground contact passes beneath the isolation region that separates cells to electrically connect the drain regions of transistors in adjacent cells. The buried ground may be connected to a metal ground line through via connections at intervals, outside of the active cell area. Use of this buried ground contact eliminates the need for individual ground connections to each cell, leading to a substantial reduction in cell size, and a consequent increase in cell density. The buried ground contacts of the invention can be used with a variety of devices, including MRAM and PCRAM devices.

Abstract: A memory cell structure. A first conductive line is cladded by at least two first ferromagnetic layers respectively having a first easy axis and a second easy axis, a nano oxide layer located between the first ferromagnetic layers, and a first pinned ferromagnetic layer. The first and second easy axes are 90 degree twisted-coupled with the first easy axis parallel to the length of the first conductive line and the second easy axis perpendicular to the length of the first conductive line. A storage device is adjacent to the first conductive line, receiving a magnetic field generated from a current flowing through the first conductive line.

Abstract: Low power magnetoelectronic device structures and methods therefore are provided. The magnetoelectronic device structure (100, 150, 450, 451) comprises a programming line (104, 154, 156, 454, 456), a magnetoelectronic device (102, 152, 452) magnetically coupled to the programming line (104, 154, 156, 454, 456), and an enhanced permeability dielectric (EPD) material (106, 108, 110, 158, 160, 162, 458, 460, 462) disposed adjacent the magnetoelectronic device. The EPD material (106, 108, 110, 158, 160, 162, 458, 460, 462) comprises multiple composite layers (408) of magnetic nano-particles (406) embedded in a dielectric matrix (409). The composition of the composite layers is chosen to provide a predetermined permeability profile. A method for making a magnetoelectronic device structure is also provided. The method comprises fabricating the magnetoelectronic device (102, 152, 452) and depositing the programming line (104, 154, 156, 454, 456).

Abstract: The invention includes a method of forming a semiconductor construction, such as an MRAM construction. A block is formed over a semiconductor substrate. First and second layers are formed over the block, and over a region of the substrate proximate the block. The first and second layers are removed from over the block while leaving portions of the first and second layers over the region proximate the block. At least some of the first layer is removed from under the second layer to form a channel over the region proximate the block. A material, such as a soft magnetic material, is provided within the channel. The invention also includes semiconductor constructions.

Abstract: A magnetic memory device includes a first wiring layer which runs in the first direction, a memory element which is arranged above the first wiring layer, second wiring layers which are arranged on the memory element and run in a second direction different from the first direction, and a first magnetic shield layer which is formed on the side surface of each second wiring layer and formed around the side surface of the memory element.

Abstract: The spacer in a spin-valve is replaced with an organic layer, allowing for numerous applications, including light-emitting structures. The invention demonstrates that the spin coherence of the organic material is sufficiently long that the carriers do not lose their spin memory even in traversing a thicker passive barrier. At least three methods to fabricate the organic spin-valve devices are disclosed, in which the difficulties associated with depositing the ferromagnetic (FM) and organic layers are addressed.

Abstract: Disclosed is a new type of magnetoresistive random-access memory (MRAM) device using a magnetic semiconductor, which is capable of achieving high-integration and energy saving in a simplified structure without any MOS transistor, based on a rectification effect derived from a p-i-n type low-resistance tunneling-magnetoresistance-effect (low-resistance TMR) diode with a structure having a p-type half-metallic ferromagnetic semiconductor, an n-type half-metallic ferromagnetic semiconductor and at least one atomic layer of nonmagnetic insulator interposed therebetween, or a rectification effect derived from a p-n type low-resistance tunneling-magnetoresistance-effect (low-resistance TMR) diode with a structure devoid of the interposed atomic layer of nonmagnetic insulator.

Abstract: According to an aspect of the present invention, there is disclosed a magnetic resistive element comprising a first magnetic layer whose magnetized state changes in accordance with data, a nonmagnetic layer disposed on the first magnetic layer, and a second magnetic layer which is disposed on the nonmagnetic layer and whose magnetized state is fixed, wherein the first magnetic layer has a cross shape in which a maximum length of a first direction is L1 and a maximum length of a second direction crossing the first direction at right angles is L2, and the second magnetic layer has a tetragonal shape in which the maximum length of the first direction is L3 (?L1) and the maximum length of the second direction is L4 (<L2).

Abstract: A semiconductor apparatus includes lower conductive film strips, an inter-layer insulating layer, implanted conductive members, and upper conductive film strips. The lower conductive film strips are formed in a pattern closely adjacent in a line width orientation, electrically separated from each other. The inter-layer insulating layer is formed the lower conductive film strips. The implanted conductive members are implanted in connection holes formed in the inter-layer insulating layer at positions corresponding to both edge sides of the lower conductive film strips. The upper conductive film strips are formed on the implanted conductive members and the inter-layer insulating layer to connect the lower conductive film strips in series so that the lower conductive film strips, the implanted conductive members, and the upper conductive film strips form an electric coil.

Abstract: A giant magnetoresistive memory device includes a magnetic sense layer, a magnetic storage layer, a non-magnetic spacer layer between the magnetic sense layer and the magnetic storage layer, and an antiferromagnetic layer formed in proximity to the magnetic storage layer. The antiferromagnetic layer couples magnetically in a controlled manner to the magnetic storage layer such that the magnetic storage layer has uniform and/or directional magnetization. Additionally or alternatively, an antiferromagnetic layer may be formed in proximity to the magnetic sense layer. The antiferromagnetic layer in proximity to the magnetic sense layer couples magnetically in a controlled manner to the magnetic sense layer such that the magnetic sense layer has uniform and/or directional magnetization.