Capacitor Patents (Class 307/109)
  • Patent number: 7215041
    Abstract: A charging circuit for a frequency converter having a first feed line with a first constant current source therein and a second feed line with a second constant current source therein. An intermediate circuit capacitor connected between the first feed line and the second feed line, wherein the first constant current source that limits a charging current of the intermediate circuit capacitor. An electronic control device that controls both the first constant current source and the second constant current source in parallel.
    Type: Grant
    Filed: September 5, 2003
    Date of Patent: May 8, 2007
    Assignee: Dr. Johannes Heidenhain GmbH
    Inventors: Norbert Huber, Franz Ritz
  • Patent number: 7109812
    Abstract: An apparatus for presenting a substantially linear capacitive output at at least one output locus in response to a voltage input at an input locus, the voltage input varying over a voltage range, includes a plurality of switching units coupled with the input locus. Each respective switching unit of the plurality of switching units is coupled with one output locus of the at least one output locus. Each respective switching unit presents a contributing capacitive output at the one output locus. The contributing capacitive output exhibits a generally linear response to the voltage input over a segment of the voltage range. All the respective switching units cooperate to establish the substantially linear capacitive output over substantially all of the voltage range.
    Type: Grant
    Filed: February 24, 2004
    Date of Patent: September 19, 2006
    Assignee: Texas Instruments Incorporated
    Inventor: Fred T. Brauchler
  • Patent number: 7109607
    Abstract: Some embodiments provide a plurality of capacitors coupled in parallel and a plurality of capacitor switches, each one of the capacitor switches coupled in series with a respective one of the plurality of capacitors. Also provided may be a plurality of control circuits, each of the plurality of control circuits coupled to a respective one of the plurality of capacitor switches, to generate a respective control voltage, and to independently set a respective one of the plurality of capacitor switches to the respective control voltage, and a plurality of control switches, each of the plurality of control switches to couple and to decouple a respective one of the plurality of control circuits to and from a control signal.
    Type: Grant
    Filed: June 23, 2003
    Date of Patent: September 19, 2006
    Assignee: Intel Corporation
    Inventor: Robert C. Glenn
  • Patent number: 7109686
    Abstract: This invention is a system and a method that uses the braking resistor, commonly used and available in electrically or hybrid-electrically propelled vehicles, to limit the precharge current during the startup of a high power ultracapacitor pack energy storage device and/or safely and rapidly discharge an ultracapacitor pack for maintenance work or storage to lengthen the life of the individual ultracapacitor cells and, correspondingly, the whole pack. The use of the braking resistor for precharging an ultracapacitor energy storage pack is an effective and less expensive method compared to other methods such as a separate DC-to-DC converter. This method includes the control logic sequence to activate and deactivate switching devices that perform the connections for the charging and discharging current paths.
    Type: Grant
    Filed: June 27, 2005
    Date of Patent: September 19, 2006
    Assignee: ISE Corporation
    Inventors: Juergen J. Schulte, Swen O. Ruppert, Eugen Holl
  • Patent number: 7064460
    Abstract: A method and apparatus for balancing a three point DC voltage intermediate circuit involves a converter circuit which influences an electrical power flow in a three point DC voltage intermediate circuit. An intermediate circuit voltage mean value is formed from a first intermediate circuit voltage across a first capacitor, and from a second intermediate circuit voltage across a second capacitor. Based on an intermediate circuit voltage mean value exceeding a threshold value, the first capacitor is connected by means of the converter circuit to an energy store, and the energy store is then connected by means of the converter circuit to the second capacitor. If the threshold value is significantly undershot, the second capacitor is connected to the energy store by means of the converter circuit, and the energy store is then connected to the first capacitor by means of the converter circuit.
    Type: Grant
    Filed: November 14, 2002
    Date of Patent: June 20, 2006
    Assignee: ABB Schweiz AG
    Inventors: Peter Daehler, Ralf Baechle
  • Patent number: 7049710
    Abstract: A monitoring system includes a power source, a power bus coupled to said power source, a plurality of power taps coupled to said power bus, each of said power taps having a ride-through capacitor operatively coupled thereto to provide power during brief interruptions in the power supply to said power bus by said power source.
    Type: Grant
    Filed: November 5, 2002
    Date of Patent: May 23, 2006
    Assignee: Square D Company
    Inventor: Mark C. Dahlman
  • Patent number: 7049713
    Abstract: A pulsed current generator circuit for providing current pulses to a device under test includes a current source for applying a current to the device under test and a controlled current shunt for shunting current from the device under test. A booster circuit is provided for supplying a booster current to the device under test when the controlled current shunt is opened and current again flows through the device under test, thereby facilitating recharge of a parasitic capacitance associated with the device under test.
    Type: Grant
    Filed: December 10, 2003
    Date of Patent: May 23, 2006
    Assignee: Qualitau, Inc.
    Inventors: Peter Cuevas, Gedaliahoo Krieger, Maurice Evans, Jens Ullmann
  • Patent number: 7031135
    Abstract: The capacitor of high thermal stability includes a high-voltage electrode (HT) extending in a longitudinal direction (AX), a cylindrical printed circuit (CI) coaxially surrounding said high-voltage electrode and including an electrically conductive track forming a low-voltage electrode (BT), and a frame (CH) having a cylindrical inside surface (SI) coaxially surrounding said cylindrical printed circuit (CI). The printed circuit is slit along a generatrix (G1) of the cylinder that it forms and it is rigidly fixed to the inside surface by a fixing point (F1, F2). The frame includes guide means (A1, A2) for holding said printed circuit (CI) near the inside surface (SI) whilst allowing it to expand along said inside surface of the frame. This provides a capacitor of high thermal stability and very simple construction which is suitable for carrying out measurements on a gas-insulated high-voltage electrical line.
    Type: Grant
    Filed: July 22, 2002
    Date of Patent: April 18, 2006
    Assignee: Alstom
    Inventors: Vladimir Gutalj, Robert Luscher, Bernard Regnier, Jean-Pierre Dupraz
  • Patent number: 6946962
    Abstract: A method and apparatus to deactivate an EAS security tag are described.
    Type: Grant
    Filed: October 29, 2003
    Date of Patent: September 20, 2005
    Assignee: Sensormatic Electronics Corporation
    Inventor: Steven V. Leone
  • Patent number: 6919119
    Abstract: An electronic or opto-electronic device or a chemical sensor comprising: an interpenetrating network of a nanostructured high surface area to volume ratio film material and an organic/inorganic material forming a nanocomposite. The high surface area to volume film material is obtained onto an electrode substrate first, such that the nano-scale basic elements comprising this film material are embedded in a void matrix while having electrical connectivity with the electrode substrate. For example, the film material may comprise an array of nano-protrusions electrically connected to the electrode substrate and separated by a void matrix. The interpenetrating network is formed by introducing an appropriate organic/inorganic material into the void volume of the high surface area to volume film material. Further electrode(s) are defined onto the film or intra-void material to achieve a certain device.
    Type: Grant
    Filed: June 8, 2002
    Date of Patent: July 19, 2005
    Assignee: The Penn State Research Foundation
    Inventors: Ali Kaan Kalkan, Stephen J. Fonash
  • Patent number: 6882064
    Abstract: Some embodiments provide a plurality of capacitors coupled in parallel, a plurality of capacitor switches, each one of the capacitor switches coupled in series with a respective one of the plurality of capacitors, one or more biasing circuits to independently set each of the plurality of capacitor switches to one of a reset voltage, a first threshold voltage, and a second threshold voltage, and a plurality of control switches, each of the control switches to couple and to decouple a respective one of the plurality of capacitor switches to and from a control voltage.
    Type: Grant
    Filed: June 23, 2003
    Date of Patent: April 19, 2005
    Assignee: Intel Corporation
    Inventor: Robert C. Glenn
  • Patent number: 6883103
    Abstract: A data carrier that communicates confidential data is configured to mask process-dependent power consumption by using power stored in an internal capacitor. The capacitor is initially charged to the voltage of an external power source, and then decoupled from the external power source. The capacitor provides power to an internal processor, and consequently discharges gradually. At the end of a given time interval, the capacitor is discharged to a fixed voltage, then charged to the supply voltage. In this manner the power consumed by charging of the capacitor is decoupled from the power consumed by the processor. If the capacitor drops below a threshold voltage before processing is completed, the processor is halted. To optimize the available processing time, the time interval before discharging the capacitor to the fixed voltage is dynamically adjusted to reduce the time that the processor is halted.
    Type: Grant
    Filed: May 30, 2001
    Date of Patent: April 19, 2005
    Assignee: Koninklijke Philips Electronics N.V.
    Inventors: Peter Thueringer, Klaus Ully, Markus Feuser
  • Patent number: 6838787
    Abstract: An integrated circuit for sampling outputs representing a pixel value comprises two first variable capacitors each having a variable range of capacitance and each for receiving the voltage representing the pixel value; two first transistors respectively connected electrically to each of the first variable capacitors for transferring the voltage to each of the variable capacitors; and a second transistor connected electrically to each of the first variable capacitors for transferring the voltage from each of the first variable capacitors.
    Type: Grant
    Filed: January 16, 2002
    Date of Patent: January 4, 2005
    Assignee: Eastman Kodak Company
    Inventor: Christopher Parks
  • Publication number: 20040256917
    Abstract: Some embodiments provide a plurality of capacitors coupled in parallel and a plurality of capacitor switches, each one of the capacitor switches coupled in series with a respective one of the plurality of capacitors. Also provided may be a plurality of control circuits, each of the plurality of control circuits coupled to a respective one of the plurality of capacitor switches, to generate a respective control voltage, and to independently set a respective one of the plurality of capacitor switches to the respective control voltage, and a plurality of control switches, each of the plurality of control switches to couple and to decouple a respective one of the plurality of control circuits to and from a control signal.
    Type: Application
    Filed: June 23, 2003
    Publication date: December 23, 2004
    Inventor: Robert C. Glenn
  • Patent number: 6809433
    Abstract: A capacitor unit with plural double layer capacitors eliminating irregularity in a state of charge of the respective double layer capacitor in the capacitor unit. A capacitor unit, a capacitor unit control method, a capacitor unit control apparatus and a vehicle charging system, wherein a chargeable and dischargeable capacitor unit 1 with plural electronic double layer capacitors 11 connected in series is characterized in that electric double layer capacitors 11 in a higher state of charge is subject to discharge so that a state of charging of the respective electric double layer capacitor 11 may become approximately equal to each other.
    Type: Grant
    Filed: July 8, 2002
    Date of Patent: October 26, 2004
    Assignee: Nisshinbo Industries Inc.
    Inventor: Ryutaro Nozu
  • Publication number: 20040195917
    Abstract: An exemplary embodiment of the present invention described and shown in the specification and drawings is a transceiver with a receiver, a transmitter, a local oscillator (LO) generator, a controller, and a self-testing unit. All of these components can be packaged for integration into a single IC including components such as filters and inductors. The controller for adaptive programming and calibration of the receiver, transmitter and LO generator. The self-testing unit generates is used to determine the gain, frequency characteristics, selectivity, noise floor, and distortion behavior of the receiver, transmitter and LO generator. It is emphasized that this abstract is provided to comply with the rules requiring an abstract which will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or the meaning of the claims.
    Type: Application
    Filed: March 9, 2004
    Publication date: October 7, 2004
    Inventors: Ahmadreza Rofougaran, Maryam Rofougaran, Shahla Khorram
  • Patent number: 6791210
    Abstract: A power delivery apparatus, system may include a series-connected plurality of energy storage devices, a voltage sensor to sense a supply voltage across a load coupled to a selected one of the plurality of storage devices, and a switch to couple and decouple various ones of the series-connected plurality of energy storage devices from the load when the supply voltage is less than or equal to a reference voltage. An article, including a machine-accessible medium, capable of directing a machine to carry out a method of delivering power may include data which directs the machine to couple each one of a series-connected plurality of energy storage elements to a power source, couple a selected one of the plurality of storage elements to a load, discharge a selected amount of energy from the selected one of the series-connected plurality of storage elements into the load, and decouple the selected one of the series-connected plurality of storage elements from the load.
    Type: Grant
    Filed: June 20, 2002
    Date of Patent: September 14, 2004
    Assignee: Intel Corporation
    Inventors: Paul E. Stevenson, Jon E. Tourville
  • Patent number: 6753623
    Abstract: A switched capacitor array circuit for use in a voltage regulator, including L, M and N banks of capacitor positions disposed intermediate an input node and a ground node, between the input and output nodes and between the output node and the ground node, respectively. Switching circuitry operates to switch three capacitors between a common phase configuration and a gain phase configuration. Two of the capacitors are disposed in one of the L, M and N banks of capacitor positions, with the third capacitor being disposed in a different one of the L, M and N banks of capacitor positions in the common phase configuration. When switched from the common phase to the gain phase configuration, at least one of the three capacitors is moved to a different capacitor position.
    Type: Grant
    Filed: December 5, 2000
    Date of Patent: June 22, 2004
    Assignee: National Semiconductor Corporation
    Inventors: William James McIntyre, Jeffrey P. Kotowski, Stephane Guenot
  • Patent number: 6737847
    Abstract: An energy accumulating capacitor such as an excimer laser is prevented from being overcharged by stored energy in a resonance inductance device. In a resonant capacitor charging circuit, when it is forecast that an energy accumulating capacitor can be charged to a target charge voltage by the magnetic energy of a resonant inductance device after a first semiconductor switch is switched off, the first semiconductor switch is switched off, and when actually reaching the target charge voltage, a second semiconductor switch is switched on or off, in order to charge with high accuracy.
    Type: Grant
    Filed: October 2, 2002
    Date of Patent: May 18, 2004
    Assignee: Origin Electric Company, Limited
    Inventors: Kiyomi Watanabe, Takayuki Mimura, Teruo Tomaki
  • Patent number: 6738273
    Abstract: At least upper order stages of a multi-stage charge pump contain respective drive signal recovery circuits, that enable the charge pump to operate over a larger voltage range and/or be driven by a very small input voltage. The switch control signal recovery circuit has an auxiliary NFET switch whose current flow path is series-coupled with a Schottky diode between the output voltage of the next lower order stage and a PFET switch drive line. The auxiliary switch controllably clamps the PFET switch drive line at a voltage that differs from the output voltage of the next lower order charge pump stage by the voltage drop across the Schottky diode. This effectively guarantees that the level-shifted line of that stage's transient clamp network will be biased to its appropriate operating voltage level, so that the clamp rail of this stage cannot hang up at a voltage level that is well below the output voltage from the next lower order stage.
    Type: Grant
    Filed: October 9, 2002
    Date of Patent: May 18, 2004
    Assignee: Intersil Americas Inc.
    Inventor: William Brandes Shearon
  • Patent number: 6737764
    Abstract: In order that the circuit arrangement ensures a high availability of the protective functions of all necessary passenger protection devices, it includes multiple double-layer capacitors connected in series and an electrolytic capacitor, which obtains its charge from the double-layer capacitors, which have a higher capacitance but a lower nominal voltage than the electrolytic capacitor. The electrolytic capacitor exclusively supplies the triggering voltage necessary for the trigger power modules of the protective devices.
    Type: Grant
    Filed: July 16, 2002
    Date of Patent: May 18, 2004
    Assignee: Robert Bosch GmbH
    Inventor: Bernhard Mattes
  • Patent number: 6713897
    Abstract: A touch switch apparatus for detecting the presence of an object such as a human appendage, the apparatus having a touch pad and a local control circuit connected to the touch pad and to a controlled device. The touch pad preferable includes a first electrode and a second electrode spaced from and surrounding the first electrode. The control circuit is preferably in integrated circuit form. A signal is provided to the touch pad to generate an electric field thereabout. Introduction of a stimulus near the touch pad disturbs the electric field. The control circuit detects the electric field disturbance in and generates a control signal in response.
    Type: Grant
    Filed: October 25, 2001
    Date of Patent: March 30, 2004
    Assignee: Touchsensor Technologies, LLC
    Inventor: David W. Caldwell
  • Publication number: 20040051391
    Abstract: An output buffer includes an output stage that includes a transconductance device configured to drive a capacitive load, and a first capacitor coupled to an input of the transconductance device. A converter converts an input clock signal into a current that is provided to charge the first capacitor during a specified interval. The converter includes a feedback loop to adjust the current so as to produce a specified logic level at the specified interval. It is emphasized that this abstract is provided to comply with the rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims.
    Type: Application
    Filed: August 30, 2002
    Publication date: March 18, 2004
    Applicant: Cadence Design Systems, Inc.
    Inventor: Timothy Glen O'Shaughnessy
  • Patent number: 6633155
    Abstract: A wireless mouse induction power supply comprises a wireless mouse and a mouse pad. The wireless mouse is installed with a first induction coil which is connected to a first capacitor of a power supply circuit in parallel as an oscillating circuit. The oscillating circuit is connected to a charging capacitor through a diode. A second coil is embedded in the mouse pad; the second coil being connected to a power wire. When power is inputted into the second coil in the mouse pad for generating electromagnetic wave, the electromagnetic wave is received by the first induction coil in the wireless mouse. The induction coil will generate an electromotive potential so as to oscillate with the first capacitor; then the potential will charge the capacitor through the diode. Then, power is outputted to a transmitter in an interior of the wireless mouse; thereby, the wireless mouse remotely controlling a computer.
    Type: Grant
    Filed: May 6, 2002
    Date of Patent: October 14, 2003
    Inventor: Hui-Pin Liang
  • Patent number: 6631081
    Abstract: A capacitive high voltage generator having a first stage and a second stage respectively formed by a first basic block and a second basic block and a third basic block. Each basic block has a timing input, a first supply input, a second supply input and an output terminal and includes: a buffer having a first terminal connected to the first supply input of the corresponding basic block, a second terminal connected to a ground terminal and an input terminal connected to the timing input of the corresponding basic block; a capacitor having a first terminal connected to an output terminal of the corresponding buffer and a second terminal connected, in a non-disconnectable way, to the output terminal of the corresponding basic block; a diode having a first terminal connected to the second supply input and a second terminal connected, in a non-disconnectable way, to the output terminal of the corresponding basic block.
    Type: Grant
    Filed: October 18, 2001
    Date of Patent: October 7, 2003
    Inventor: Luca Fontanella
  • Patent number: 6617830
    Abstract: A capacitor system suitable for charging and discharging of a vehicle such as discharging due to starting of an engine, charging by an alternator, and recharging upon braking. The capacitor system can be a vehicle power source having several connected cells in which ion conductive materials are arranged between a pair of electrode structures with large surface area materials and an electric double layer is formed between the large surface area materials in the electrode structure and an electrolyte of the ion conductive materials. Charging and discharging are controlled for state of charge of the capacitor unit with several connected modules to be within a predetermined range. A minimum charge within the predetermined range is sufficient for the engine to start while a maximum charge within the predetermined range is within a rated voltage of the capacitor unit with several connected modules.
    Type: Grant
    Filed: May 10, 2002
    Date of Patent: September 9, 2003
    Assignee: Nisshinbo Industries, Inc.
    Inventors: Ryutaro Nozu, Hisayoshi Mori, Takaya Sato
  • Patent number: 6614134
    Abstract: A voltage supply circuit for an ECU, of the type which uses a capacitor to hold charge for use in maintaining the supply during temporary supply interruptions, wherein a charge pump is provided for increasing the voltage available for charging the capacitor to a level above that of the supply to enable the stored energy of the capacitor to be boosted.
    Type: Grant
    Filed: August 22, 2000
    Date of Patent: September 2, 2003
    Assignee: Lucas Industries plc
    Inventor: Garry Raymond Davies
  • Patent number: 6608405
    Abstract: The method of obtaining the adjustable capacitor permits transforming all types of capacitors (including Electrolytic, Vacuum, Gas, high-voltage capacitors) into adjustable capacitors without mechanical parts inside capacitors and provides broad ranges of changing the capacity of adjustable capacitors in electric circuits of direct and alternating current and in all types of Marx Generators. The method comprising the steps of: choosing the capacity of one capacitor bigger and connecting said capacitor in series with at least one or two other capacitors; connecting capacitor plates of these capacitors through devices, which change their electrical states; changing the states of said devices within charging and discharging said capacitors and the step of combining plates of said capacitors which ensures the lowest cost price of manufacturing said capacitors. The present invention can be used for controlling the maximum voltage of a load and for changing motor speed.
    Type: Grant
    Filed: December 19, 1997
    Date of Patent: August 19, 2003
    Inventor: Manvel Zakharian
  • Patent number: 6593672
    Abstract: The present invention relates to a stepped micro electromechanical structure (MEMS) capacitor that is actuated by a plurality of MEMS switches. The MEMS switches may be within the stepped capacitor circuit, or they may be actuated by an independent circuit. The stepped capacitor may also be varied with intermediate steps of capacitance by providing at least one variable capacitor in the stepped MEMS capacitor structure.
    Type: Grant
    Filed: December 22, 2000
    Date of Patent: July 15, 2003
    Assignee: Intel Corporation
    Inventors: Qing Ma, Peng Cheng, Valluri Rao
  • Publication number: 20030098617
    Abstract: A method is specified for balancing a three-point DC voltage intermediate circuit (1), in which a converter circuit (2), which is connected to a first capacitor (C1) and to a second capacitor (C2) in the three-point DC voltage intermediate circuit (1), influences the electrical power flow in the three-point DC voltage intermediate circuit (1), and in which an intermediate circuit voltage mean value ({overscore (UDC)}) is formed from a first intermediate circuit voltage (UDC1), which is present across the first capacitor (C1), and from a second intermediate circuit voltage (UDC2), which is present across the second capacitor (C2).
    Type: Application
    Filed: November 14, 2002
    Publication date: May 29, 2003
    Inventors: Peter Daehler, Ralf Baechle
  • Publication number: 20030094855
    Abstract: What is described here is an array for the contact-less transmission of electrical signals or energy, respectively, from at least one transmitter to several receivers.
    Type: Application
    Filed: October 18, 2002
    Publication date: May 22, 2003
    Inventors: Georg Lohr, Herbert Weithmann, Harry Schilling
  • Patent number: 6563235
    Abstract: A capacitor array circuit having at least two capacitors, switching circuitry coupled to the capacitors and to input, output and common nodes and control circuitry. The control circuitry operates to sequentially switch the array through three different states so that a voltage is developed across each of the capacitors which is at a fixed value proportional to a voltage present at the input node. The fixed and thus determinate voltage drop across each of the capacitors operates to define voltages at any nodes intermediate the capacitors thereby, among other things, insuring reliable operation of the capacitor array circuit.
    Type: Grant
    Filed: October 3, 2000
    Date of Patent: May 13, 2003
    Assignee: National Semiconductor Corporation
    Inventors: William J. McIntyre, Jeffrey P. Kotowski
  • Patent number: 6531792
    Abstract: A DC-DC converter includes N capacitors having identical capacitances, initially coupled in series, and supplied with an external power supply voltage to be charged thereby, and an circuit for coupling the N capacitors in parallel and varying a duty ratio of a charging timing, so as to vary an internal power supply voltage which is output from the DC-DC converter.
    Type: Grant
    Filed: August 3, 2001
    Date of Patent: March 11, 2003
    Assignee: Fujitsu Limited
    Inventor: Umeo Oshio
  • Publication number: 20030043527
    Abstract: A protection device protects a terminal that can be connected to a jack connected to a local area network capable of providing a remote power feed to terminals.
    Type: Application
    Filed: July 8, 2002
    Publication date: March 6, 2003
    Applicant: ALCATEL
    Inventors: Michel Le Creff, Raymond Gass
  • Publication number: 20030020334
    Abstract: A capacitor unit with plural double layer capacitors eliminating irregularity in a state of charge of the respective double layer capacitor in the capacitor unit. A capacitor unit, a capacitor unit control method, a capacitor unit control apparatus and a vehicle charging system, wherein a chargeable and dischargeable capacitor unit 1 with plural electronic double layer capacitors 11 connected in series is characterized in that electric double layer capacitors 11 in a higher state of charge is subject to discharge so that a state of charging of the respective electric double layer capacitor 11 may become approximately equal to each other.
    Type: Application
    Filed: July 8, 2002
    Publication date: January 30, 2003
    Applicant: NISSHINBO INDUSTRIES, INC.
    Inventor: Ryutaro Nozu
  • Patent number: 6480137
    Abstract: An algorithmic procedure automatically generates layout of matched capacitor arrays used in A/D converters, D/A converters and programmable gain amplifiers, among other types of devices, using templates to define the style of the layout. Since each array can be generated from a particular template, multiple arrays associated with an IC can be optimized for different purposes to preserve silicon area. The automated technique allows fast and easy migration of an array layout from one process to another and eliminates the manual design work generally associated with capacitor array layout.
    Type: Grant
    Filed: February 28, 2001
    Date of Patent: November 12, 2002
    Assignee: Texas Instruments Incorporated
    Inventors: Sanjay S. Kulkarni, Senthil Kumar Subramanian, Ramanchandra Venkateswara Sharma
  • Patent number: 6479910
    Abstract: A switching scheme that permits a thee phase capacitor bank to have two ratings depending on whether the circuit is connected in delta or star configuration The capacitor per phase consists of two sections. In delta connection the two sections are connected in series. In the star connection the two sections are connected in parallel. Both the changes —the delta connection to the star connection of the circuit and the series connection of the capacitor sections to the parallel connection of the capacitor sections—are accomplished simultaneously by a single switching operation of three star connected switches. In the case of isolated neutral, the number of switches can be reduced from three to two.
    Type: Grant
    Filed: May 3, 2000
    Date of Patent: November 12, 2002
    Inventor: John J. Vithayathil
  • Patent number: 6458498
    Abstract: A charge containing element including a conductive layer; a dielectric layer formed on the conductive layer wherein the dielectric layer is formed by the thermal decomposition of an organic component of the dissolved metallo-organic material and a reaction of the metallic portion of the material with oxygen thereby causing the dielectric layer to have charge holding properties; and electrodes coupled to the element to permit the application or discharge of charge from the dielectric layer.
    Type: Grant
    Filed: February 26, 2001
    Date of Patent: October 1, 2002
    Assignee: Eastman Kodak Company
    Inventors: Dilip K. Chatterjee, Thomas N. Blanton, Donn B. Carlton
  • Patent number: 6456513
    Abstract: A voltage conversion circuit has an improved power efficiency and a lower power consumption is described. The voltage conversion circuit includes a plurality of voltage conversion cells, each of which includes a capacitor element. A switch circuit is connected to the plurality of voltage conversion cells to selectively switch between parallel connection of a plurality of voltage conversion cells and serial connection of a plurality of voltage conversion cells. A control circuit is connected to the switch circuit to control the switch circuit to selectively perform a first voltage conversion of an input voltage by the plurality of parallel-connected voltage conversion cells and a second voltage conversion of the input voltage by the plurality of series-connected voltage conversion cells.
    Type: Grant
    Filed: February 1, 2001
    Date of Patent: September 24, 2002
    Assignee: Fujitsu Limited
    Inventor: Syuichi Saito
  • Publication number: 20020109414
    Abstract: A capacitive load driving unit includes a plurality of capacitive loads, a drive circuit for charging and discharging the capacitive loads, a pair of power lines for supplying a drive voltage from an external power source to the drive circuit, and a current reserve circuit for reserving a current required by the drive circuit for charging the capacitive loads. Particularly, the current reserve circuit includes a capacitor that is charged by the drive voltage from the power lines, and a coupler section for coupling the capacitor between the power lines except for a defect inspection.
    Type: Application
    Filed: August 11, 1999
    Publication date: August 15, 2002
    Inventors: NOBORU NITTA, JUN TAKAMURA, SHUNICHI ONO
  • Publication number: 20020109415
    Abstract: A switched capacitor array circuit and method, with the array circuit being coupled between an input node and an output node and which is capable of providing multiple gain states. The array circuit includes an L band of capacitor positions disposed between the input node and a third node, typically the circuit common, an M bank of capacitor positions coupled between the input and output nodes and an N bank of capacitor positions coupled between the output node and the third node. Each of the L, M and N banks of capacitor positions includes series and parallel capacitor positions. In one embodiment, the array includes first, second and third capacitors together with switching circuitry and control circuitry. The control circuitry causes the switching circuitry to switch the array circuit between a common phase configuration and a gain phase configuration so as to provide a gain state value Gsc.
    Type: Application
    Filed: December 5, 2000
    Publication date: August 15, 2002
    Inventors: William James McIntyre, Jeffrey P. Kotowski, Stephane Guenot
  • Patent number: 6424058
    Abstract: The invention relates to a testable on-chip capacitor cell 10 including a decoupling capacitor (Ci) which can be disconnected from the power distribution network and discharged through a cell internal discharge circuit. An externally controllable switch (Si) connects in a first switching position the decoupling capacitor to the power supply system and disconnects in a second switching position the decoupling capacitor from the power supply system and connects it to a resistor (Ri) which is part of the discharge circuit. An off-chip control unit (16) is provided for toggling the switch with a frequency fT between its first and second position to perform a capacitor test operation. By a current measurement device the averaged power supply current demand of the decoupling capacitor is measured when switch (Si) is toggled. The actual capacity of the decoupling capacitor is determined as a function of the power supply voltage, of the switch toggling frequency (fT) and of the averaged power supply current measured.
    Type: Grant
    Filed: September 28, 2000
    Date of Patent: July 23, 2002
    Assignee: International Business Machines Corporation
    Inventors: Roland Frech, Erich Klink, Jochen Supper
  • Patent number: 6418040
    Abstract: An apparatus comprising a circuit configured to generate an output voltage having a magnitude greater than a supply voltage, where the output voltage is (i) a positive high voltage when a first input is in a first state and a second input is in a second state and (ii) a negative high voltage when the first input is in the second state and the second input is in the first state.
    Type: Grant
    Filed: April 9, 2001
    Date of Patent: July 9, 2002
    Assignee: Cypress Semiconductor Corp.
    Inventor: Anita Meng
  • Publication number: 20020079743
    Abstract: The present invention relates to a stepped micro electromechanical structure (MEMS) capacitor that is actuated by a plurality of MEMS switches. The MEMS switches may be within the stepped capacitor circuit, or they may be actuated by an independent circuit. The stepped capacitor may also be varied with intermediate steps of capacitance by providing at least one variable capacitor in the stepped MEMS capacitor structure.
    Type: Application
    Filed: December 22, 2000
    Publication date: June 27, 2002
    Inventors: Qing Ma, Peng Cheng, Valluri Rao
  • Patent number: 6373152
    Abstract: An electricity storage device and a portable electric-powered tool. The device comprises at least a battery; at least a super capacitor, which has lower internal impedance, when fully charged, than that of the battery and connects the battery in parallel; and an output end for supplying the electricity. The super capacitor is the major power supply for the pulse current output; the battery is used for generating electricity to the super capacitor and is the secondary power supply for the pulse current output. The connection of the battery and the super capacitor does not need any converters or current-limiting resistors.
    Type: Grant
    Filed: February 9, 2000
    Date of Patent: April 16, 2002
    Assignee: Synergy Scientech Corp.
    Inventors: Pei-Jen Wang, Shun-Ming Huang, Wei-Chen Wu
  • Publication number: 20020033644
    Abstract: When charging the capacitive element by driving opposed electrodes of an electrostatic capacitance of the capacitive element, the capacitive element is charged, with one of driving circuits set in a high impedance state, the one of the driving circuits varying a potential of one of the electrodes, and then the capacitive element is charged, with the one of the driving circuits set in a low impedance state. When discharging the capacitive element by driving the opposed electrodes of the electrostatic capacitance of the capacitive element, the capacitive element is discharged, with one of driving circuits set in the high impedance state, the one of the driving circuits varying a potential of one of the electrodes, and then the capacitive element is discharged, with the one of the driving circuits set in the low impedance state.
    Type: Application
    Filed: September 13, 2001
    Publication date: March 21, 2002
    Applicant: Toshiba Tec Kabushiki Kaisha
    Inventors: Jun Takamura, Noboru Nitta, Shunichi Ono
  • Patent number: 6355992
    Abstract: A high voltage pulse generator provides a short, fast rise, high voltage pulse from a very low impedance suitable for initiating high energy electrical discharges in liquids and high pressure gases. Its low impedance allows extremely high currents from external energy storage capacitors to be conducted through the invention once the invention has initiated an arc. Its fast rise time is suitable for initiating multiple arcs or even sheet surface discharges in high pressure gasses under suitable conditions.
    Type: Grant
    Filed: August 11, 1999
    Date of Patent: March 12, 2002
    Assignee: Utron Inc.
    Inventor: Lester C. Via
  • Patent number: 6326772
    Abstract: A power supply apparatus 200 comprises an energy supplying circuit 210 for supplying energy at a predetermined timing, and an energy preserving circuit 220 for receiving the energy supplied from the energy supplying circuit 210 and preserving the energy. The energy preserving circuit 220 includes an inductor 221, a capacitance 223 connected to one end of the inductor 221 at a node 222, and a capacitance 225 connected to the other end of the inductor 221 at a node 224. Energy is supplied to a load via at least one of the node 222 and the node 224.
    Type: Grant
    Filed: December 12, 2000
    Date of Patent: December 4, 2001
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Keiichi Kusumoto, Akira Matsuzawa
  • Patent number: RE38918
    Abstract: A system and method for efficiently charging and discharging a capacitive load from a single voltage source. The system includes a brat switch for selectively connecting the voltage source to the load and a second switch for selectively providing a short across the load as may he common in the art. A particularly novel aspect of the invention resides in the provision of plural capacitive elements and a switching mechanism for selectively connecting each of the capacitive elements to the load whereby the load is gradually charged or discharged. In the illustrative embodiment, the switching mechanism includes a set of switches for selectively connecting each of the capacitive elements to the capacitive load and a switch control mechanism for selectively activating the switches.
    Type: Grant
    Filed: January 10, 2001
    Date of Patent: December 13, 2005
    Assignee: University of Southern California
    Inventors: Lars G. Svensson, William C. Athas, Jeffrey G. Koller
  • Patent number: RE37552
    Abstract: A system and method for efficiently charging and discharging a capacitive load from a single voltage source. The system includes a first switch for selectively connecting the voltage source to the load and a second switch for selectively providing a short across the load as may be common in the art. A particularly novel aspect of the invention resides in the provision of plural capacitive elements and a switching mechanism for selectively connecting each of the capacitive elements to the load whereby the load is gradually charged or discharged. In the illustrative embodiment, the switching mechanism includes a set of switches for selectively connecting each of the capacitive elements to the capacitive load and a switch control mechanism for selectively activating the switches.
    Type: Grant
    Filed: December 5, 1997
    Date of Patent: February 19, 2002
    Assignee: University of Southern California
    Inventors: Lars Svensson, William C. Athas, Jeffrey G. Koller