Parallel-charge, Series-discharge (e.g., Voltage Doublers) Patents (Class 307/110)
  • Patent number: 4727262
    Abstract: A multiconcentric coaxial cable uses three or more concentric cables to supply power to a high voltage laser with reduced waveform degradation otherwise produced by stray capacitance and inductance. Each pair of concentric conductors is in itself a coaxial line and the radius of each conductor is selected such that the characteristic impedances of the two lines it forms with the adjacent conductors are equal. Each line is charged with a polarity opposite to the adjacent lines. Polarity inverting switches are connected across the lines charged to the polarity opposite to the desired output polarity at the end of the cable opposite from the load connection. The load is connected to the outermost cable conductor of the cable. When the switches are closed the polarity of the cable sections to which they are connected reverse and the sum of the voltages on all the cable sections is applied to the self-breaking gap causing it to close and connect the load.
    Type: Grant
    Filed: August 13, 1986
    Date of Patent: February 23, 1988
    Assignee: The United States of America as represented by the Secretary of the Air Force
    Inventor: James P. O'Loughlin
  • Patent number: 4724362
    Abstract: A light source including a spiral line pulse generator having an output coupled to one electrode of a high pressure discharge lamp and having an input for coupling to a source of lamp operating power for providing high voltage lamp starting pulses. This pulse generator includes, in addition to a spiral line generator, a solid state electronic switch in combination with an inductor. The electronic switch and inductor are connected in series between the conductors of the spiral line pulse generator for multiple discharge of the spiral line pulse generator to provide multiple high voltage pulses during each half cycle of lamp operating power to initiate discharge in the high pressure discharge lamp.
    Type: Grant
    Filed: December 23, 1985
    Date of Patent: February 9, 1988
    Assignee: GTE Products Corporation
    Inventor: James N. Lester
  • Patent number: 4680509
    Abstract: A light source including a spiral line pulse generator having an output coupled to one electrode of a high pressure discharge lamp and having an input for coupling to a source of lamp operating power for providing high voltage lamp starting pulses. The pulse generator includes, in addition to a spiral line circuit, a solid state electronic switch for discharging the spiral line pulse generator and a ballast capacitor connected in series with the solid state switch. The spiral line pulse generator preferably has a magnetic core associated therewith for increasing the spiral line inductance.
    Type: Grant
    Filed: December 23, 1985
    Date of Patent: July 14, 1987
    Assignees: GTE Laboratories, Inc., GTE Products Corporation
    Inventors: Charles N. Fallier, Jr., James N. Lester
  • Patent number: 4679134
    Abstract: A monolithic integrated circuit containing an inverting/non-inverting voltage doubler charge pump circuit is disclosed for converting a unipolar supply voltage to a bipolar supply voltage of a greater magnitude. The unipolar input voltage is placed across a first external transfer capacitor by a first set of MOS switches during a first time period. The unipolar input voltage source is placed in series with the first transfer capacitor and this series combination of voltages is placed across a first external reservoir capacitor by a second set of MOS switches during a second time period. The voltage appearing across the first external reservoir capacitor is placed on a second transfer capacitor during the first time period by a third set of MOS switches. The voltage across the second transfer capacitor is placed into a second external reservoir capacitor with its polarity inverted by a fourth set of MOS switches during the second time period.
    Type: Grant
    Filed: June 25, 1986
    Date of Patent: July 7, 1987
    Assignee: Maxim Integrated Products, Inc.
    Inventors: David Bingham, Charles M. Allen
  • Patent number: 4667280
    Abstract: A step-up rectifier circuit includes first and second input terminals for applying AC outputs of opposite polarities, a third input terminal connected between the first and second input terminals, a plurality of rectifier elements connected between the third input terminal and a first output terminal, a plurality of output capacitors connected in parallel to the rectifier elements, a second output terminal connected to a node between said output capacitors, a plurality of first capacitors connected between nodes between those of said rectifying elements located between the first output terminal and the second output terminal and a plurality of second capacitors connected between nodes between those of the rectifying elements which are between the second output terminal and the third input terminal, wherein the capacitance of the capacitors is defined such that the output voltages at individual output terminals can be made constant, regardless of whether other output terminals are loaded or unloaded.
    Type: Grant
    Filed: October 25, 1984
    Date of Patent: May 19, 1987
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yoshio Takamura, Akira Nakajima
  • Patent number: 4656574
    Abstract: There is disclosed a logic signal multiplier circuit which includes the interconnection of a plurality of inverters having outputs interconnected by a capacitor. Each of the inverters includes complementary transistors having their gates connected to a common terminal such that each inverter may be controlled by a separate clock control signal. The control signals are coupled to provide a three-phase operation of the circuit which insures (1) charging of the capacitor between the outputs of the inverters during a first time period, (2) an increase of the voltage at a node of one of the inverters to a value which is twice the value of the supply voltage driving the inverters during a second time period, and (3) coupling of that same node to ground during a third time period. Diodes are interconnected in each of the inverter circuits to prevent discharge of the capacitor during times that selected ones of the transistors forming the inverter circuits are conductive.
    Type: Grant
    Filed: September 17, 1984
    Date of Patent: April 7, 1987
    Assignee: Centre Electronique Horloger
    Inventor: Francois H. Salchli
  • Patent number: 4645941
    Abstract: This pulse generator which is of the Marx generator type and is applicable to obtaining high pulse voltages cmprises n+1 capacitors connected n parallel by resistors and spark gap switches for discharging said capacitors into a load circuit, in such a way that if V is the charging voltage of the capacitors, the voltage applied to the load circuit is equal to (n+1)V. This generator is characterized in that the capacitors and spark gap switches form a stack of circular plates, which are provided with axial openings. These plates and the resistors are located in a tight enclosure containing a gas aiding the priming of the spark gap switches, which is triggered by the radiation of a source passing through the opening.
    Type: Grant
    Filed: August 14, 1985
    Date of Patent: February 24, 1987
    Assignee: Commissariat a l'Energie Atomique
    Inventor: Andre Nicolas
  • Patent number: 4636705
    Abstract: A switching circuit that utilizes an N-channel field effect transistor. The circuit can be used in a generator voltage regulator wherein the drain and source of the transistor are connected in series with the field winding of the generator. The circuit includes a capacitor that is repetitively charged and discharged. At the end of the charge period a gate bias voltage is developed that is applied to the gate of the transistor. The magnitude of the gate bias voltage that is developed is the sum of the capacitor voltage and the voltage of a voltage source. The capacitor is allowed to discharge until the gate bias voltage decreases to a value that is high enough to maintain the transistor conductive whereupon the discharge period is terminated and the capacitor is recharged.
    Type: Grant
    Filed: January 13, 1986
    Date of Patent: January 13, 1987
    Assignee: General Motors Corporation
    Inventor: William E. Bowman
  • Patent number: 4636930
    Abstract: A monolithic integrated circuit containing an inverting/non-inverting voltage doubler charge pump circuit is disclosed for converting a unipolar supply voltage to a bipolar supply voltage of a greater magnitude. The unipolar input voltage is placed across a first external transfer capacitor by a first set of MOS switches during a first time period. The unipolar input voltage source is placed in series with the first transfer capacitor and this series combination of voltages is placed across a first external reservoir capacitor by a second set of MOS switches during a second time period. The voltage appearing across the first external reservoir capacitor is placed on a second transfer capacitor during the first time period by a third set of MOS switches. The voltage across the second transfer capacitor is placed into a second external reservoir capacitor with its polarity inverted by a fourth set of MOS switches during the second time period.
    Type: Grant
    Filed: October 1, 1985
    Date of Patent: January 13, 1987
    Assignee: Maxim Integrated Products, Inc.
    Inventors: David Bingham, Charles M. Allen
  • Patent number: 4633168
    Abstract: By simultaneously charging a pair of capacitors from the same low voltage level to the same high reference voltage level, the two charge time durations will be functions of and will be proportional to the capacitances of the two capacitors. A comparison of those charge time durations will thus provide an indication of the ratio of the capacitances of the two capacitors. This is achieved by including, in the measuring system, an oscillating circuit whose frequency is determined by the capacitance of one of the capacitors. A periodically-recurring rectangular wave is then developed having pulse components with pulse widths determined by the capacitance of the other capacitor, the frequency of the rectangular wave being equal to the oscillating frequency. The duty cycle of the rectangular wave is therefore proportional to and respresents the ratio of the capacitances of te capacitors.
    Type: Grant
    Filed: November 30, 1984
    Date of Patent: December 30, 1986
    Assignee: Borg-Warner Corporation
    Inventor: Harry J. Venema
  • Patent number: 4621227
    Abstract: By simultaneously charging a pair of capacitors to the same d-c voltage and then simultaneously discharging those capacitors to the same d-c reference voltage, the two discharge time durations will be functions of and will be proportional to the capacitances of the two capacitors. A comparison of those discharge time durations will thus provide an indication of the ratio of the capacitances of the two capacitors. This is achieved by including, in the measuring system, an oscillating circuit whose frequency is determined by the capacitance of one of the capacitors. A periodically-recurring rectangular wave is then developed having pulse components with pulse widths determined by the capacitance of the other capacitor, the frequency of the rectangular wave being equal to the oscillating frequency. The duty cycle of the rectangular wave is therefore proportional to and represents the ratio of the capacitances of the capacitors.
    Type: Grant
    Filed: February 29, 1984
    Date of Patent: November 4, 1986
    Assignee: Borg-Warner Corporation
    Inventor: Harry J. Venema
  • Patent number: 4616303
    Abstract: A circuit for voltage multiplication has a capacitor which is connectible via first switching transistors to a supply voltage source and via further first switching transistors in series with the supply voltage source and with a storage capacitor which is connected in parallel to the circuit output. Clock voltages for driving the first switching transistors are switchable in amplitude from a value corresponding to the supply voltage to the value corresponding to the output voltage. In order to achieve high efficiency of the circuit, a clock voltage generator is controllable for amplitude switch over via a supply line which is connectible via a second switching transistor to the supply voltage source and is connectible via a third switching transistor to the circuit output, whereby these switching transistors are driven via the outputs of the comparator which compares the supply voltage to the output voltage. The circuit may advantageously be employed in hearing aid circuits.
    Type: Grant
    Filed: June 25, 1984
    Date of Patent: October 7, 1986
    Assignee: Siemens Aktiengesellschaft
    Inventor: Manfred Mauthe
  • Patent number: 4573006
    Abstract: Alternate polarity pulses of current are fed to a load L1A by charging a capacitor C5A alternately in different directions and closing unidirectional switches V2A and V3A at appropriate times to discharge the capacitor C5A through the inductor L1A. This arrangement is considered superior to an alternative system in which different capacitors are charged with different polarities to produce the different pulses. In the latter system the arrangement of switches needs to be such that the closing of one produces transient voltages which might cause the other switch to operate when it is not required to do so. In the illustrated system the switches V2A and V3A, being connected in parallel, do not suffer from this problem. In an alternative system the switches V2A and V3A could be replaced by a single bi-directional switch.
    Type: Grant
    Filed: June 10, 1983
    Date of Patent: February 25, 1986
    Assignee: English Electric Valve Company Limited
    Inventor: Barry P. Newton
  • Patent number: 4559483
    Abstract: The actuation speed of an electromagnetic consumer is increased by means of a charged capacitor which is connected in series with a consumer at such a polarity that its voltage is added to that of the power source. In one embodiment, the capacitor is switched across the power source until it is charged and then it is connected in series with the consumer at such a polarity that its positive pole is grounded while the negative pole is connected to the consumer. In another embodiment, the capacitor is first charged through the electromagnetic consumer and then it is connected with its positive pole to ground and with its negative pole to the consumer.
    Type: Grant
    Filed: June 22, 1984
    Date of Patent: December 17, 1985
    Assignee: Robert Bosch GmbH
    Inventors: Werner Jundt, Wolfgang Kosak, Peter Werner
  • Patent number: 4554622
    Abstract: A plurality of stages of capacitors and diodes interconnected in a parallel wired Cockcroft-Walton multiplier circuit, wherein capacitors in successive stages of the circuit are constructed of reduced physical size as compared with preceding stages, corresponding to reduced capacitor voltage ratings, to provide a cascade multiplier circuit of reduced total length.
    Type: Grant
    Filed: September 22, 1983
    Date of Patent: November 19, 1985
    Assignee: Graco Inc
    Inventors: Gordon V. Mommsen, Dale R. Hemming
  • Patent number: 4524289
    Abstract: A power supply circuit for a flash lamp delivers energy to the lamp in increments rather than in the conventional single charging pulse. A dc voltage power supply is used which has a voltage output considerably higher than the normal lamp voltage. The power supply output is connected across at least two circuits which are adapted to charge to some small increment of the total lamp energy requirements and then to discharge the stored energy into the lamp. Each circuit which contains a low value capacitor is cyclically connected between the lamp and the dc supply so as to create a continuous series of incremental inputs to the lamp, the inputs terminating when the desired lamp energy output is achieved.
    Type: Grant
    Filed: April 11, 1983
    Date of Patent: June 18, 1985
    Assignee: Xerox Corporation
    Inventors: Thomas J. Hammond, William L. Lama
  • Patent number: 4523269
    Abstract: A DC to N phase AC converter, where N is an integer greater than 2, includes a DC source having first and second terminals for deriving equal amplitude opposite polarity DC voltages, a series resonant circuit, and N output terminals, one for each phase of the converter. The series resonant circuit is selectively connected in series with the first and second terminals and the N output terminals for an interval equal to one half cycle of the resonant circuit resonant frequency, so that current flows between a selected one of the first and second terminals and the resonant circuit and a selected one of the N output terminals during the interval. The resonant circuit current is zero at the beginning and end of the interval. A capacitor shunting each of the output terminals has a value relative to the capacitance of the series resonant circuit such that the voltage across each output terminal remains approximately constant between adjacent exchanges of energy between the resonant circuit and the output terminal.
    Type: Grant
    Filed: November 16, 1983
    Date of Patent: June 11, 1985
    Assignee: Reliance Electric Company
    Inventors: Richard H. Baker, David L. Chu, Derek Chambers
  • Patent number: 4485433
    Abstract: Disclosed is an on-chip, dual polarity high voltage multiplier circuit consisting of a main high positive voltage multiplier and high negative voltage multiplier and an auxiliary high negative voltage multiplier coupled to the main multipliers to prevent turning on of parasitic transistors associated with the MOS diodes of the main multipliers and thereby extend the operating temperature range to 150.degree. C. and improve the fall time of the dual polarity multiplier. The auxiliary multiplier may be located in a common p-well with the main positive and negative multipliers or with the main negative multiplier and its output voltage is connected to this common well.
    Type: Grant
    Filed: December 22, 1982
    Date of Patent: November 27, 1984
    Assignee: NCR Corporation
    Inventor: James A. Topich
  • Patent number: 4460952
    Abstract: A rectifier/multiplier/level shifter utilizing multiple capacitors which are switched from parallel to series or vice versa. An analog signal is communicated to a plurality of capacitors in parallel which are subsequently connected in series by selective switching. Depending upon the sign of the analog signal, taps are made on the capacitors so as to rectify the incoming analog signal. In a similar fashion a tap utilizes the serial multiplication of the capacitors so as to create a multiplier circuit. This particular architecture is particularly well suited for a metal-oxide-silicon (MOS) embodiment.
    Type: Grant
    Filed: May 13, 1982
    Date of Patent: July 17, 1984
    Assignee: Texas Instruments Incorporated
    Inventor: Vance Risinger
  • Patent number: 4451743
    Abstract: A DC-to-DC voltage converter is disclosed for converting the voltage from a battery to provide a power supply voltage whose value can be equal to the battery voltage multiplied by or divided by a non-integral factor, e.g. 2/3. The converter operates on the principle of capacitor charge switching, and high conversion efficiency is achieved in operation at very low levels of supply current, such as are utilized in an electronic timepiece.
    Type: Grant
    Filed: December 9, 1981
    Date of Patent: May 29, 1984
    Assignee: Citizen Watch Company Limited
    Inventors: Fuminori Suzuki, Singo Ichikawa
  • Patent number: 4398120
    Abstract: A direct current supply, making it possible to produce a number of separate regulated voltages from a single regulated supply, constituted by a voltage multiplier with cascade-connected doubler stages. One of the doubler stages, preferably the first, supplies by the connection point of its two rectifiers at least one circuit for generating a complementary d.c. voltage. This generator circuit comprises a variable capacitor connected downstream to two oppositely connected diodes and connected to earth or to a fixed d.c. potential, one directly and the other across a resistor and a capacitor connected in parallel.
    Type: Grant
    Filed: April 10, 1981
    Date of Patent: August 9, 1983
    Assignee: Thomson-CSF
    Inventor: Jean Pierre Guillon
  • Patent number: 4385223
    Abstract: A signal conditioning circuit for providing a DC voltage to an arc voltage controller for controlling the length of an AC arc of a gas tungsten arc welder. Specifically, a first control circuit is employed which charges to a first value by a signal of a given polarity of one cycle of the AC arc for providing a DC voltage and an additional control circuit is employed for rapidly discharging the first control circuit when the maximum absolute amplitude of a signal of a given polarity of a subsequent cycle of the AC arc is less than the DC voltage provided by the first control circuit. The first control circuit is charged to a higher second value when the maximum absolute amplitude of a signal of a given polarity of a subsequent cycle of the AC arc is greater than the DC voltage provided by the first control circuit.
    Type: Grant
    Filed: July 25, 1980
    Date of Patent: May 24, 1983
    Assignee: Cyclomatic Industries, Inc.
    Inventor: James M. Thommes
  • Patent number: 4383294
    Abstract: A voltage doubler power supply for deriving power from a unidirectional source, including a driver and means preventing current flow until after a first positive alternation of the driver.
    Type: Grant
    Filed: April 23, 1981
    Date of Patent: May 10, 1983
    Inventor: Peter H. Van Sloun
  • Patent number: 4375594
    Abstract: Thyratrons are used as the switching devices for connecting capacitive storage devices in series after they have been charged in parallel. In the preferred embodiment, the capacitive device is placed before the thyratron in each stage, so that the output pulse is of the same polarity. The inductors connected to the cathodes have secondary windings to form transformers, for triggering the thyratrons of the following stages.
    Type: Grant
    Filed: January 12, 1981
    Date of Patent: March 1, 1983
    Assignee: The United States of America as represented by the Secretary of the Army
    Inventor: Theodore F. Ewanizky, Jr.
  • Patent number: 4324216
    Abstract: An electronic advance and ignition control system incorporating the advance utilizes a fixed advance threshold compared with amplitude of an RPM sensitive input waveform from a distributor in combination with a timing circuit, which establishes a predetermined RPM rate above which the advance operates. The electronic advance accurately duplicates the function of conventional centrifugal and vacuum and advance retard mechanisms in controlling timing of an ignition coil drive signal. The electronic advance is provided as part of an ignition control integrated circuit which can operate in a stand alone mode or share control of the ignition system with a microprocessor through interface circuits also forming part of the integrated circuit.
    Type: Grant
    Filed: January 9, 1980
    Date of Patent: April 13, 1982
    Assignee: Fairchild Camera & Instrument Corp.
    Inventors: Nicky M. Johnson, Lawrence M. Blaser
  • Patent number: 4321661
    Abstract: An NMOS FET circuit for charging a storage capacitor to a voltage higher than the power supply voltage. The circuit includes several stages each including a capacitance and FET switches. In response to a high level control signal the FET's in effect connect each capacitance between the supply voltage and ground to charge the capacitances. Then, in response to a low level control signal the FET's in effect connect the capacitances in series between the supply voltage and the storage capacitor thus transferring a portion of the charges in the capacitances into the storage capacitor. The charge placed in the storage capacitor produces a voltage thereacross which is greater than the supply voltage.
    Type: Grant
    Filed: December 23, 1980
    Date of Patent: March 23, 1982
    Assignee: GTE Laboratories Incorporated
    Inventor: Jun-ichi Sano
  • Patent number: 4242739
    Abstract: In a memory system where certain memory systems a signal detector is provided which begins to detect the voltage of a data line to which a plurality of memory cells are connected when the voltage of a latch node of the detector is shifted from a first to a second level by discharging the node through a switch in response to an input signal provided by a pulse circuit. To avoid discharging the node at an improper time, a signal transformation circuit is interposed between the pulse circuit and the switch to provide the switch with a signal to turn it on only when the level of the signal provided by the pulse circuit is high enough. In this manner, improper discharging due to shifts in the pulse circuit can be avoided.
    Type: Grant
    Filed: April 2, 1979
    Date of Patent: December 30, 1980
    Assignee: Hitachi, Ltd.
    Inventors: Ryoichi Hori, Kiyoo Itoh
  • Patent number: 4149232
    Abstract: Voltage boosting circuits of a type using a plurality of inverters with parallelled inputs, each inverter arranged to pump charge into a respective pair of booster capacitors--rather than one respective booster capacitor--to develop an output voltage in each stage which is doubled in amplitude over the voltage used to power the inverter in that stage. To this end, the inverter in each successive stage of the voltage boosting circuit is powered by the output voltage of the preceding stage.
    Type: Grant
    Filed: December 16, 1977
    Date of Patent: April 10, 1979
    Assignee: RCA Corporation
    Inventor: Sargent S. Eaton, Jr.
  • Patent number: 4095162
    Abstract: A capacity changer device in which there is a first capacitor means of the 1-terminal capacitor type, and an enclosing hollow metal sphere enclosing the first capacitor means which may be spaced therefrom and being itself a 1-terminal capacitor with a current power supply for energizing a number of evacuated glass tubes containing an ionizable gas and forming part of the first capacitor means. It includes a second power suppy for direct current for charging the first capacitor means and connected also to the metal sphere for combining the charge to form a combination with the sphere of a change to a 2-terminal capacitor.
    Type: Grant
    Filed: November 3, 1975
    Date of Patent: June 13, 1978
    Inventor: Joseph Herman Arnold Peter Hiddink
  • Patent number: 4080647
    Abstract: A voltage multiplier cascade assembly contains diodes and two capacitor blocks. The capacitor blocks are severed from a mother capacitor and subdivided by way of slots through the Schoop layers and the capacitance-effective areas of the capacitor to form a row of intergrally interconnected layer capacitors having several contact surfaces. The diodes are placed between the capacitor blocks to improve heat disipation and enhance the screening of interference radiation from the diodes. Connections are affected by a metal mounting lattice having terminal plates and contact strips. The entire assembly is cast in a cup and preferably serves for use in television apparatus.
    Type: Grant
    Filed: July 15, 1976
    Date of Patent: March 21, 1978
    Assignee: Siemens Aktiengesellschaft
    Inventors: Ludwig Berg, Ferdinand Utner
  • Patent number: 4063161
    Abstract: A fault locator of the earth potential gradient type for locating faults in underground, unshielded, insulated, electrical power cables includes a high voltage pulsing unit for generating and applying high voltage pulses to a faulted power cable. The pulses pass through the power cable, out of the electrical fault, through the earth and back to the pulsing unit. The passage of the pulses through the earth forms potential differences between locations in the earth. These potential differences are monitored by a monitoring unit formed by a fault locator meter and a pair of probes inserted into the earth. The fault locator meter includes a galvanometer for indicating the potential differences and a control circuit that has high gain, automatic gain control, automatic needle centering, automatic earth potential offset compensation and a momentary contact switch to reduce the power drain.
    Type: Grant
    Filed: April 14, 1975
    Date of Patent: December 13, 1977
    Assignee: Joslyn Mfg. and Supply Co.
    Inventor: Robert J. Pardis
  • Patent number: 4058814
    Abstract: An electrographic writing system including an electrographic writing head operatively connected to a switching system is disclosed. The electrographic writing head includes a plurality of electrically conducting styluses arranged to produce an electrostatic charge on a record medium which is normally dielectric coated paper. The styluses are supported by an insulating material, and one of the ends of each of the styluses is either substantially flush with one end of the writing head or slightly recessed. The other ends of the styluses act as part of a connecting means to the switching system. The switching system includes a plurality of diode assemblies. Each diode assembly has a sequence of diode switching circuits including a first high stored charge or slow diode, a second low stored charge or fast diode in series therewith and a capacitor. The capacitor has one end connected between the diodes and the other end to ground or a dynamic voltage.
    Type: Grant
    Filed: March 29, 1976
    Date of Patent: November 15, 1977
    Assignee: Gould, Inc.
    Inventors: Arling Dix Brown, Jr., Edward Justus Reilly
  • Patent number: 4010535
    Abstract: A voltage multiplier circuit assembly circuit is fabricated by the use of an apparatus which comprises a pair of guide walls juxtaposed on a horizontal insulative support, each of the guide walls having first and second slits in opposed relation to the corresponding slits in the other. The guide walls define a first and a second area and an intermediate area therebetween. Condensers of the wafer type is placed alternately on the first and second areas with one of their electrodes facing downward. Diodes having a pair of connecting leads are placed on the intermediate area alternately with the condensers and alternately through the first and second opposed slits. Conductive cementing agent is applied between the contact points of the condensers and diodes.
    Type: Grant
    Filed: October 29, 1974
    Date of Patent: March 8, 1977
    Assignee: Victor Company of Japan, Limited
    Inventors: Hideo Hishiki, Shiyousaku Yamaguchi, Akihisa Miyazaki
  • Patent number: 4011463
    Abstract: An improved high-voltage pulse generator has been provided which is especially useful in ultrasonic testing of rock core samples. An N number of capacitors are charged in parallel to V volts and at the proper instance are coupled in series to produce a high-voltage pulse of N times V volts. Rapid switching of the capacitors from the paralleled charging configuration to the series discharging configuration is accomplished by using silicon-controlled rectifiers which are chain self-triggered following the initial triggering of a first one of the rectifiers connected between the first and second of the plurality of charging capacitors. A timing and triggering circuit is provided to properly synchronize triggering pulses to the first SCR at a time when the charging voltage is not being applied to the parallel-connected charging capacitors.
    Type: Grant
    Filed: June 12, 1975
    Date of Patent: March 8, 1977
    Assignee: The United States of America as represented by the United States Energy Research and Development Administration
    Inventor: George E. Fasching
  • Patent number: 4005314
    Abstract: A device for achieving a narrow high voltage output pulse having a rise t essentially limited only by the rise time of the switching means.
    Type: Grant
    Filed: July 11, 1975
    Date of Patent: January 25, 1977
    Assignee: The United States of America as represented by the Secretary of the Army
    Inventor: Mortimer H. Zinn
  • Patent number: 4000412
    Abstract: Circuits for generating pulsating potentials and voltage levels outside the range of, and/or of greater magnitude than, the operating potential applied to the circuits. Each circuit includes first and second transistors for applying a first voltage to one plate of a capacitor and a second voltage to the other plate of the capacitor, during one time interval. During a subsequent time interval, the first and second transistors are turned off and a third transistor applies the second potential to the one plate of the capacitor. The change in the potential at the one plate of the capacitor is coupled to the other plate of the capacitor at which is produced an output potential outside the range of the first and second voltages. The potential difference between the first voltage and the output potential is greater in amplitude than the potential difference between the first and second voltages.
    Type: Grant
    Filed: May 19, 1975
    Date of Patent: December 28, 1976
    Assignee: RCA Corporation
    Inventors: Bruce David Rosenthal, Andrew Gordon Francis Dingwall
  • Patent number: 3997832
    Abstract: A booster circuit applies a high voltage to a load for starting or energizing the load which is operated at a steady voltage once it has started. The booster circuit comprises a power source, a diode or a resistor provided in forward direction with respect to the power source, a first switch and a load. The booster circuit further comprises a capacitor which is charged by said power source through said diode when said first switch is opened and a second switch which is actuated upon closure of said first switch to connect said capacitor in parallel to said diode so that said diode is reversely biased by said capacitor.
    Type: Grant
    Filed: July 9, 1975
    Date of Patent: December 14, 1976
    Assignee: Nippon Kogaku K.K.
    Inventors: Hiroaki Tanaka, Osamu Maida
  • Patent number: 3975671
    Abstract: A CMOS circuit for approximately tripling battery voltage particularly adaptable for use with liquid crystal displays such as used in watches. P-wells of the CMOS circuit are coupled to active circuit nodes rather than to battery potentials. In the presently preferred embodiment a hybrid circuit with external capacitors is used to increase overall efficiency.
    Type: Grant
    Filed: February 24, 1975
    Date of Patent: August 17, 1976
    Assignee: Intel Corporation
    Inventor: Peter A. Stoll
  • Patent number: 3973180
    Abstract: Two cascaded capacitors, one in series and the other in shunt with a load, are connected across a source of amplitude-modulated oscillations with interposition of a small resistance, preferably the forward resistance of a series diode. The junction (A) of that resistance with the series capacitor is connected to the emitter of a transistor whose collector is energized with a high driving voltage (positive in the case of an NPN transistor) and whose base is tied to a tap on a voltage divider inserted between that collector and the opposite, usually grounded source terminal. The section of the voltage divider between the base and ground may consist of the forward resistance of a single diode, designed to balance the base/emitter threshold of the transistor whereby the aforementioned junction (A) is at ground potential when the source voltage peaks with a polarity opposite that of the collector potential.
    Type: Grant
    Filed: October 30, 1975
    Date of Patent: August 3, 1976
    Assignee: SGS-ATES Componenti Elettronici S.p.A.
    Inventors: Rinaldo Graziadei, Marco Siligoni