Abstract: The method of obtaining the adjustable capacitor permits transforming all types of capacitors (including Electrolytic, Vacuum, Gas, high-voltage capacitors) into adjustable capacitors without moving parts inside capacitors and provides broad ranges of changing the capacity of adjustable capacitors in electric circuits of direct and alternating current and in all types of Marx Generators.

Abstract: A portion of a differential charge pump circuit is partially replicated and is utilized as a replica circuit to define the common-mode voltage VCM of the differential output voltages of the charge pump circuit that drives a voltage controlled oscillator (VCO) in a PLL system application, or a voltage-controlled delay (VCD) circuit in a DLL system application. The replica circuit includes a high gain operational amplifier and at least three MOS transistors electrically coupled to the differential charge pump circuit. The operational amplifier generates the DC output voltage VO which is used to define the common-mode voltage VCM of the charge pump circuit. The three transistors are configured in replica of one-half of the charge pump circuit. The operational amplifier is provided with a bias voltage at the inverting-end input terminal.

Abstract: In a semiconductor device having a plurality of output circuits such as a semiconductor memory device, a drive signal having a boosted voltage level which is produced from a boosting circuit is applied to a gate of a low-level outputting MOS transistor in the output circuit. As a result, even when a potential at the ground wiring line is floated, a substantial decrease of a potential difference between the ground wiring line and the gate of the low-level outputting MOS transistor can be prevented. Also, a signal having a sufficiently high level can be supplied to a gate of a low-level outputting output MOS transistor. As a consequence, delays in the switching operation of the output MOS transistor can be suppressed, and the output circuit can be operated at high speed.

Abstract: An active digital voltage regulator circuit stores energy during times when the local power supply voltage is greater than a predefined voltage, e.g., during times when the parasitic inductances supplement the local power supply voltage. The active digital voltage regulator circuit uses the stored energy to supplement the local power supply voltage during times when the local power supply voltage starts to collapse, e.g., during periods when inductive losses are preventing the power supply from maintaining the local power supply voltage. A control circuit within the regulator circuit is a combination of two self-biasing and off-set nulling power supply monitor circuits. Each power supply monitor circuit further includes a differencing, non-overlapped, dual-output amplifier connected to the first and second power supply input lines.

Abstract: A current conversion circuit having multiple voltage levels with CMOS gates that switch the output capacitors so as to be coupled to the input of another voltage level to move the charge from one voltage level to another voltage level and thus increase the output current while decreasing the output voltage.

Abstract: A continuously controlled current increasing charge pump having n series-connected input capacitors coupled to a voltage/current source for developing a constant output voltage of at least ##EQU1## and an output current I.sub.o =nI.sub.in. Regulating circuits are also disclosed to regulate the output voltage. The charge pump consists of plural input switches that switch alternately the positive and negative sides of a like plurality of series-connected capacitors onto at least one output switch and output capacitor. The output switch is synchronized with the input switches and alternates between the negative and the positive output side of each capacitor.

Abstract: An ultra-compact Marx-type high-voltage generator includes individual high-performance components that are closely coupled and integrated into an extremely compact assembly.

Abstract: A power unit for creating discharge shock waves, which is excellent in performance, reliability, and durability is provided with: a plurality of capacitors (C1-C6), connected in series; first coils (L1, L2, L3) and switches (S1, S2, S3), which are connected to every other one of the capacitors (C1, C3, C5); first resistors (R11, R12, R13), which are connected in series with the first terminal of a power source (1); second resistors (R21, R22, R23), which are connected in series with the second terminal of the power source (1); and a discharge electrode (2), which is provided on the output side of the last capacitor (C6); wherein each switch (S1, S2, S3) has a first main electrode (a), a second main electrode (b), and a triggering electrode (c).

Abstract: A structure and method are provided for converting unregulated DC voltages to regulated DC voltages using pulse frequency modulation (PFM) and a switched capacitor array capable of multiple gains, where gain selection is based on the output voltage. The selected gain is maintained at or above a minimum gain determined from the input voltage. A regulated voltage, which is equal to or greater than a desired output voltage, is thus available to the load over a wider range of inputs and with greater conversion efficiency.

Abstract: Voltage boosting circuits having improved overvoltage protection circuits therein include a first pumping circuit and a second pumping circuit. The first pumping circuit includes comprises a first charge pump having an output coupled to a boosted voltage signal line and an oscillator for driving the first charge pump. The second pumping circuit comprises a second charge pump having an output coupled to the boosted voltage signal line and an active kicker circuit for driving the second charge pump upon receipt of a control signal during an active mode of operation. This control signal may be an address strobe signal, such as a complementary row address strobe signal (RASB). An overvoltage protection circuit is also provided. This overvoltage protection circuit includes a circuit to detect an overvoltage condition if a potential of the boosted voltage signal line exceeds a first threshold and a circuit to block receipt of the control signal by the active kicker circuit if the overvoltage condition is detected.

Abstract: A voltage converter, for converting an input voltage (U.sub.i) to an output voltage (U.sub.0), includes a plurality of cascaded voltage multipliers (VM1-VMN) having clock inputs, a control circuit (CNTRLG) for supplying clock signals to the clock inputs, for controlling the voltage multipliers (VM1-VMN). The control circuit (CNTRLG) includes circuitry (SL) for activating selected ones from the plurality of the voltage multipliers (VM1-VMN). The clock signals can be programmed to a part of the voltage multiplier to a non-active state. The voltage converter can, in addition, be provided with monitoring circuitry (MN) coupled between the output of the voltage converter and an input of the circuitry (SL). The monitoring means (MN) measures the output voltage (U.sub.0) in order to take a decision about the required number N of active voltage multipliers (VM1-VMN).

Abstract: A multistandard rectified supply circuit comprises, across a full wave rectifying bridge, at least one storing element associated with a charge path comprising first unidirectional conductive elements of a first polarity and with a discharge path comprising second unidirectional conductive elements of a second polarity so that the storing means is differently charged and discharged. A switch cancels the effect of at least one of the first and second unidirectional elements so that the storing element is charged and discharged through a same path.

Abstract: A voltage multiplying device of the present invention is provided with: a voltage multiplication level setting circuit for setting a voltage multiplying level which indicates how many times the power source voltage is multiplied; a voltage multiplication pulse signal generating circuit for outputting a plurality of voltage multiplication pulse signals, each having a predetermined period and varying with a predetermined phase difference; a condition decoder circuit and a voltage multiplication pulse selecting circuit for outputting a voltage multiplication controlling signal, which varies in accordance with the determined voltage multiplication level, in synchronization with the pulse signal; and a voltage multiplication level outputting circuit for multiplying the power source voltage step by step to the set voltage multiplication level in accordance with the voltage multiplication controlling signal and for outputting the voltage multiplication level in each of the steps.

Abstract: A semiconductor integrated circuit includes a first charge pumping circuit connected to an input node. The first charge pump circuit includes a plurality of first driving transistors and charges an input voltage at the input node to a control voltage. A second charge pumping circuit includes a plurality of second driving transistors that each receive the control voltage from the first charge pump. The received control voltage controls the driving of the second transistors when charging an output node to an output voltage. To eliminate body effects, the semiconductor integrated circuit further includes a plurality of body transistors that connect the source and body terminals of the driving transistors.

Abstract: A DC voltage converter is intended to multiply an input voltage and includes N elementary cells (ECi) in a cascade arrangement, each cell being intended to store the value of the input voltage in two capacitors (Ci1, Ci2). The charging and discharging of the capacitors (Ci1, Ci2) is controlled by transistors (Ni1, Ni2) whose conduction is controlled by the same control signal.

Abstract: A charge pump apparatus which comprises first and second active capacitors in series, having a common node between them. The second node of the second active capacitor is coupled to a particular node in the charge pump which drives an output of the charge pump. A pump clock is connect to the first lead of the first active capacitor. A voltage clamp is connected to the particular node and provides a bias point. A dynamic biasing circuit is connected to the common node and charges the common node and the particular node during intervals between transitions of the pump clock to keep both the first and second active capacitors activated during the transitions of the pump clock.

Abstract: A charge pump (102) and method of charge pumping a low voltage (V.sub.DD)) to generate a higher voltage (V.sub.PP). A primary pump (160, 179, 180) receives complementary clock signals (CLK1, CLK2) that control charging and transfer cycles of the charge pump. During the charging cycle, a capacitor (150) stores a charge developed from the low voltage. On the transfer cycle, the charge is transferred to an output (138, 177, 178) through a switching transistor (152) disposed in a well region (202) to develop the higher voltage. A secondary pump (162, 187, 188) charge pumps the output voltage to generate a more positive bias voltage for biasing the well region to disable a parasitic PNP transistor of the switching transistor.

Abstract: The present invention concerns an improved charge pump. The charge pump efficiently charges a voltage signal while reducing its power consumption. The charge pump includes at least one diode configured to receive a voltage signal. Coupled to the diode(s) is at least one capacitive device that is capable of coupling charge onto the diode(s). For one embodiment, the capacitive device provides a constant capacitance to more efficiently charge the voltage signal. The charge pump also includes an oscillating circuit that is capable of providing each capacitive device with an oscillating signal that alternates between a first voltage level and a second voltage level at a predetermined frequency. The oscillating circuit includes an odd number of N inverters coupled in a ring wherein an output of the Nth inverter is coupled to the input of the first inverter.

Abstract: A charge pump circuit comprises an input terminal for receiving an input voltage, an output terminal for providing an output voltage, and a plurality of pump stages connected in series between the input and output terminals and alternately coupled to first and second clock signals having complementary states. Each of the pump stages includes a transistor having a gate terminal, a source terminal, a drain terminal, and a bulk terminal, and a capacitor connected between the gate terminal of the transistor and a corresponding one of the clock signals. Each bulk terminal is biased by the voltage of a previous pump stage driven by the same clock signal, so that each of the corresponding threshold voltages of the transistors is suppressed to a voltage sufficient for generating a higher voltage on a low power supply voltage regardless of body effect.

Abstract: A single pump circuit for generating a variable high voltage that responds to more than one discrete input. The present invention uses a common pump circuitry to process a number of voltage inputs. Each of the voltage inputs can be a different input voltage and will be stepped up to a higher output voltage according to the design constraints of the pump circuitry. Since the pump circuitry is used for each of the inputs, without redundancy, the amount of chip real estate consumed is minimized. A switching system is implemented that detects which input has a voltage present and activates a particular path to the pump output accordingly.

Abstract: A charge pump circuit having a fast rise time and reduced physical area is disclosed. The charge pump includes a plurality of stages having a non-uniform series of bootstrap capacitors. By using non-uniform capacitors at the various stages, charging rise time is enhanced while at the same time reducing the overall physical size of the charge pump.

Abstract: A switching regulator circuit using a common switch network on a single IC for providing step-up and step-down DC--DC conversion is provided. The switching regulator uses switched capacitor techniques and hence avoids EMI, parasitic and stability concerns particular to inductors and transformers. The converter circuit includes control circuitry for sensing the voltage differential between the input and output to determine whether step-up or step-down mode is to be used. The control circuitry also senses the voltage differential between the input and output and enables the minimum number of switch sections needed to fully regulate the output, using the highest switch resistance possible to minimize inrush current from the input to the output.

Abstract: A multilevel converter including, in particular, a voltage source, a current source, and a capacitor for each of its cells, and a controller. The controller evaluates any current difference between an observed current through the current source and a current requested by the current source. The controller also includes ON-time controller for taking into account the current difference, if any, and altering accordingly a duration of the first conduction state of all of the cells in the converter in a direction suitable for reducing the current difference. The controller also maintains all of the floating capacitors at their equilibrium voltage values.

Abstract: A high voltage generating device includes a charge pump generating high voltage by boosting a power supply voltage and supplying it to a load, a timer measuring activation time of the charge pump and outputting a signal after a prescribed time period, an A-D converter converting an output voltage of the charge pump into a digital value in response to the signal and outputting four bit binary data, and a current limiting circuit including four P channel MOS transistors connected in parallel between a power supply node and a drain of an N channel MOS transistor which has a gate receiving the digital value output from the A-D converter.

Abstract: The invention relates to a voltage multiplier such as a charge pump circuit. The circuit is realized by a plurality of cascade connected voltage gain stages, each stage comprising a first and a second cell each receiving a pair of clock phase signals and comprising a pair of MOS transistors having first and second conduction terminals and a control terminal. These transistors have their first conduction terminals connected together and to a voltage reference; while the control terminals of each transistor are connected to the second conduction terminal of the other transistor of the same cell. Moreover, the second conduction terminal of the first transistor receives a first phase signal via a first coupling capacitor, and the second conduction terminal of the second transistor receives a second phase signals via a first pumping capacitor. Third and fourth cells are provided having the same structure as the first and the second cell.

Abstract: The present invention discloses a negative voltage drive circuit which does not takes an influence from the load capacitor or the power supply voltage drive circuit according to the present invention comprises a cross pumping circuit, a pumping unit block and circuit for supplying VCC or VSS power supply voltages for the pumping unit block.

Abstract: Disclosed is a voltage booster or drop circuit. The voltage booster or drop circuit includes: a plurality of diode devices connected in series; a plurality of capacitors, first electrodes of which are connected to connection points of the diode devices, for which a pulse signal is supplied to second electrodes of the capacitors and a raised voltage or dropped voltage is output to the last stage of the diode devices; and pulse generation device. The pulse generation device supplies a first pulse signal to the second electrodes of odd numbered capacitors and supplies a second pulse signal, the phase of which is opposite that of the first pulse signal, to the second electrodes of even numbered capacitors.

Abstract: A voltage converter transforms a high voltage alternating current (ac) input source into a lower voltage direct current (dc) output voltage. The line frequency of the ac current switches an electronic switch to alternately reconfigure a combination of capacitors and diodes to perform energy storage and effect voltage division. The dc output voltage is approximately one half of the peak ac input voltage at no load.

Abstract: A charge pump whose charge transfer switches are formed of charge transfer transistors and single pole, double throw (SPDT) switches each of which controls the gate of its corresponding transistor. Each SPDT switch has two throw contacts, one which is connected to the left diffusion of its corresponding charge transfer transistor and the other of which is connected to ground. Thus, the SPDT switch selectively connects the gate of the charge transfer transistor it controls between a diode connection (the first contact) and ground (the second contact). As a result, the charge transfer switches of the present invention are both fully on (when diode-connected) or fully off (when connected to ground).

Abstract: A charge pump circuit including N stages of diode-capacitor voltage multipliers clocked so as to convert a low voltage received from a supply voltage to a high voltage at an output terminal thereof employs an output stage to improve the efficiency of the charge pump. The output stage includes first and second legs each coupled to the output terminal, where the first leg provides current to the output terminal during low transitions of the clock signal and the second leg provides current to the output terminal during high transitions of the clock signal. In some embodiments, numerous ones of the above-mentioned charge pump circuit may be connected in parallel to achieve even greater output currents. Thus, unlike conventional charge pump circuits, a substantially constant current is provided to the output terminal throughout each period of the clock signal, thereby increasing the average total current provided to the output terminal and, thus, increasing the driving capability of the charge pump circuit.

Abstract: A method of transferring energy from a power source into an output node including the steps of separately charging each of a plurality of energy storage elements from the power source; after the plurality of energy storage elements are charged, discharging a selected one of the energy storage elements through an inductive element into the output node; and as the selected energy storage element is being discharged through the inductive element, when its voltage reaches a preselected value, discharging another one of the energy storage elements through the inductive element into the output node.

Abstract: The present invention concerns an improved charge pump. The charge pump efficiently charges a voltage signal while reducing its power consumption. The charge pump includes at least one diode configured to receive a voltage signal. Coupled to the diode(s) is at least one capacitive device that is capable of coupling charge onto the diode(s). For one embodiment, the capacitive device provides a constant capacitance to more efficiently charge the voltage signal. The charge pump also includes an oscillating circuit that is capable of providing each capacitive device with an oscillating signal that alternates between a first voltage level and a second voltage level at a predetermined frequency. The oscillating circuit includes an odd number of N inverters coupled in a ring wherein an output of the Nth inverter is coupled to the input of the first inverter.

Abstract: A voltage multiplier has a number of electrically-like stages. Each of the stages receives two input signals and a pump signal. The stage has an MOS transistor with a first source/drain region and a second source/drain region and a gate. Each stage also has means for receiving a pump signal and for separately pumping the first source/drain region and the gate of the first transistor by the pump signal. The two input signals are supplied to the first source/drain region and the gate of the first transistor, respectively. A first output signal is supplied from the second source/drain region of the first transistor, and from the first source/drain region of the first transistor. A voltage signal is supplied as the input signal of the first stage and a clock signal having a first phase is supplied to the first stage as the pump signal of the first stage.

Abstract: A voltage converter provided with charge pumps in which conventional rectifier diodes are replaced by output transistors. The output transistors at the same time act as voltage stabilizers. This also renders the ripple value of the voltage at the output terminal low when no smoothing capacitor, or a smoothing capacitor with a comparatively low capacitance value, is coupled to the output terminal.

Abstract: A charge pump MOS voltage booster has reduced voltage drops and ripple. This voltage booster is advantageously used in two applications. The voltage has four MOS transistors instead of diodes in a classical voltage booster, which exhibit an undesired voltage drop. The voltage booster also has an oscillator with two outputs and two corresponding charge transfer capacitors. In this manner, the undesired voltage drops and ripple are reduced without complicating the circuitry structure.

Abstract: A charge pump 1 for operation in an integrated circuit having a power source Vdd. The pump is made of a plurality of pump cells 10 connected together. Each pump cell includes an inverter 50 having a port 42 to receive a negative bias input, a port 44 to receive a positive bias input, a port 38 to receive a clock input, and a port 40 to output an output clock signal at the same frequency of the clock input, but phase shifted by a predetermined amount determined by the signal levels of the negative bias and said positive bias. Also included in each pump cell is a capacitor 26. A circuit 20, 22, 24, for coupling the output clock signal to one port of the capacitor is also provided, as is a pair of diodes 28, 30, connected serially together, one end of the pair being connected to the power source and the other end 48 of the pair providing the output signal of the pump cell, the common point of the pair being connected to the other port of the capacitor.

Abstract: A pattern generator is responsive to a control signal so as to change a pulse signal pattern selectively supplied through a level-shift circuit to switching elements of a charge-pump circuit, and the switching elements cause boosting capacitors to be differently charged depending upon the pulse signal pattern so that all the boosting capacitors participate in the boosting operation regardless of the target ratio between the input potential and the output potential.

Abstract: A charge pump circuit for generating an output voltage in response to a clock pulse is disclosed. The charge pump circuit has a switching node connected to a gate of a transistor which is connected between a high voltage output from a high voltage generator and the output voltage, a first path for providing a first coupling voltage to the switching node in response to the clock pulse and a second path for providing a second coupling voltage to the switching node in response to an inverse signal of the clock pulse. Each path includes a capacitor, where a capacitor in the first path has a coupling ratio greater than that of a capacitor of the second path.

Abstract: An electrical signal supply apparatus independently controls and regulates voltage and current in supplying microampere currents to skin tissue of patients. The apparatus enables operators to select a desired voltage level independent of the requirement to maintain current through the skin tissue at a relatively constant level. The apparatus includes a switching regulator in combination with an electric voltage doubling network and potential divider network to enable the supply of increased voltages.

Abstract: An adjustable charge pump design employs a variable voltage level means to reduce the charge on the charge pump charging capacitor. The charge pump output is thereby controlled without the use of any secondary pass elements applied to the charge pump output voltage. The variable voltage level means, e.g. a variable resistor, "steals" voltage from the charging capacitor in either an inverting charge pump configuration or a doubling configuration. The voltage converter employing the adjustable charge pump is advantageously applied to providing an adjustable contrast control for an LCD display. Certain intrinsic safety requirements are achievable with the present design thereby making possible a backlit, intrinsically safe LCD display.

Abstract: A negative voltage drive circuit according to the present invention comprises a switching means coupled between an input terminal and an output terminal; a cross latch pumping means for controlling the switching means in response to first and second clock signals and for maintaining the lower output voltage than that of said charge pump; and a capacitor which starts pumping operation according to the first clock signal when the output terminal is isolated to the input terminal.

Abstract: A plurality of diode-connected MOS transistors are arranged in cascade connection, and clocks are supplied to nodes between the MOS transistors. A node (N40) is connected to a first voltage source line (VCC) via a first switch (SW1), a node (N46) is connected to a second voltage source (GND) via a second switch (SW2), an intermediate node (N43) is connected to a third voltage source (VCC) via a third switch (SW3). The third switch is turned ON and the first and second switches are turned OFF to output the positive high voltage (VPP) from the node (N46) and also to output the negative high voltage (VBB) from the node (N40).

Abstract: An on-chip voitage multiplier circuit, comprising N serially arranged stages wherein each stage includes a switch Tj (j=1 . . . N), having an upper pin and a lower pin, to the upper pin of which the lower pin of a capacitor Ci (i=1 . . . N) is serially connected, said capacitor also having a lower pin and an upper pin; the intermediate node between each switch Tj (j=1 . . . N) and each capacitor Ci (i=1 . . . N) is connected to the ground voltage Vss through a respective switch Si (i=1 . . . N) and the upper pin of each capacitor Ci (i=1 . . . N) is connected to the supply voltage Vdd through a switch Di (i=1 . . . N); and the lower pin of the switch (T11) of the first stage is directly connected to the supply voltage Vdd and the upper pin of the capacitor (CN) of the last stage is connected to the output pin through an additional switch (T(N+1)).

Abstract: A multilevel converter comprising, in particular, a capacitor (C1, C2, . . . , Cn) in each of its cells. The capacitors nominally have charge voltages proportional to their respective ranks in the converter. The converter also includes circuits (VMO1, VMO2, . . . , VMOn) for evaluating the mean voltage across the terminals of each of the capacitors (C1, C2, . . . , Cn), circuits (VE1, VE2, . . . , VEn) for measuring any difference that may occur with respect to each of the capacitors (C1, C2, . . . , Cn) between the evaluated mean charge voltage and the nominal mean charge voltage of the capacitor, and for providing a corresponding difference signal (VEC1, VEC2, . . . , VECn), and also correction control circuits (BT, EC1, EC2, . . . , ECn) receiving the difference signals and correspondingly causing at least one temporary coupling to be established between two capacitors in order to correct the difference.

Abstract: A voltage converter circuit and method are provided. The circuit includes an input and an output, and has one or more stages that operate to increase the voltage between the input and the output. In one embodiment, each of these stages includes a first and second charging capacitor, and a transistor interposed between the first and second charging capacitors. In addition, a plurality of diodes are interconnected among the transistor and the first and second charging capacitors. The diodes are specifically configured to respond to a voltage applied to the input so that when a voltage is present at the input, the first and second charging capacitors are effectively connected in parallel across the input. However, when the voltage applied to the input is near zero, the diodes serve to effectively connect the first and second charging capacitors in series relationship through the transistor, so that the voltage across each of the first and second charging capacitors is added and applied to the output.

Abstract: A charge pump circuit having a fast rise time and reduced physical area is disclosed. The charge pump includes a plurality of stages having a non-uniform series of bootstrap capacitors. By using non-uniform capacitors at the various stages, charging rise time is enhanced while at the same time the overall physical size of the charge pump is reduced.

Abstract: An integrated circuit voltage multiplier 30 in a semiconductor substrate of a first conductivity type. The multiplier includes a diode 22, having a first voltage VDD applied to a first port thereof, the diode being made of: 1) a first well 12 of a second conductivity type formed in the substrate, being connected to a second voltage VB; 2) a second well 14 of the first conductivity type formed in the first well, having an electrical contact point comprising the first port of the diode; and 3) a third well 16 of the second conductivity type formed in the second well, having an electrical contact point comprising a second port of the diode. The multiplier also includes a capacitor C3, having a first contact thereof connected to the second port of the diode and having a third, pulsed voltage PH1 connected to a second contact of the capacitor.

Abstract: A voltage step-down circuit includes a first transistor having an input terminal supplied with a first power supply voltage, an output terminal and a control terminal. A step-down voltage derived from the first power supply voltage is output through the output terminal when a load circuit to be driven by the voltage step-down circuit is in an active mode. The first transistor is OFF when the load circuit is in a standby mode. A first voltage dividing circuit has an input terminal connected to the output terminal of the first transistor, and an output terminal. A first control circuit controls a voltage of the control terminal of the first transistor so that, when the load circuit is in the active mode, a feedback control is performed on the basis of a result of comparing a reference voltage with a voltage of the output terminal of the first voltage dividing circuit, and so that, when the load circuit is in the standby mode, the feedback control is stopped and the first transistor is OFF.

Abstract: In order to provide a voltage booster circuit to be controlled for generating either of a positive high voltage and a negative high voltage for economizing chip size, a voltage booster circuit of the invention, having a charge transfer circuit wherein charges are transfered from a lowest node (N10) to a highest node (N15), comprises switching means (1 and 2) for selecting one of a positive high voltage output mode and a negative high voltage output mode. A positive high voltage (VPP) is output from the highest node (N15) by supplying a power supply voltage (VCC) to the lowest node (N10) in the positive high voltage output mode, and a negative high voltage (VBB) is output from the lowest node (N10) by grounding the highest node (N15) in the negative high voltage output mode.

Abstract: A simplified power supply circuit includes: a primary capacitor connected across an anode and a cathode of a rectifier for rectifying an input voltage of high voltage and low current of AC current, a plurality of secondary capacitors connected in series in between a positive pole and a negative pole of the primary capacitor through a positive-pole on-off switch and a negative-pole on-off switch, each secondary capacitor having its positive and negative conductors respectively connected to an output positive terminal and an output negative terminal by an on-off switch circuit, and the secondary capacitors having their output positive and negative terminals connected in parallel for amplifying the low input current (with high voltage) to be a high output current (with low voltage) without using the heavy iron core and winding of a conventional transformer.