Abstract: The present invention concerns an improved charge pump. The charge pump efficiently charges a voltage signal while reducing its power consumption. The charge pump includes at least one diode configured to receive a voltage signal. Coupled to the diode(s) is at least one capacitive device that is capable of coupling charge onto the diode(s). For one embodiment, the capacitive device provides a constant capacitance to more efficiently charge the voltage signal. The charge pump also includes an oscillating circuit that is capable of providing each capacitive device with an oscillating signal that alternates between a first voltage level and a second voltage level at a predetermined frequency. The oscillating circuit includes an odd number of N inverters coupled in a ring wherein an output of the Nth inverter is coupled to the input of the first inverter.

Abstract: Two NMOS boost transistors have their sources connected to the high voltage input while their drains and gates are cross-connected. Two coupling capacitors connect two alternate phase clocks to the gates of the two cross-connected boost transistors. An NMOS pass transistor has its gate connected to the drain of one of the NMOS boost transistors, its source connected to the high voltage input, and its drain connected to the output. In an embodiment, two diode-connected regulation transistors connect the gates of the boost transistors to the high voltage input. These connections insure that the gates of the boost transistors and the gate of the pass transistor never reach voltages higher than one threshold voltage above the high voltage input. In another embodiment, two discharge transistors have their drains connected to a decode input, their sources connected to the gates of the boost transistors, and their gates connected to the positive power supply.

Abstract: A circuit including a network of capacitors and switching transistors having two modes of functioning. The first mode isolates all the capacitors and simultaneously charges them to the level of the supply voltage. The second mode connects all these capacitors in series between the supply voltage Vdd and an output node of the network in order to instantaneously increase the voltage level of this output node to a voltage level that is greater than the supply voltage Vdd. The capacitors are all connected in series by transistors that are placed between them and controlled by a signal that has a peak voltage that is greater than the voltage to be switched to the output node of the network.

Abstract: A high voltage generator including a Marx Generator (1) provides an output of up to 200 kV at a pulse repetition rate of up to 1 kHz. Discharge is triggered by over-volting a first stage (2a) of the Marx Generator, each stage including a hydrogen spark gap switch (5). By inhibiting the charging power supply (7) for a short time after each discharge, recovery of the dielectric is ensured, enabling high repetition rates without the need for gas flow.

Abstract: A system for generating voltages on an integrated circuit utilizes an overlapping clocking scheme. An oscillator (220) generates the overlapping clock signals, which are coupled through oscillator buffers (225), to row pumps (230). In response to the overlapping clock signals, row pumps (230) generate high voltages, typically higher than the VDD voltage of the integrated circuit. These high voltages may be used to program programmable memory cells or interface to logic components of the integrated circuit.

Abstract: A circuit and method for generating a fractional multiple of a primary power supply voltage is disclosed. The circuit operates in two phases wherein during a first phase a first capacitor is charged to the primary power supply voltage Vdd, and during a second phase the voltage on the first capacitor is bootstrapped toward twice the power supply voltage. A second capacitor, however, is coupled in parallel to the first capacitor during the second phase to cause charge sharing. The circuit can thus generate a fractional voltage between Vdd and 2 Vdd without the need for any voltage regulator circuitry.

Abstract: A multistandard rectified supply circuit comprises, across a full wave rectifying bridge, at least one storing element associated with a charge path comprising first unidirectional conductive elements of a first polarity and with a discharge path comprising second unidirectional conductive elements of a second polarity so that the storing means is differently charged and discharged. A switch cancels the effect of at least one of the first and second unidirectional elements so that the storing element is charged and discharged through a same path.

Abstract: A bi-directional DC/DC voltage converter having first and second input/output terminals for respectively receiving on a mutually exclusive basis uni-directional current at first and second voltages. A charge pump circuit connected between the first and second input/output terminal, depending on which voltage is supplied, converts that voltage to the other voltage.

Abstract: A voltage booster comprising a charge pump for generating a boost voltage over a boost line. The booster comprises a comparator which is supplied by a voltage divider with a voltage proportional to the boost voltage, and by a reference source with a low reference voltage, and which, depending on the outcome of the comparison, enables or disables the charge pump. A voltage limiter is connected between the boost line and ground; and a acceleration circuit accelerates the voltage increase on the acceleration line following low-power operation in which the paths toward ground are interrupted for reducing consumption.

Abstract: A charge pump circuit includes a plurality of voltage boost stages that are mutually parallel-connected between a supply line and an output line. Each of the stages includes first and second charge storing devices in each of which a first terminal is connected to a charge/discharge node and a second terminal is connected to a boost node to switch between a first charge state and a second charge state for transferring a charge to the output line. Each stage also includes an inverter with an input node connected to the boost node related to the first charge storing device and an output node which is connected to the boost node related to the second charge storing device. Further, a first charge transfer diode, which is connected between the charge/discharge node related to the first charge storing device and the output line and a second charge transfer diode, which is connected between the charge/discharge node related to the second charge storing device and the output line are also included in each stage.

Abstract: A phase generator circuit cyclically produces a first pair of phase signals and a second pair of phase signals, comprising a first circuit to produce a first phase of each pair of phase signals, these first phase signals being non-overlapping and switching over between a voltage 0 and a voltage VCC, and second and third circuits for the production, from the first phase signals, respectively of the second phase of the first pair and the second phase of the second pair of phase signals, these second phase signals being non-overlapping with the first phase signals and switching over between a negative voltage -V and a voltage VCC. The disclosure finds application in the piloting of charge pump type of negative voltage generator circuit.

Abstract: A power converter apparatus in which a switched capacitor circuit includes one or more sets of cells connected in series each having a capacitor as a voltage supply source and a bridge circuit for inverting the polarities of the capacitor, the switched capacitor circuit is connected to a load, there is provided a means for parallelly charging the capacitors of the cells with a D.C. voltage source, any number of the cell capacitors are connected in series with any polarity to control supply of an A.C. output to the load. Whereby the power converter apparatus using the switched capacitor circuit can supply A.C. power with less distortion to the load without increasing the withstand voltage of the switching elements and without any need for provision of large inductors or capacitors.

Abstract: A charge pumping circuit allows pumping of the supply voltage in both the positive and negative directions, as a pair of clock signals having inverse phases are inputted. Power consumption is reduced and a high voltage is generated for writing and erasing data in non-volatile digital memories, even when a low voltage is applied.

Abstract: This invention relates to an electronic device for the conversion of electric energy between a voltage source E and a current source J. This device is comprised of cascaded switching cells (CL.sub.k) each having two switches (I.sub.Ak, I.sub.Bk) and comprising capacitors (C.sub.k) associated with the cells for distributing the voltage of the source over the switches, and control logics (LG.sub.k) which condition the exchanges of energy and are synchronized for limiting the voltage supported by each switch to a fraction (V/n) of the supply voltage, for limiting the ripple amplitude of the voltage of the output to the same fraction V/n and for conferring on this ripple voltage a frequency (nF) which is a multiple of the switching frequency (F) of the switches.

Abstract: A power supply using electric double layer capacitors whose output voltages undergo great variations. The power supply further includes first, second, and third switches for switching the capacitors from a parallel connection to a series connection, and a regulating circuit powered by the capacitors. As the output voltages from the capacitors drop, the regulating circuit switches the capacitors from the parallel connection to the series connection. For example, the switches are composed of semiconductor devices. The second and third switches are operated complementarily in relation to the first switch. Electric double layer capacitors producing low terminal voltages can be used. The step-up or step-down ratio can be made smaller. High voltage hazard can be avoided and the efficiency of the power supply can be improved.

Abstract: In a booster circuit for use in a semiconductor integrated circuit device that includes: a voltage detection circuit for detecting the boosted voltage with respect to a reference voltage; a pulse oscillator circuit in which oscillation is controlled in accordance with the results of voltage detection; and a charge pump circuit that uses the oscillation pulses to charge capacitors and generates a boosted voltage; a transfer control circuit is inserted between the pulse oscillator circuit and the charge pump circuit that is composed of a transfer gate which is ON/OFF-controlled by the detection output of the voltage detection circuit and a latch circuit. When the boosted voltage is higher than the set value and the detection output changes to low level, this transfer gate is immediately turned OFF, the oscillation output immediately preceding the OFF state is latched in the latch circuit, and oscillation pulses are not transferred to the charge pump circuit.

Abstract: AC to DC signal conversion for use in applications including conditioning of signals supplied by inductive position sensors that are employed in aircraft electrical and electronic systems. First and second switching circuits (14 and 16) are synchronously switched between operational states in which an applied AC signal is supplied to the switching circuits and a second operational state in which the switching circuits supply charge (current). When one switching circuit (e.g., 14) is in the first operational state, the second switching circuit (e.g., 16) is in the second operational state so that one switching circuit senses the AC signal during positive half cycles and the other switching circuit senses the AC signal during negative half cycles. A pair of capacitors (18 and 20) are connected between a pair of output terminals.

Abstract: A charge pump circuit with negative current feed back is disclosed. The charge pump circuit consists of charge pump stages, switch circuits in between the stages, and a feedback loop to control the conductivity of the switch circuit. The conductivity of the switch circuits is controlled by modulating the bias current of the switch circuit which modulates its conductivity. By using the feedback loop to control the conductivity, the output voltage of the charge pump circuit can be regulated.

Abstract: A multilevel converter including, in particular, a capacitor (C1, C2, . . . , Cn) for each of its cells, and control means comprising means (VMO1, VMO2, . . . , VMOn) for evaluating the mean voltage across the terminals of each of the capacitors (C1, C2, . . . , Cn), means (VE1, VE2, . . . , VEn) for measuring any difference on each of said capacitors (C1, C2, . . . , Cn) between the evaluated mean charge voltage and the nominal mean charge voltage of the capacitor, and additional control means (MCC1, MCC2, . . . , MCCn) changing the duration of said first conduction state of the cell associated with said capacitor in a direction such that the measured difference is reduced.

Abstract: Generation of an output voltage (28) greater than that of a reference voltage (20) is accomplished using a self starting low voltage charge pump (10). A start-up clock circuit (12) comprising a ring oscillator (40) is used to generate a ting oscillator clock signal (63) which can be used allow the charge pump (10) to begin operation before an external clock signal (44) is available.

Abstract: The present invention is to provide means to attain an improved current efficiency and a stabilized operation even when used to generate high-power magnetic pulses at shortened pulse intervals. The objective is attainable with an apparatus to generate magnetism, comprising a plurality of magnetism-generating circuits which are cascaded each other, each magnetism-generating circuit containing a coil member to generate magnetism and a capacitor to provisionally store the current across said coil member; and a conduction-controlling circuit which is to operate the magnetism-generating circuits in a prescribed order.

Abstract: A multilevel converter including, in particular, a capacitor (C1, C2, . . . , Cn) for each of its cells. The capacitors have nominal charge voltages proportional to their respective ranks in the converter. It also includes control means (BT, DA1, . . . , DAn, pe2, . . . , pen) organized to evaluate said voltage of the voltage source (VECn), and whenever it is insufficient, to suspend said nominal operation of the converter (SE) and to act on said switches (T1, T'1; T2; T'2; . . . ; Tn, T'n) in such a manner that initially, while said voltage of the voltage source is being established, it begins by charging all of the capacitors of the converter (C1, C2, . . . , Cn), after which said control means establish said nominal operation of the converter.

Abstract: A charge pump circuit including a number of pull-up stages connected in parallel with one another between a reference potential line and an output line. Each stage includes a capacitor having a first terminal connected to a charging and discharging node, and a second terminal connected to a pull-up node for switching between a first charging operating phase and a second charge transferring operating phase. The charging and discharging node is connected to the supply line via a charging transistor having a control terminal connected to a high-voltage bias node formed by the adjacent stage in the opposite operating phase, for charging the capacitor substantially up to the supply voltage.

Abstract: A voltage booster circuit using at least one capacitor. This capacitor receives a clock signal at one terminal, and a second terminal of the capacitor is connected, firstly, to a supply terminal by means of a precharging transistor and, secondly, to an output by means of an insulation transistor. The disclosed device includes control circuits for controlling the transistors such that they are not on at the same time and such that the voltages that control them are greater than the highest potential present at their source or at their drain.

Abstract: A charge pump circuit which has a simple circuit configuration yet can boost the power source voltage 4 or 8 times. The + side electrode of a capacitor C1 is connected to an input terminal 10 via a diode D1; the - side electrode is connected to input terminal 10 via a switch S1 and is also connected to ground potential via a switch S2. The + side electrode of a capacitor C2 is connected to the + side electrode of capacitor C1 via a diode D2; the - side electrode is connected to the + side electrode of capacitor C1 via a switch S3 and is also connected to ground potential via a switch S4. Switching control signals PA, PB, PC, PD with the prescribed frequencies and phase are provided to switches S1, S2, S3, S4 from switch control circuit (14).

Abstract: A regulated charge pump is provided to boost an amount of voltage while minimizing the well voltage fluctuation during the operation. The charge pump includes a charge pump core which has a first transistor, a second, a third transistor and an integration circuit. The first transistor has a first current electrode for receiving the first power supply voltage and a second current electrode coupled to the first terminal of the charging capacitor. The second transistor has a first current electrode coupled to a second terminal of the charging capacitor, a control electrode and a second electrode for receiving a second power supply voltage. The second transistor is proportionately conductive during the first predetermined time period. The third transistor has a first current electrode for receiving the first power supply voltage, and a second current electrode coupled to the second terminal of the charging capacitor. The third transistor is conductive during the second predetermined time period.

Abstract: A power converter has two switched capacitor circuits each including at least a plurality of sets of capacitors and switching elements, first of which circuits is provided for supplying a DC power to a load while second of which accumulates a power in a period receiving a higher input voltage, and the first switched capacitor circuit being made to receive, in a period receiving a lower input voltage, a power supplied from a DC power source and also the power supplied from the second switched capacitor circuit for supplying to the load the DC power of a constant voltage, in which an input current collectively taken up by the two switched capacitor circuits is made similar in the waveform to the input voltage to eliminate any harmonics distortion of the current drawn from the source, for attaining the supply of the DC power of the constant voltage to the load, whereby the power converter is rendered not to require any large inductor to be capable of being minimized in size and restraining any noise radiation fr

Abstract: Apparatus for irradiating a substrate is compact, transportable, rugged, high powered, and highly efficient. It includes an improved high voltage inductor (1-230), an improved power transfer apparatus (230-294), an improved voltage multiplication apparatus (500-575), an improved auxiliary power supply (600-619) for the voltage multiplication apparatus, improved accessibility self-shielding (700), and improved methods for radiation processing of solid or liquid materials.

Abstract: A voltage multiplier and capacitive isolation power supply using capacitors, diodes and first and second clock signals that are out-of-phase with respect to each other. When the first clock signal is high and the second clock signal is low, a capacitor in a first stage transfers charge to a capacitor in a second stage. When the first clock signal is low and the second clock signal is high, the capacitor in the second stage transfers charge to an output capacitor, and the capacitor in the first stage is recharged via a feedback diode between a capacitor connected to a ground potential and the capacitor in the first stage. Additionally, the capacitors in each of the stages provide an isolation function for the power supply.

Abstract: A variable-capacitance power supply apparatus has an inexpensive structure for variably supplying a desired high power to a load by selecting an appropriate total capacitance for storing charge. A number "n" (an arbitrary integer) of series-coupled capacitors each having capacitance C are independently charged to produce an appropriate output voltage. The total capacitance Cs of the series-coupled capacitors is obtained as Cs=C/n. The total charge Q stored in the series-coupled capacitors is proportional to the total capacitance Cs. The series-coupled capacitors are selectively charged to produce an appropriate output voltage and the desired high power to be supplied to the load.

Abstract: A voltage multiplier for relatively high output current has its design output voltage stabilized and rendered independent of process spread, temperature, supply voltage and output current level, by a stabilization loop driving the switch that cyclically connects to ground a charge transfer capacitance of the functional voltage multiplier circuit. The feedback loop comprises an integrating stage, stabilized by creating a low-frequency zero in the transfer function for compensating one of two low-frequency poles of the transfer function of the whole circuit.

Abstract: An object of the present invention is provide an ignition circuit for a squib in an air bag in a vehicle able to supply sufficient energy to ignite the squib which does not use converter or a high capacity capacitor.The first capacitor 12 and the second capacitor 13 are charged by the battery 11. The sensor 17 is closed and the control circuit 10 makes the NPN type transistor 19 active when a collision is detected. The squib 16 is connected to the junction of the first capacitor 12 and the second capacitor 13 so that sufficient energy can be supplied to the squib even when a converter is not used.

Abstract: A charge pump assembly includes a storage capacitor having one terminal for a first supply potential and another terminal for pickup of an output potential. The assembly has one charge pump or two charge pumps being controlled by push-pull signals. Each charge pump includes a p-channel MOS transistor having a gate terminal being controlled by a first signal and having a drain-to-source path with one terminal being connected to the other terminal of the storage capacitor. A sliding capacitor has one terminal being connected to the other terminal of the drain-to-source path of the p-channel MOS transistor and another terminal being controlled by a second signal. An n-channel MOS transistor has a gate terminal being controlled by a third signal and a drain-to-source path being connected between a second supply potential and the one terminal of the sliding capacitor.

Abstract: A charge stacking, high voltage generating circuit is provided wherein a plurality of capacitors are charged in parallel and discharged in series through a single diode to an output terminal. A switching circuit is used to connect each of the capacitors in parallel between a first supply voltage and a second supply voltage during a first half clock cycle. This configuration allows the capacitors to charge during this first half clock cycle. During a second half clock cycle, the switching circuit connects the charged capacitors in series between the first supply voltage and the output terminal through a single diode. The series configuration of the capacitors is such that the voltage at the output terminal is approximately equal to the first supply voltage, plus the sum of the voltages of the charged capacitors, minus the threshold voltage drop across the series diode.

Abstract: A voltage converting circuit of the charge pump step-up type includes a first circuit means for charging each of first and second capacitors with the voltage of a voltage source at a first timing. A second circuit operates to serially connect the charged first capacitor between a positive electrode of the voltage source and a positive voltage output terminal at a second timing so that a positive voltage which is a double of the voltage source voltage, is supplied from positive voltage output terminal. A third circuit operates to the charged first and second capacitors in series between a ground terminal and a negative voltage output terminal at a third timing so that a negative voltage which is a double of the voltage source voltage, is supplied from the negative voltage output terminal.

Abstract: A DC-DC converter includes first and second MOS transistors which selectively connect a first capacitor to a DC power supply so as to charge the first capacitor, and third and fourth MOS transistors which selectively connect the first capacitor to a second capacitor so as to charge the second capacitor by electric charges stored in the first capacitor. A predetermined output voltage is produced at a lead of the second capacitor serving as an output terminal, based on the charge/discharge operations of the first and second capacitors in response to the switching operations of the four MOS transistors. A variable voltage is applied to a back gate of one MOS transistor selected from the first to fourth MOS transistors. When the selected MOS transistor is on, a first control transistor in the converter forms a connection between a source and a back gate of the selected MOS transistor, to reduce the resistance value of the selected MOS transistor when turned on.

Abstract: A capacitive charge pump circuit and associated method is provided for outputting an output voltage which has a magnitude which is an integer multiple of the magnitude of a power supply voltage used to power the circuit. In one form, a capacitor is charged to the power supply voltage, V.sub.s. The capacitor is alternately coupled to the power supply voltage and ground so that in an alternating manner, 2 V.sub.s and -V.sub.s appear across it. By coupling a first electrode of a piezoelectric crystal to the capacitor and a second electrode of the piezoelectric crystal to the power supply voltage, a signal having a peak-to-peak magnitude which is three times that of the power supply voltage will drive the piezoelectric crystal.

Abstract: What is described is a high efficiency voltage doubler (100). The high efficiency voltage doubler (100), has a charge-pump capacitor (30), an inverter (18), a coupling capacitor (24), a complementary switch pair (16), a DC biasing circuit (102), a charging circuit (106), and an input circuit (108). This structure is adapted for use in an integrated circuit, and provides the advantage of maximizing voltage doubled power output and minimizing current consumption with a minimal number of components.

Abstract: High voltage generator including several voltage multiplying stages connected in series, each having a diode and a capacitor one terminal of which being connected to the cathode of the respective diode, every cathode of a diode being connected to the anode of the diode of the next voltage multiplying stage, a clock generator generating two clock pulses being 180.degree. out of phase to one another and being supplied alternately to the other terminal of the capacitors of successive voltage multiplying stages, the last diode in the series supplying a high voltage output and the high voltage output being connected to feed-back circuit, modifying the two clock pulses in dependence on the voltage level on the high voltage output, at least the capacitor (Cn) in the last voltage multiplying stage receiving a control current (I1) determined by the feed-back circuit instead of one of both clock pulses.

Abstract: There is provided a circuit for achieving a serial communication at the standard voltage defined in the RS-232 interface communication standard when the signal processing voltage of the host side circuit is 5 V and 3 V, for example, in which, when the DC input voltage V.sub.in of the host side circuit is changed, this voltage level is detected to generate a stepped-up voltage having an appropriate step-up ratio by step-up circuits. This voltage level is detected to, regardless of the change of the power supply voltage, obtain the positive and negative DC output voltages Vdd, Vss matching with the RS-232 interface communication standard. To be specific, with the 5 V operation, a double stepped-up voltage within the DC/DC converter circuit and, during the 3 V operation, a three times stepped-up voltage are selectively generated to obtain the DC output voltage.

Abstract: A voltage converting circuit of the charge pump step-up type includes a first circuit means for charging each of first and second capacitors with the voltage of a voltage source at a first timing. A second circuit operates to serially connect the charged first capacitor between a positive electrode of the voltage source and a positive voltage output terminal at a second timing so that a positive voltage which is a double of the voltage source voltage, is supplied from positive voltage output terminal. A third circuit operates to the charged first and second capacitors in series between a ground terminal and a negative voltage output terminal at a third timing so that a negative voltage which is a double of the voltage source voltage, is supplied from the negative voltage output terminal.

Abstract: A DC voltage divider for converting electric energy which includes capacitors, diodes and switches. The divider is a device for unidirectional transmission, on the condition that its input and output operate alternatively. The divider divides a high voltage input into a low voltage DC output. The transmission ratio of input impedance to output impedance is equal to N.sup.2, where N is the number of capacitors included in the divider. The divider can be used in electric power supply devices to replace transformers to transform an input voltage to a lower value. The divider also has high power output and efficiency. The divider is small in size, low in cost, and its output can be controlled by adjusting the operating frequency.

Abstract: An apparatus for operating discharge lamps with a stable electric current supply and minimal dimensional area requirements. The apparatus includes an input power source coupled across a capacitor, establishing a first loop circuit. A discharge lamp may also be connected across the capacitor, thereby forming a second loop circuit. A first switch repeatedly turns ON and OFF, making and breaking the first loop circuit at a first frequency, and thereby charges the capacitor. A second switch repeatedly turns ON and OFF, making and breaking the second loop circuit at a second frequency, and thereby discharges the capacitor through the discharge lamp. A control mechanism controls the first and second switches for supplying a predetermined current to the discharge lamp for flickerless operation.

Abstract: A MOSFET wherein cell includes a MOSFET transistor having a gate connected to an input voltage signal for integration, a source grounded through a high resistance, and a drain connected to a power source. An output capacitor is connected to the source of the MOSFET transistor to complete the MOSFET cell.

Abstract: A voltage multiplier has first, second, and third capacitors, each having first and second plates. The multiplied output voltage is developed between the first and second plates of the third capacitor. First and second diodes are connected respectively between first plates of the first and second and the second and third diodes. A switch is connected between the supply voltage and the first plate of the first capacitor. First and second inverters are provided, each having an input, and having an output connected respectively to the second plates of the first and second capacitors. The first inverter is connected to the supply voltage to produce the supply voltage as an output of the first inverter when a low state is applied to the input of the inverter. The second inverter is connected to the first plate of the first capacitor to produce a voltage from the first capacitor as an output of the second inverter when a low state is applied to the input of the second inverter.

Abstract: A charge pump circuit comprises a plurality of voltage doubler circuits connected together such that a first voltage output generated by a first portion of a kth one of the voltage doubler circuits is substantially equal to Vdd*2.sup.k and Vdd*2.sup.k-1) on odd and even phases, respectively, of a first clock signal, and a second voltage output generated by a second portion of the kth one of the voltage doubler circuits is substantially equal to Vdd*2.sup.k-1) and Vdd*2.sup.k on the odd and even phases, respectively, of the first clock signal. Each of the voltage doubler circuits is constructed such that when its first portion is providing a voltage of Vdd*2.sup.k and a current to a next stage, its second portion is recharging a capacitor in that portion to Vdd*2.sup.k-1), and when its second portion is providing a voltage of Vdd*2.sup.2 and a current to the next stage, its first portion is recharging a capacitor in that portion to Vdd*2.sup.k-1).

Abstract: The present invention relates generally to RF power amplifiers for portable cellular radiotelephones, and more particularly, to dual-mode cellular radiotelephones. A power supply network enables the RF power amplifier in a dual-mode radiotelephone to operate with two separate modes: saturated and unsaturated. Switches in the power supply network, e.g. complementary transistors, are driven to a first set of logic states by a square wave which is synchronized with transmit time slots present in a TDMA frame structure to charge a capacitor from a battery. When the switches are then driven to a second set of logic states, the capacitor is placed in series with the battery to essentially double the supply voltage. When the radiotelephone operates in a digital mode, the increased supply voltage coincides with the transmit time slot and temporarily increases the saturation point of the RF power amplifier to permit linear amplification.

Abstract: An improved charge pump circuit includes a charge pump capacitor having first and second terminals for charging in first and second polarities; a current source device for supplying current selectively to the charge pump capacitor through the first and second terminals; a clamping device for defining first and second clamping voltages for the first and second terminals, respectively; a switching device for selectively connecting the current source device to one of the terminals and connecting the clamping device to the other of the terminals; and a clamp control device, responsive to the differential mode voltage across the charge pump capacitor, for setting the clamping voltages to obtain a difference between the clamping voltages equal to said differential mode voltage and pumping equal charge into the charge pump capacitor in either polarity.

Abstract: One or more loads, commonly solenoids, requiring a high-power drive--typically 500 ma. 7.5 v.d.c.--are selectively actuated by energy that is accumulated over time--typically over several hundred milliseconds--within associated, addressable, energy-accumulating high-power drivers. The energy accumulation is solely from micropowered signals--typically 1 ma., 4.5 v.d.c.--that are received from a control system that is itself micropowered--typically from a high-equivalent-series-resistance power source. The energy-accumulating high-power solenoid drivers (i) accumulate predetermined amounts of energy only as, when, and to such extent as is required, (ii) multiply the voltage (nominally times two) of the received micropowered signals, and (iii) shape the current waveform of the output high-power solenoid drive signals--all as desired so as to optimally both use and conserve energy.

Abstract: A voltage tripler which uses a charge pump with a single charge transfer capacitor to produce the required voltage is disclosed. The voltage tripler in conjunction with an inverter is useful for producing voltages with negative polarities. The voltage tripler when used in conjunction with a variable frequency oscillator circuit is useful in optimizing the power consumption by the charge pump of the voltage tripler when the tripler is not operating under load conditions. The tripler is useful in supplying power to a combination RS232 and RS422 or RS232 and RS485 interface, as well as other monolithic interface products.