With Electromagnetically Operated Separating Patents (Class 314/119)
  • Patent number: 7746252
    Abstract: An analog front-end circuit includes an analog processing circuit, an A/D converter, a target register in which a lower limit target value of an input image signal is set, and a calculation circuit. The analog processing circuit includes an offset control circuit which performs offset control based on an offset control value set in an offset control register. The calculation circuit monitors the A/D-converted value in a lower limit value output period when the A/D-converted value corresponding to a lower limit value of an input range is output from the A/D converter, and sets the offset control value that causes the A/D-converted value to become closer to the lower limit target value set in the target register in the offset control register.
    Type: Grant
    Filed: February 26, 2008
    Date of Patent: June 29, 2010
    Assignee: Seiko Epson Corporation
    Inventor: Masahiko Mizuta