Abstract: Apparatuses, methods and storage medium associated with multi-phase/level boot technology, are disclosed herein. In embodiments, a method may include resuming an initial execution image of a computing platform from persistent storage to execute an initial task; and subsequently, resuming a full execution image of the computing platform from the persistent storage to execute one of a plurality of operational tasks. Other embodiments are also described and claimed.

Abstract: An electronic circuit includes a diode configured to carry a surge current generated by switching of a first transistor, a capacitor connected between a cathode of the diode and a control electrode of the first transistor, and a first variable impedance circuit configured to vary an impedance between the control electrode of the first transistor and a first reference voltage node according to the surge current flowing to the diode.

Abstract: A semiconductor module includes: a first metal plate including a first mount part joined with a bottom-surface electrode of a first switching element, a second mount part joined with a positive-electrode terminal, and a first narrow part between the first and second mount parts and being narrower than a part jointing the first switching element to the first mount part and the positive-electrode terminal; a second metal plate being joined with a bottom-surface electrode of a second switching element, and connected to a top-surface electrode of the first switching element; a third metal plate including a sixth mount part joined with a negative-electrode terminal, a seventh mount part connected to a top-surface electrode of the second switching element, and being narrower than the negative-electrode terminal, and a second narrow part between the sixth and seventh mount parts; and a snubber circuit connecting the first and second narrow parts.

Abstract: A display device is provided and includes pixels and common electrodes overlapping the pixels; gate lines connected to pixels in row; source lines connected to pixels in column; source amplifiers; and a gate drive circuit configured to supply at least one first pulse to the gate lines.

Abstract: A gate driver circuit, a display panel, and a display device. A number of emission start signals, with at least one a delay time, a pulse width, or a combination thereof, are supplied in a frame period in which display driving is performed at a low driving frequency. This decreases a degree by which luminance appearing in the frame period is reduced, or changes characteristics of frequency components of luminance, thereby preventing flicker from being observed. The display driving is performed at the low driving frequency reduces power consumption, and is performed at a lower driving frequency to improve the efficiency of the display device.

Abstract: The present disclosure relates to a display control method, a display control device and a computer readable storage medium. The display control method includes: detecting whether a display panel is in a low brightness mode and/or a low ambient light mode; enabling an eye protection mode when it is determined that the display panel is in the low brightness mode and/or the low ambient light mode, in which, in the eye protection mode, brightness of a color component of the display panel is further reduced with respect to the low brightness mode to reduce damage to human eyes.

Abstract: A display device includes a housing, a flexible display panel, a light receiving sensor, and an area calculator. The flexible display panel is coupled to the housing and displays a reference image and an output image. The flexible display panel has an exposed area with a size that varies with movement of the flexible display panel in a first direction relative to the housing. The sensor senses the reference image and generates sensing data based on the reference image. The area calculator calculates the exposed area of the flexible display panel based on the sensing data.

Abstract: A display apparatus includes: a display panel including pixels respectively connected to gate lines and data lines; a data driving circuit to output a data output signal in response to a data signal; a demultiplexer circuit to provide first and second data lines from among the data lines with the data output signal, in response to control signals; and a driving controller to provide the data signal and the control signals. The demultiplexer circuit includes: a switching transistor including a first electrode to receive the data output signal, a second electrode connected to the first data line, and a gate electrode connected to a first node; and a switching control circuit to charge the first node to turn on the switching transistor during a first interval of a first horizontal period, and to discharge the first node during a second interval of the first horizontal period.

Abstract: A touch screen having layers. The touch screen can include a substrate upon which the layers of the touch screen are disposed, and a touch region including a touch pixel electrode, a first display sub-pixel and a second display sub-pixel. The touch screen can also include a sense connection coupled to touch sensing circuitry. An intermediate connection can be disposed between the touch pixel electrode and the sense connection, and can be coupled to the sense connection at the first display sub-pixel and the touch pixel electrode at the second display sub-pixel. In some examples, the sense connection can be disposed at least partially underneath a structure in the first display sub-pixel, such as a data line. In some examples, the intermediate connection can be comprised of a same material type as a structure in the first display sub-pixel, such as a gate line material.

Abstract: System and method for improving displayed image quality of an electronic display that displays a first image frame by applying a first voltage to a display pixel and a second image frame directly before the first image frame by applying a second voltage to the display pixel. A display pipeline is communicatively coupled to the electronic display and receives first image data corresponding with the first image frame, where the image data includes a first grayscale value corresponding with the display pixel. Additionally the display pipeline determines an inversion balancing grayscale offset based at least in part on the first grayscale value when polarity of the first voltage and polarity of the second voltage are the same and determines magnitude of the first voltage by applying the inversion balancing grayscale offset to the first grayscale value to reduce likelihood of a perceivable luminance spike when displaying the first image frame.

Abstract: An array substrate, a manufacturing method thereof and a display device are provided by the present disclosure. The manufacturing method includes: providing a base substrate; forming a plurality of pixel electrodes on the base substrate, in which the operation of forming the plurality of pixel electrodes includes: depositing a first transparent conductive film, and forming the plurality of pixel electrodes and a connection unit for connecting adjacent pixel electrodes by patterning the first transparent conductive film; forming a passivation layer on the plurality of pixel electrodes, and patterning the passivation layer to expose at least a portion of the connection unit; and processing the exposed portion of the connection unit, so that the plurality of interconnected pixel electrodes are electrically insulated.

Abstract: The invention relates to methods for air disinfection of microorganisms and biological agents by the method of their inactivation by electrostatic fields and filtering by the method of electrostatic precipitation. The method comprises the steps of creating a flow (A) of air to be disinfected; subjecting said flow to constant with electrostatic fields alternating in direction of intensity vector, said electrostatic fields being sequentially arranged along the flow, and created by transversely spaced air permeable electrodes (1); and filtering the treated flow with an electrostatic filter. Electrostatic field concentrators in the form of projections (3) are located on the surface of the electrodes (1), in particular nanoscale projections, and the intensity of each of the alternating electrostatic fields between the electrodes is selected in accordance with the condition of electroporation of microorganism cells or their inactivation. A device for implementing this method is also claimed.

Abstract: Various embodiments include planar sensor arrays for use in determining characteristics of a material under test (MUT). The planar sensor arrays can include a set of electrodes positioned to enhance a depth and clarity of detection into the material under test. Some embodiments include an electromagnetic sensor array having: a first set of two rectilinear electrodes, positioned opposed to one another across a space; and a second set of two rectilinear electrodes, positioned opposed to one another across the space, the second set being off-set from the first set, wherein the first set and the second set are configured to detect an electromagnetic impedance of the MUT.

Abstract: A driver includes a power supply circuit having first to n-th boost circuits, a circuit that operates based on power supplied from the power supply circuit, and an abnormality detection circuit. The abnormality detection circuit detects an abnormality of an i-th boosted voltage that is generated based on a boost operation of an i-th boost circuit. If an abnormality of the i-th boosted voltage is detected, a j-th boost circuit performs a low-capacity boost operation with a lower current-supply capacity than an ordinary boost operation or stops the boost operation.

Abstract: A control device for a display device includes an image acquisition part that designates a gray level value of each of the pixels, and acquires first image data with the number of gray levels being a-gray levels, a parameter acquisition part that acquires a parameter that decides the number of gray levels displayed by the pixel, a color reduction part that decides a number of gray levels to be displayed by the pixel according to the parameter acquired by the parameter acquisition part, and generates second image data in which the first image data acquired in the image acquisition part is color-reduced to the number of gray levels decided, and a write part that changes the gray level of the pixel to a gray level of the gray level value designated by the second image data generated in the color reduction part.

Abstract: A method for producing a light-emitting diode includes providing a light-emitting diode chip including a semiconductor body, and applying a luminescence conversion material to an outer area of the semiconductor body by thermal spraying such that at least part of electromagnetic radiation generated during operation of the light-emitting diode impinges on the luminescence conversion material, or providing a radiation-transmissive carrier, applying a luminescence conversion material to an outer area of the carrier by thermal spraying, and arranging the carrier at a radiation exit area of the light-emitting diode chip such that at least part of electromagnetic radiation generated during operation of the light-emitting diode impinges on the luminescence conversion material.

Abstract: In accordance with an embodiment, a method includes conducting a reverse current through a first switch that includes a normally-on transistor coupled in series with a normally-off transistor between a first switch node and a second switch node. While conducting the reverse current, the first switch is turned-off by turning-off the normally-off transistor via a control node of the normally-off transistor and reducing a drive voltage of the normally-on transistor by decreasing a voltage between the control node of the normally-on transistor and a reference node of the normally-on transistor. After turning-off the first switch, a second switch coupled to the first switch is turned on.

Abstract: In an analog-to-digital converter (ADC) having storage capacitors, passive top-plate switch circuitry has at least one diode-configured transistor connected between a first transistor and the top-plate node of the storage capacitors to provide a diode-voltage drop that ensures that the voltage at the node between two transistors is different from the top-plate node voltage in order to reduce GIDL/GISL leakage current through the first transistor that could adversely affect the ADC's digital output value. A corresponding capacitor is connected across each diode-configured device to reduce the amount of charge needed to achieve intermediate-node, steady-state voltages when the switch circuitry is off. In an n-type implementation, a reverse-diode-biased isolation device is connected between the top-plate node and the at least one diode-configured device to prevent the top-plate node from seeing the large dynamic junction capacitance of the at least one diode-configured device.

Abstract: Architecture and designs of display devices are described, where the display devices possesses high spatial resolution as well as high intensity resolution and may be readily used in various projection applications, storage and optical communications. According to one aspect of the present invention, a display device includes an array of image elements, each of the image elements further includes an array of sub-image elements. These sub-image elements are driven by PWM as in digital modulation. A portion of an image element area, namely some of the sub-image elements, is turned on, which has the same perceived effect of turning on an entire image element for a specific time. In addition, various designs of an image element or a sub-image element are described.

Abstract: A source driver for a display, including: a current source that provides an approximately constant current; and multiple channels coupled to multiple source electrodes and including multiple digital to analog converters (DAC), each DAC including: a voltage source that applies a voltage to a source electrode based on the approximately constant current provided by the current source; and a control unit having circuitry that: inputs a digital value; and terminates, based on the digital value, charging of the voltage source by the approximately constant current.

Abstract: Various aspects provide for bending a bending a lead frame of a semiconductor device package into a shape of an “L” and mounting the package on a substrate. A horizontal portion of the bent lead-frame is about parallel with a surface of the package. A vertical portion of the bent lead frame is configured to extend the horizontal portion beyond the surface of the package. A device may be mounted between the substrate and the package.

Abstract: There is provided a display device including: a display panel including a display area consisting of a plurality of pixel areas, and a non-display area surrounding the display area; a plurality of power lines formed on the display area to supply a first voltage to the plurality of pixel areas; a first power link line connected to the plurality of first power lines, and formed on the non-display area; and a plurality of drivers connected to the display panel, and including a plurality of output pads and a plurality of first power pads, the plurality of (first) power pads disposed between the plurality of output pads and respectively connected to the plurality of first power link lines.

Abstract: A VCOM generator circuit generates a VCOM signal for an electronic display. The VCOM circuit includes an operational amplifier having reduced supply rails. In an implementation, the VCOM circuit has at least three supply rails, AVDD, ground or GND, and VP or VN, or both. VP is less than AVDD and greater than VN. VN is higher than ground and below VP. The VCOM circuit with reduced voltage supply rails for VP and VN reduces power consumption of the VCOM op amps. By reducing power consumption, this also reduces the surface temperature of the integrated circuit.

Abstract: An OLED display device includes a display area of a substrate to display images; a non-display area surrounding the display area and applying signals to pixels within the display area; a first thin film transistor formed in the non-display area of the substrate; a second thin film transistor formed in the display area of the substrate; a planarization film formed over the first and second thin film transistors; a first electrode formed on the planarization film in the non-display area and formed with at least one first opening; a second electrode formed on the planarization film and connected to a electrode of the second thin film transistor; a bank pattern formed on the second electrode and the first electrode and exposing a part of the second electrode. The bank pattern is adjacent to the first electrode.

Abstract: An EL element having a novel structure is provided, which is suitable for AC drive. A light-emitting element of the invention is provided with material layers (material layers each having approximately symmetric I-V characteristics with respect to the zero point in a graph having the abscissa axis showing current values and the ordinate axis showing voltage values) between a first electrode and a layer including an organic compound and between the layer including the organic compound and a second electrode respectively. Specifically, each of the material layers is a composite layer including a metal oxide and an organic compound.

Abstract: A pixel unit driving circuit, a pixel unit and a display device, wherein said pixel unit driving circuit of the pixel unit comprises a switching unit (201) having a first terminal connected to a high-voltage signal terminal (Vdd), a second terminal connected to a light-emitting device (OLED), a third terminal connected to a first control line (CN1), and a fourth terminal connected to a second control line (CN2); a driving transistor (T1) having a drain connected to the switching unit (201), and a source connected to a low-voltage signal terminal (Vss); and a capacitance storage unit (202) having a first terminal connected to the gate of the driving transistor (T1), a second terminal connected to the source of the driving transistor (T1), and a third terminal connected to the second control line (CN2).

Abstract: A latch circuit includes an input transistor, a retention capacitor connected between an electrode of the input transistor and a first latch control line, a first transistor having an electrode connected to the first latch control line and a gate connected to the electrode of the input transistor, a second transistor having a gate connected to another electrode of the first transistor and an electrode is connected to the second latch control line, a third transistor having a gate connected to the another electrode of the first transistor and an electrode connected to another electrode of the second transistor and another electrode connected to an output terminal.

Abstract: The present disclosure discloses a pixel unit driving circuit and method, and a pixel unit of an Active Matrix Organic Light Emitting Diode AMOLED panel and a display apparatus.

Abstract: The present invention has been made in an effort to provide an organic light emitting display device comprising a panel; a power supply supplying power to the panel; a current detection unit detecting a current flowing through power line wiring of the panel and outputting the detected current; and a power controller comparing the detected current with a current value configured internally and outputting a shutdown signal which turns off the power supply if the detected current exceeds the predetermined current value.

Abstract: A display apparatus disclosed herein includes a plurality of pixel circuits, each having a plurality of switches configured to receive a driving signal of a predetermined period and to be controlled for opening and closing operation by the driving signal, a drive circuit configured to control the open/closed state of the switches, being operable to scan the pixel circuits and open and close the switches in periods independent of each other.

Abstract: A gate of a driving transistor is set to a offset level corresponding to the threshold of the driving transistor by an initializing current flowing between a source and a drain of the driving transistor or a compensating transistor for the driving transistor. A conduction state of the driving transistor is set according to a gate voltage of the gate of the driving transistor that corresponds to a data signal and the threshold of the driving transistor. A current of which a level corresponds to the conduction state and of which the direction is opposite to the direction of the initializing current flows through driving transistor.

Abstract: Method, apparatus and systems for driving electroluminescent segments in electroluminescent displays are disclosed. Each segment in the display receives a series of first pulses alternating in polarity at a first electrode and a series of second pulses at a second electrode. Each of the second pulses corresponds to one of the first pulses and is opposite in polarity. The width of the second pulses corresponds to the parasitic resistance of the segment.

Abstract: The present invention overcomes image defects such as the brightness inclination or smears by reducing the line resistance of a power source bus line which supplies electricity to organic EL elements. A plurality of pixels which are arranged in a matrix array is connected to power source lines, and the plurality of power source lines are connected to a power source bus line. Both ends of the power source bus line are connected to a power source part via a FPC. By supplying electricity to both ends of the power source bus line from the power source part, the line resistance of the power source bus line can be reduced.

Abstract: An OLED driving circuit is provided. The OLED driving circuit comprises a switch transistor, a storage capacitor, a driving transistor and a control module. In a charging time period, a charging switch of the control module is conducted to connect the storage capacitor and a first voltage end and a data signal is transmitted from the switch transistor to the storage capacitor. In a memory time period, a memory switch of the control module is conducted to connect the storage capacitor and an OLED and the data signal is transmitted from the switch transistor to the storage capacitor. In a light-emitting time period, three light-emitting switches are conducted to connect the driving transistor to the storage capacitor, the first voltage end and the OLED.

Abstract: An EL display panel 10 including an EL substrate 11 and a CF 12 facing each other and resin 1221 filling space between the EL substrate 11 and the CF 12. A common bank 112 having a greater width than banks between first, second, and third areas in each portion of the CF 12 lies between two portions corresponding to a first pixel and an adjacent second pixel. A portion of a CF layer 113 formed with respect to an outermost area among areas of the first pixel that covers a top surface of a bank closest to the second pixel extends towards the second pixel and overlaps a portion of a CF layer formed with respect to an area adjacent to the first pixel among areas of the second pixel that covers a top surface of a bank closest to the first pixel.

Abstract: A TFT for controlling the amount of current flowing into a power supply line when an EL element does not emit light (electric discharge TFT) is provided in each pixel. When an EL driving TFT is turned ON to make an EL element emit light, the electric discharge TFT is turned OFF. On the other hand, the electric discharge TFT is turned ON when the EL driving TFT is turned OFF and no EL element emit light. Therefore variation of the difference in electric potential over the length of a power supply line depending on an image to be displayed is contained. Thus reduced is the difference in amount of current flowing into EL elements in adjacent pixels while the EL elements emit light, thereby avoiding crosstalk.

Abstract: A display method of a plasma display apparatus to which primary color video signals are inputted and which carries out color display by letting phosphors for primary colors emit light is provided. The display method displays the primary color video signals by changing a gray level of an output primary color video signal in accordance with a gray level of an input primary color video signal. When each gray level of the inputted primary color video signals changes from a first value to a second value which is larger than the first value, a gray level of a primary color video signal for a phosphor having the largest influence of luminance saturation properties among the phosphors is increased relative to a gray level of the other primary color video signal.

Abstract: The present invention relates to a plasma display panel including a front substrate, a plurality of electrodes arranged on the front substrate, an upper dielectric layer covering the plurality of electrodes on the front substrate, and a rear substrate arranged opposite to the front substrate, wherein the upper dielectric layer comprises a convex portion thicker than a surrounding portion thereof and a concave portion thinner than a surrounding portion thereof, and the thickness of the portion of the upper dielectric layer corresponding to the concave portion is equal to or more than 0.04 times and equal to or less than 0.9 times of the thickness of the portion of the upper dielectric layer corresponding to the convex portion.

Abstract: An organic light emitting display device operates for an initializing period, a scan period and an emission period divided from one frame period. The organic light emitting display device includes: a data driver for supplying data signals to output lines; a connecting unit for selectively coupling a data line of data lines to a corresponding one of the output lines or an initial power supply, and being positioned between the output lines and the data lines; a second power driver for applying second power having a low level and a high level to pixels positioned at crossing regions of scan lines and the data lines; and a first control line commonly coupled to the pixels, in which each of the pixels includes an organic light emitting diode, and an anode electrode of the organic light emitting diode is supplied with a voltage of the initial power supply for the initializing period.

Abstract: A plasma display apparatus and a method of driving the same are disclosed. The plasma display apparatus includes a plasma display panel including a scan electrode and a sustain electrode that are positioned parallel to each other and a driver. The driver allows a change amount of a voltage difference between the scan electrode and the sustain electrode in a reset period of a subfield over time in a pattern hold mode in which a pattern of input video data remains in a previous pattern to be different from a change amount of a voltage difference between the scan electrode and the sustain electrode in a reset period of a subfield over time in a pattern change mode in which the pattern of the video data changes.

Abstract: This disclosure relates to a method for driving an AC type plasma display panel. According to this disclosure, an elapse time period between an end time point of ramp-down and a time when a first scan pulse is applied is maintained to be uniform even when a ramp-down slope is different in such a manner that a comparator of a scan electrode driving circuit compares an output voltage with a reference voltage and a logic control circuit outputs a control signal to a logic control circuit when the output voltage is equal to the reference voltage. Accordingly, the method for driving the AC type plasma display panel is capable of improving an address characteristic and a driving margin.

Abstract: A pixel circuit and an organic light-emitting diode (OLED) display using the pixel circuit is provided. The pixel circuit includes: an OLED; a third N-channel metal-oxide semiconductor (NMOS) transistor coupled to a data line and a first scan line and configured to apply a data signal to a first node; a storage capacitor having one terminal coupled to the first node and the other terminal coupled to a second node; a fourth NMOS transistor coupled between a first power and the second node and configured to apply a voltage of the first power to the second node; a first NMOS transistor having a first electrode, a second electrode, and a gate electrode coupled to the second node; and a second NMOS transistor coupled between the second node and the first electrode of the first NMOS transistor and configured to diode-connect the first NMOS transistor.

Abstract: The present invention overcomes image defects such as the brightness inclination or smears by reducing the line resistance of a power source bus line which supplies electricity to organic EL elements. A plurality of pixels which are arranged in a matrix array is connected to power source lines, and the plurality of power source lines are connected to a power source bus line. Both ends of the power source bus line are connected to a power source part via a FPC. By supplying electricity to both ends of the power source bus line from the power source part, the line resistance of the power source bus line can be reduced.

Abstract: A compensation circuit of organic light emitting diode comprising a first capacitor, a second capacitor, a stabilizer unit, a third transistor, an organic light emitting diode and a driver unit. The stabilizer unit comprises a first transistor, a second transistor and a photodiode. The driver unit comprises a fourth transistor, a fifth transistor and a sixth transistor. The fifth transistor is used for driving the organic light emitting diode. The first transistor, the second transistor, the third transistor, the fourth transistor and the sixth transistor are used as switches. The first capacitor is used as a compensation capacitor. The second capacitor is used for storing a data voltage. By controlling a voltage of a node in the circuit, the current of the organic light emitting diode can be increased to maintain a stable brightness of the organic light emitting diode.

Abstract: The number of components forming a scan electrode driver circuit is suppressed. For this purpose, a scan pulse generation circuit includes a first electric power supply for generating a positive voltage to be superimposed on the reference electric potential of the scan pulse generation circuit, high-voltage-side transistors for outputting the high-side voltage of the first electric power supply to scan electrodes, and low-voltage-side transistors for outputting the low-side voltage of the first electric power supply to the scan electrodes. A down-waveform generation circuit includes a second electric power supply for generating a positive voltage to be superimposed on the reference electric potential, and a Miller integration circuit that has one terminal connected to the high-voltage side of the second electric power supply and the other terminal connected to the ground electric potential. The down-waveform generation circuit generates a down-ramp waveform voltage falling to a negative voltage.

Abstract: A plasma display device and method of driving the device is disclosed. The device includes a driving circuit for driving reset, address, and sustain periods during a subfield of a frame. The driving circuit includes a single switch which is used to drive a display electrode both during the reset period and during the sustain period. The switch being used for both periods removes the need for a second switch, thereby reducing manufacturing and design costs.

Abstract: A plasma display device is provided. The plasma display device includes a plasma display panel (PDP) which includes an upper substrate on which a plurality of black matrices are formed; and an external light shielding sheet which is disposed at a front of the PDP and includes a base unit and a plurality of pattern units that are formed on the base unit and that have a lower refractive index than the base unit. A distance between a pair of adjacent black matrices is 4-12 times greater than a distance between a pair of adjacent pattern units. Therefore, it is possible for a plasma display device to effectively realize black images and enhance bright room contrast with the aid of an external light shielding sheet which is disposed at a front of a PDP and which absorbs and shields as much external light incident upon the PDP as possible.

Abstract: A display having a first substrate and a second substrate parallel to each other, a cathode layer, a plurality of electroluminescences, a plurality of anodes, and a driving circuit is provided. The first substrate has a first surface. The second substrate has a second surface and a third surface opposite to each other, and the second surface faces the first surface. At least one of the first and the second substrates is transparent. The cathode layer disposed at the first surface has a plurality of tips. The plural electroluminescences are disposed at the second surface, and an interval is formed between the plural electroluminescences and the cathode layer. The positions of the plural anodes are at the third surface and correspond to the positions of plural electroluminescences on the second substrate. The driving circuit is disposed at the third surface and electrically connected to the plural anodes.

Abstract: Image processing and corresponding apparatus, methods and systems. The image processing includes controlling n number of data-line driver circuits included in a display apparatus, the data-line driver circuit driving n number of subpixels. Such controlling causes to display a moving picture image such that frame information of the moving picture image with first frame rate is displayed at a second frame rate, which is 1/n of the first frame rate, and the n number of subpixels included in each pixel are sequentially driven with a time shift, the time shift being 1/n of display period of single frame with the second frame rate.

Abstract: To provide a semiconductor device including an A/D converter circuit that is capable of performing A/D conversion with high accuracy and high resolution and that can be reduced in size. One loop resistance wiring is shared by a plurality of power supply switches and a plurality of output circuits, and a reference voltage having a triangular (step-like) wave generated using the resistance wiring and the plurality of power supply switches is utilized. Thus, high-accuracy digital signals can be obtained using such an A/D converter circuit that can be reduced in size as an output circuit, without using a complicated circuit structure. Further, the number of constituent elements of the A/D converter circuit is small, whereby in the case of providing A/D converter circuits in parallel, variation between the A/D converter circuits can be made small.