Coil-type Circuit Patents (Class 315/397)
  • Patent number: 4218638
    Abstract: A vertical deflection amplifier includes a driver amplifier stage having a source of sawtooth deflection signals at the vertical rate and direct current feedback from the vertical deflection winding as inputs. The driver amplifier stage drives a pair of voltage translation stages each of which drives a transistor in a complementary-symmetry output stage. The voltage translation stages are independent of each other and are biased to operate as constant current sources with no signal present for controlling the quiescent current of the output stage. The improved vertical amplifier can thus be utilized to pass a horizontal rate signal combined with the vertical rate signal to effect image rotation when the deflection amplifier is used with an image pickup tube.
    Type: Grant
    Filed: October 30, 1978
    Date of Patent: August 19, 1980
    Assignee: RCA Corporation
    Inventor: David W. Breithaupt
  • Patent number: 4215295
    Abstract: A sawtooth wave generated in a sawtooth wave generator circuit of a vertical deflection circuit assumes a predetermined maximum voltage at the start of a vertical scan and a minimum voltage which changes depending on a vertical cycle period at the end of the vertical scan. A pulse generator generates a sampling pulse at the end of the vertical scan so that the sawtooth wave voltage at the end of the vertical scan is sampled by the sampling pulse. The sampled sawtooth wave is held until a next sampling pulse is generated so that a D.C. voltage which changes in accordance with the vertical cycle period is produced. The sawtooth wave voltage is level-shifted by a level shifting circuit and thereafter amplified before it is supplied to a vertical deflection coil. The amount of shift by the level shifting circuit is controlled by the D.C. voltage so that the sawtooth wave having a stabilized D.C. component is amplified. Accordingly, a vertical deflection circuit free from D.C.
    Type: Grant
    Filed: September 6, 1978
    Date of Patent: July 29, 1980
    Assignee: Hitachi, Ltd.
    Inventors: Fumio Inoue, Nobuyuki Suzuki
  • Patent number: 4203056
    Abstract: Disclosed is a vertical deflection circuit in which first and second NPN output transistors are connected in series to make up a single-ended push-pull circuit. A vertical deflection coil and a low-value resistor are connected in series between the output terminal of the push-pull circuit and the earth. The second NPN output transistor is driven by a driving transistor which amplifies the oscillated signal produced from a vertical oscillation stage. The voltage generated at the junction point of the vertical deflection coil and the low-value resistor is fed back to the driving transistor. An emitter resistor is inserted between the emitter of the second NPN output transistor and the earth, while a resistor for differentiating the amount of feedback in the former and latter halves of the vertical scanning period is inserted between the emitter of the second NPN transistor and the junction point.
    Type: Grant
    Filed: January 17, 1979
    Date of Patent: May 13, 1980
    Assignee: Hitachi, Ltd.
    Inventor: Takashi Itoh
  • Patent number: 4184105
    Abstract: A vertical drive circuit is provided for supplying a current to a deflection yoke in a CRT display. The vertical drive circuit provides a first voltage which when applied to a deflection yoke will cause the electron beam to be deflected from the top of the screen to the bottom. A retrace circuit supplies a second voltage which will cause the beam to be returned to the top of the screen at the conclusion of a complete vertical scan.
    Type: Grant
    Filed: August 22, 1977
    Date of Patent: January 15, 1980
    Assignee: The Magnavox Company
    Inventor: Merle D. Skelton
  • Patent number: 4176302
    Abstract: A pair of output transistors forming a single-ended push-pull circuit are alternately turned on and off at a vertical cycle to supply a vertical deflection current to a vertical deflection yoke. A low voltage winding is wound on a horizontal flyback transformer connected to a horizontal output transistor. First and second rectifying circuits are provided for rectifying and filtering a horizontal scan period portion and a horizontal flyback portion, respectively, of the voltage developed across the winding, and d.c. outputs of the rectifying circuits are fed to the push-pull circuit as operating power therefor. The first rectifying circuit includes a capacitor-input filter circuit while the second rectifying circuit includes a choke-input filter circuit, a critical current of which choke-input filter is established between a maximum current and a minimum current required for the push-pull circuit.
    Type: Grant
    Filed: April 15, 1977
    Date of Patent: November 27, 1979
    Assignee: Hitachi, Ltd.
    Inventors: Fumio Inoue, Michio Masuda
  • Patent number: 4164688
    Abstract: A deflection amplifier for driving a magnetic-deflection cathode-ray tube in a digital plotter has two switching circuits coupled to low- and high-voltage supplies respectively. An error amplifier compares the actual deflection-coil current, as indicated by the voltage developed across a resistor in series with the coil, with the command input voltage indicating the required current. As long as the difference between required and actual currents is less than a predetermined threshold value, only the low-voltage switching circuit operates, thereby limiting power dissipation. However, if the current difference exceeds the threshold value for at least 2.mu.s, the high-voltage switching circuit commences operation to supplement the drive provided by the low-voltage circuit. The high-voltage circuit is limited by logic circuitry to periods of operation 20.mu.s long with a 5.mu.s quiescent period between each. The low- and high-voltage supplies are bipolar, and corresponding bipolar threshold values are provided.
    Type: Grant
    Filed: September 21, 1977
    Date of Patent: August 14, 1979
    Assignee: The Solartron Electronic Group Limited
    Inventor: Brian M. Cushing
  • Patent number: 4119891
    Abstract: A line sweep magnetic deflection system is triggered to display ultrasonic echo impulses during line by line scanning of a body region. Each trigger impulse produces a nonlinear saw-tooth voltage waveform as a function of time which when converted to a corresponding current waveform in the deflection coil produces a constant line deflection velocity for accurate display of echo signals in spite of nonlinearities in the electron optics of the oscilloscope, for example. High gain differential amplifier means force the coil current to conform to the voltage waveform during active line trace, and deviations during retrace intervals cause the application of an overvoltage to the coil driver stage, blocking a normal operating supply voltage therefor, and rapidly driving the coil to its initial energy state, thereby enabling a higher line sweep frequency with consequent optimum display resolution.
    Type: Grant
    Filed: November 26, 1976
    Date of Patent: October 10, 1978
    Assignee: Siemens Aktiengesellschaft
    Inventors: Richard Soldner, Rudolf Rattmann
  • Patent number: 4105933
    Abstract: A vertical deflection circuit comprises a first transistor, the base of which is impressed with a vertical synchronizing signal so that it is turned on during a vertical blanking period, while it is turned off during a vertical scan period, the collector of which is connected to a constant voltage supply and the emitter of which is connected to a capacitor so that the capacitor is charged to a predetermined voltage during the vertical blanking period. A second transistor has its collector connected to the junction point of the emitter of the first transistor and the capacitor, and the base thereof is connected to another constant voltage supply. Two resistors having a low resistance are inserted in series with a vertical deflection coil and the junction point of the resistors is coupled to the emitter of the second transistor through a feedback resistor. The charge stored in the capacitor during the vertical blanking period is discharged through the second transistor during the vertical scan period.
    Type: Grant
    Filed: January 28, 1977
    Date of Patent: August 8, 1978
    Assignee: Hitachi, Ltd.
    Inventor: Fumio Inoue
  • Patent number: 4100464
    Abstract: An electric amplifying arrangement for supplying current to an inductive load in response to an input signal of saw-tooth waveform, e.g. a deflection amplifier for a cathode ray tube, wherein during the ramp portion of the input voltage a linear relation is maintained between variation in the load current and the input signal (i.e. Class A operation occurs) and, during flyback, energy recovery is provided, thereby providing higher efficiency than is obtained with known Class A saw-tooth amplifiers.
    Type: Grant
    Filed: August 16, 1976
    Date of Patent: July 11, 1978
    Assignee: Elliott Brothers (London) Limited
    Inventor: Charles William Ovenden
  • Patent number: 4096416
    Abstract: In a vertical deflection circuit, a deflection winding is coupled to an output terminal of a deflection amplifier. The amplifier generates a trace current in the winding in response to drive signals coupled to an input terminal of the amplifier. A first voltage source provides an operating voltage for the amplifier. A bidirectional retrace switch couples the output terminal to a second voltage source for providing a greater magnitude voltage for generating a retrace current in the winding. The bidirectional switch has a controlled semiconductor which is responsive to the drive signals for controlling a main conductive path of the switch during a portion of the retrace interval.
    Type: Grant
    Filed: November 19, 1976
    Date of Patent: June 20, 1978
    Assignee: RCA Corporation
    Inventor: Michael Lee Henley
  • Patent number: 4055784
    Abstract: A vertical deflection circuit for television receivers or the like which has an output stage of single-ended push-pull amplifier configuration is provided with a power supply circuit which includes a rectifying circuit connected between a D.C. voltage source and the output stage for rectifying an external A.C. voltage fed thereto to produce an additional D.C. voltage. The power supply circuit supplies a first D.C. voltage from the D.C. voltage source to the output stage during the first half of a trace or scanning period and supplies a second D.C. voltage, obtained by adding the additional D.C. voltage to the D.C. voltage from the D.C. voltage source, to the output stage during the second half of the trace or scanning period and during the retrace period.
    Type: Grant
    Filed: April 21, 1976
    Date of Patent: October 25, 1977
    Assignee: Sony Corporation
    Inventor: Shigeo Tanaka
  • Patent number: 4054816
    Abstract: A recurrent digital sweep signal starts an integrator fed by a constant current. The integrator includes push-pull Darlington stages, which act as alternately conducting controlled current sources for split deflection coils outside the integrator feedback loop. A phase shifter provides arcsine correction. A time-out circuit avoids excessive dissipation if the sweep signal should be lost.
    Type: Grant
    Filed: July 2, 1976
    Date of Patent: October 18, 1977
    Assignee: International Business Machines Corporation
    Inventor: Steven Dennis Keidl
  • Patent number: 4052645
    Abstract: A vertical deflection circuit having a vertical amplifier stage bias voltage stabilizing circuit including a differential amplifier circuit which operates only during the retrace period. One input of the differential amplifier circuit receives a D.C. bias voltage and the other input receives the mean voltage of an output signal. The output of the differential amplifier circuit is fed back to a drive stage to stabilize the bias voltage.
    Type: Grant
    Filed: June 14, 1976
    Date of Patent: October 4, 1977
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Osamu Fujita
  • Patent number: 4031430
    Abstract: This invention relates to improvements in a vertical deflection circuit employing a class D amplifier. The circuit comprises a pulse width modulator for converting a sawtooth waveform signal to a width modulated pulse train, a switch mode power amplifier for amplifying said width modulated pulse train, a demodulating filter circuit for demodulating said width modulated pulse train to the sawtooth waveform, a damping circuit for preventing a significant power loss in said demodulating filter circuit and a deflection yoke coupled to said demodulating filter circuit, thereby making it possible to reduce power dissipation in the circuit.
    Type: Grant
    Filed: November 12, 1975
    Date of Patent: June 21, 1977
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Shigeru Enomoto
  • Patent number: 4024433
    Abstract: A field deflection output circuit in which the end of the deflection coil which is not connected to the output amplifier is coupled with a terminal of a voltage source during the scan period and with the other terminal of this voltage source during the flyback period.
    Type: Grant
    Filed: September 17, 1975
    Date of Patent: May 17, 1977
    Assignee: U.S. Philips Corporation
    Inventor: Jan Abraham Cornelis Korver
  • Patent number: 4023069
    Abstract: A push-pull amplifier, which is supplied with a first voltage, provides deflection current to a vertical deflection winding during a trace period of each deflection cycle. The amplifier is switched off by an input waveform to initiate the retrace interval. A voltage developed across the winding to oppose a change in deflection current activates switching means to couple the winding to a second voltage source during retrace. The voltage applied to the winding during retrace is of greater magnitude than the first voltage. The switching means bypasses the winding current away from the main conducting paths of the amplifier during retrace.
    Type: Grant
    Filed: April 28, 1976
    Date of Patent: May 10, 1977
    Assignee: RCA Corporation
    Inventor: John Charles Peer
  • Patent number: 3993930
    Abstract: A vertical deflection system including a driver circuit energized by a voltage source having a sufficient magnitude to provide a trace deflection signal to the vertical deflection winding and a retrace voltage source switched into the circuit with the vertical deflection winding to provide adequate voltage for effecting vertical retrace of the electron beam deflection in a cathode ray tube is disclosed.
    Type: Grant
    Filed: June 16, 1975
    Date of Patent: November 23, 1976
    Assignee: GTE Sylvania Incorporated
    Inventors: Martin Fischman, Jesse H. L'Hommedieu
  • Patent number: 3983452
    Abstract: A push-pull common emitter deflection output stage energized by a relatively low direct voltage includes zener diode drive coupling to its input circuit for reducing crossover distortion. A diode in series with a deflection winding disconnects the output stage from the winding during a portion of the retrace interval to allow the retrace pulse voltage to rise to a relatively high direct voltage supplied through a switched transistor only during the retrace interval to reduce power dissipation in the output stage. Current feedback from the deflection winding to a driver stage during trace and retrace intervals accurately determines the retrace duration.
    Type: Grant
    Filed: March 31, 1975
    Date of Patent: September 28, 1976
    Assignee: RCA Corporation
    Inventor: Lucas John Bazin
  • Patent number: 3979641
    Abstract: A vertical deflection output circuitry for a television receiver wherein two transistors are connected in single ended and push-pull relation, and the output junction point of the two transistors is connected, to a D.C. power source for supplying a higher voltage than that of a power source for the vertical deflection output circuitry, through a switch which is turned off during the vertical scan period and turned on during the vertical retrace period.
    Type: Grant
    Filed: May 28, 1974
    Date of Patent: September 7, 1976
    Assignee: Hitachi, Ltd.
    Inventors: Yoshihiro Arakawa, Akio Nakashima, Shunji Iwabuchi, Kenji Ando
  • Patent number: 3978372
    Abstract: In a vertical deflection output circuit comprising two transistors connected in push-pull configuration, the junction point of the two transistors is connected through a series circuit of a capacitor and a vertical deflection coil, with a first power source and also connected through a switch, which is turned on during the vertical retrace period, with a second power source whose voltage is higher than that of the first power source, and one end of a bootstrap capacitor is connected with the junction point while the other end of the bootstrap capacitor is connected with the base of one of the two transistors and also connected through a resistor with the second power source, whereby the bootstrap capacitor is prevented from being exposed to a voltage whose polarity is opposite to that of the voltage developed across the bootstrap capacitor due to the charging thereof.
    Type: Grant
    Filed: December 2, 1974
    Date of Patent: August 31, 1976
    Assignee: Hitachi, Ltd.
    Inventor: Shunji Iwabuchi
  • Patent number: 3965390
    Abstract: A cathode ray tube linear beam deflection system capable of operation over a wide range of beam deflection rates providing automatic power supply voltage switching to maintain linear operation and provide minimum power dissipation. Information for the automatic switching is obtained by continuously monitoring the yoke voltage, the power supply voltage being switched to a voltage of higher magnitude when the yoke voltage exceeds a predetermined level and returned to the power supply voltage of lower magnitude when the higher magnitude voltage is no longer required.
    Type: Grant
    Filed: February 21, 1975
    Date of Patent: June 22, 1976
    Assignee: Sperry Rand Corporation
    Inventor: James M. Spencer, Jr.
  • Patent number: 3950672
    Abstract: A vertical sweep circuit includes a first transistor supplied with a sawtooth voltage. A voltage drop is developed across a resistor by a vertical sweep current for producing a first voltage across a first load. A second transistor is supplied with the first voltage for producing a second voltage across a second load, and a pair of push-pull connected transistors are supplied with the second voltage for producing the sweep current. An additional transistor of the same conductivity type as the second transistor is included in the circuit. Responsive to the first voltage, the additional transistor produces voltage pulses at a point of connection thereto of an additional load, which is greater than the second load to make the second and additional transistors operate as a linear amplifier transistor and a switching transistor, respectively. Vertical blanking pulses are produced from the voltage pulses.
    Type: Grant
    Filed: June 10, 1974
    Date of Patent: April 13, 1976
    Assignee: Nippon Electric Co., Ltd.
    Inventors: Hirokazu Fukaya, Kenji Andou, Akio Nakashima
  • Patent number: 3939380
    Abstract: A class D amplifier, suitable for use as a vertical deflection amplifier in a television receiver, includes two transistors coupled to function in a push-pull manner. Two diodes are serially coupled with each other in parallel with the output transistors and are poled to conduct forward current in a direction opposite to the forward current of the two transistors. A junction of the two transistors is coupled to a junction of the two diodes and forms an output terminal to which a deflection winding is coupled. A series of pulses at a first frequency, such as the horizontal deflection frequency or a multiple thereof, are pulse width modulated in accordance with the amplitude of a sawtooth waveform at a second frequency, such as the vertical deflection frequency, in a pulse width modulation stage and are coupled to the input terminals of the two transistors. The two transistors are alternately enabled for conduction by the pulse width modulated signals.
    Type: Grant
    Filed: February 21, 1974
    Date of Patent: February 17, 1976
    Assignee: RCA Corporation
    Inventor: John Charles Peer