With Additional Series Regulator Patents (Class 323/224)
  • Patent number: 7821238
    Abstract: A system and a method are disclosed for providing an optimized feedback loop compensation for a buck/boost switching converter circuit. The buck/boost switching converter circuit may be operating in either a continuous conduction mode boost mode, or a continuous conduction mode buck mode, or a discontinuous conduction mode. A compensation circuit is provided that includes an error amplifier circuit that includes at least one compensation capacitor that provides an additional capacitance that adjusts a location of at least one dominant pole and at least one compensation zero of the buck/boost switching converter circuit to provide optimized feedback loop compensation.
    Type: Grant
    Filed: June 9, 2008
    Date of Patent: October 26, 2010
    Assignee: National Semiconductor Corporation
    Inventor: Yushan Li
  • Patent number: 7812577
    Abstract: A Single Ended Primary Inductance Converter (SEPIC) fed BUCK converter includes: a first switch configured to open or close according to a first signal; a SEPIC portion coupled to the first switch and coupled to an energy source, the SEPIC portion comprising a first set of one or more passive components; a BUCK converter portion coupled to the first switch, the BUCK converter portion comprising a second set of one or more passive components. While the first switch is closed, the SEPIC portion is configured to store energy from an energy source in at least some of the first set of passive components and deliver energy to the BUCK portion, and the BUCK converter portion is configured to deliver energy to a load and to store energy in at least some of the second set of passive components. While the first switch is open, the SEPIC portion is configured to deliver at least some of its stored energy to the load, and the BUCK converter portion is configured to deliver at least some of its stored energy to the load.
    Type: Grant
    Filed: November 14, 2008
    Date of Patent: October 12, 2010
    Inventor: Fred O. Barthold
  • Patent number: 7812578
    Abstract: A DC-DC converter includes a series circuit of a main switch and a choke coil and an output capacitor connected to one end of the series circuit and outputs a DC voltage from the one end of the series circuit. A first MOS transistor is connected in parallel to the series circuit and a second MOS transistor is connected in parallel to the output capacitor. A control circuit controls the gate voltages of the first MOS transistor and/or the second MOS transistor so that the first MOS transistor and/or the second MOS transistor outputs a changed target output voltage, whereby the output voltage is made equal to the target voltage at high speed.
    Type: Grant
    Filed: June 3, 2008
    Date of Patent: October 12, 2010
    Assignee: Fuji Electric Systems Co., Ltd.
    Inventors: Satoshi Sugahara, Kouhei Yamada, Tetsuya Kawashima, Akira Yamazaki
  • Patent number: 7808219
    Abstract: An AC/DC power converter has, as its first stage, a capacitor divider and rectifier and, as the second stage, a switch mode power supply. This configuration may be suitable for low power low voltage aerospace applications. The benefits of the circuit may include small reactive component size; near sinusoidal input current, low EMI emissions resulting from low inrush current; intrinsic current limiting that may eliminate the need for short circuit protection; and low overall component count.
    Type: Grant
    Filed: November 26, 2007
    Date of Patent: October 5, 2010
    Assignee: Honeywell International Inc.
    Inventors: Yang Ye, Wenjiang Yu, Yuanli Kathy Kang, Zhenning Z. Liu, Randy J. Fuller
  • Patent number: 7808218
    Abstract: One embodiment of the invention includes a power regulator system. The system comprises an error amplifier that provides an error voltage based on a comparison of a reference voltage and a feedback voltage associated with an output voltage of the power regulator system. The system also comprises a pulse-width modulation (PWM) comparator configured to generate a switching signal that controls activation and deactivation of at least one power switch. The PWM comparator defining a duty-cycle of the switching signal based on the error voltage. The system further comprises a current limit circuit configured to clamp the error voltage upon the error voltage exceeding a voltage limit having a magnitude that varies as a function of the duty-cycle to provide a predetermined current limit that is substantially fixed independent of the duty-cycle.
    Type: Grant
    Filed: November 6, 2008
    Date of Patent: October 5, 2010
    Assignee: Texas Instruments Incorporated
    Inventors: Jingwei Xu, Jian Liang
  • Patent number: 7791324
    Abstract: A synchronous regulator includes a controller coupled to receive a reference signal and a feedback signal from the regulator operable to provide a pulse width modulation (PWM) signal at its output. The regulator includes at least one gate driver coupled to receive the PWM signal, and a synchronous output switch having a phase node there between controlled by the gate driver, and regulator input current measurement circuitry. The regulator input current measurement circuitry comprises a circuit operable for providing a signal representative of at least one phase node timing parameter, a sensing circuit operable for sensing inductor or output current provided by the regulator, and a calculation circuit coupled to receive the signal representative of the phase node timing parameters and the inductor or output current and is operable to determine the input current.
    Type: Grant
    Filed: March 31, 2008
    Date of Patent: September 7, 2010
    Assignee: Intersil Americas Inc.
    Inventors: Gustavo James Mehas, Naveen Jain, Jayant Vivrekar, Michael Jason Houston
  • Patent number: 7786711
    Abstract: Conduction loss in the body-diode of a low side MOSFET of a power switching stage of one phase of a coupled-inductor, multi-phase DC-DC converter circuit, associated with current flow in the output inductor of that one phase that is induced by current flow in a mutually coupled output inductor of another phase, during normal switching of that other stage, is effectively prevented by applying auxiliary MOSFET turn-on signals, that coincide with the duration of the induced current, to that low side MOSFET, so that the induced current will flow through the turned-on low side MOSFET itself, thereby by-passing its body-diode.
    Type: Grant
    Filed: October 27, 2008
    Date of Patent: August 31, 2010
    Assignee: Intersil Americas Inc.
    Inventors: Jia Wei, Kun Xing
  • Patent number: 7782025
    Abstract: A semiconductor device capable of reducing an inductance is provided. In the semiconductor device in which a rectification MOSFET, a commutation MOSFET, and a driving IC that drives these MOSFETs are mounted on one package, the rectification MOSFET, a metal plate, and the commutation MOSFET are laminated. A current of a main circuit flows from a back surface of the package to a front surface thereof. The metal plate is connected to an output terminal via a wiring in the package. Wire bondings are used for wirings for connecting the driving IC, the rectification MOSFET, and the commutation MOSFET, all terminals being placed on the same plane. For this reason, the inductance becomes small and also a power source loss and a spike voltage are reduced.
    Type: Grant
    Filed: January 6, 2009
    Date of Patent: August 24, 2010
    Assignee: Renesas Electronics Corp.
    Inventors: Takayuki Hashimoto, Nobuyoshi Matsuura, Masaki Shiraishi, Yukihiro Satou, Tetsuya Kawashima
  • Patent number: 7782031
    Abstract: A method includes simultaneously driving a load via first and second magnetically coupled regulator phases for a first duration, uncoupling one of the phases from the load after the first duration, and, after uncoupling the one phase from the load, allowing a current through the one phase to decay. For example, such a method allows energy stored in the uncoupled phase to be recaptured to the output transient response of a power supply.
    Type: Grant
    Filed: January 4, 2008
    Date of Patent: August 24, 2010
    Assignee: Intersil Americas Inc.
    Inventors: Weihong Qiu, Shangyang Xiao, Jun Liu
  • Patent number: 7782024
    Abstract: A switching control circuit comprises: an error amplifying circuit configured to output an error voltage obtained by amplifying an error between a feedback voltage corresponding to an output voltage and a lower voltage selected out of a first reference voltage increasing with time passage and a second reference voltage used as a reference for a target level; a comparison circuit configured to output a comparison signal obtained by comparing the feedback voltage with the error voltage output from the error amplifying circuit; and a drive circuit configured to output first and second control signals for controlling first and second transistors, respectively, in order to turn the output voltage to the target level by complementarily turning on and off the first and second transistors, after the error voltage exceeds the feedback voltage, based on the comparison signal output from the comparison circuit.
    Type: Grant
    Filed: April 4, 2007
    Date of Patent: August 24, 2010
    Assignees: Sanyo Electric Co., Ltd., Murata Manufacturing Co., Ltd.
    Inventors: Iwao Fukushi, Masahiro Maruki, Takashi Noma
  • Patent number: 7782039
    Abstract: A regulated power supply includes an inverter comprising an upper switch and a lower switch that are connected in series. A control module selectively controls the upper switch and the lower switch in one of a pulse width modulation (PWM) mode and a discrete control mode (DCM), receives a feedback signal from an output of the regulated power supply, and switches between the PWM mode and the DCM based on the feedback signal.
    Type: Grant
    Filed: September 15, 2005
    Date of Patent: August 24, 2010
    Assignee: Marvell International Ltd.
    Inventor: Runsheng He
  • Patent number: 7777458
    Abstract: A Single Ended Primary Inductance Converter (SEPIC) fed BUCK converter includes: a first switch configured to open or close according to a first signal; a SEPIC portion coupled to the first switch and coupled to an energy source, the SEPIC portion comprising a first set of one or more passive components; a BUCK converter portion coupled to the first switch, the BUCK converter portion comprising a second set of one or more passive components. While the first switch is closed, the SEPIC portion is configured to store energy from an energy source in at least some of the first set of passive components and deliver energy to the BUCK portion, and the BUCK converter portion is configured to deliver energy to a load and to store energy in at least some of the second set of passive components. While the first switch is open, the SEPIC portion is configured to deliver at least some of its stored energy to the load, and the BUCK converter portion is configured to deliver at least some of its stored energy to the load.
    Type: Grant
    Filed: November 14, 2008
    Date of Patent: August 17, 2010
    Inventor: Fred O. Barthold
  • Patent number: 7777457
    Abstract: A converter including an inductor (L), a first switch (SW1, S1) connected between an input terminal (Vin) and the inductor, a diode/switch (D1, S2), connected between the first end of the inductor and ground, a diode/switch (D2, S3) connected between the inductor and an output terminal (Vout), and a second switch (SW2, S4) coupled between inductor and ground. A current sensor senses current in the first switch (SW1, S1) as a measure of inductor current. Waveform generators (31, 32) generate buck and boost slope compensation ramps (RMP-BUCK, RMP-BOOST). Control logic (10) opens and closes the switches every clock period at individual duty cycles determined using a feedback signal derived from the output terminal, the sensed current and the slope compensation ramps. The slope compensation ramps are mutually offset such that current sensing is needed only while the first switch (SW1, S1) is closed.
    Type: Grant
    Filed: October 4, 2007
    Date of Patent: August 17, 2010
    Assignee: Wolfson Microelectronics plc
    Inventor: Holger Haiplik
  • Patent number: 7772812
    Abstract: A power meter for measuring power consumption and detecting the presence of an unsafe line condition is disclosed. The power meter has a service disconnect switch, which is interposed between load contacts and source contacts, the disconnect switch interrupts the flow of power from the source contacts to the load contacts when the disconnect switch is in an open position. The power meter also has a processor coupled to a two input signal processing circuit. The two input signal processing circuit receives a first and second voltage signal from the load contacts. The two input signal processing circuit converts the first and second voltage signal into a first and second voltage value. The processor computes the power consumption using the first and second voltage values in combination with current values.
    Type: Grant
    Filed: July 17, 2008
    Date of Patent: August 10, 2010
    Assignee: Elster Electricity, LLC
    Inventor: Kenneth C. Shuey
  • Patent number: 7772811
    Abstract: A power supply circuit includes one or more reference voltage generators that respectively generate a time-varying output voltage reference value as well as a corresponding time-varying output current reference value. During operation, the reference voltage generators produce different step values for the time-varying output voltage reference value and the corresponding time-varying output current reference value over time such that the power supply has a substantially fixed output impedance value. According to one configuration, the time-varying output voltage reference value tracks the power supply output voltage. Via a comparison of the power supply output voltage with respect to the adaptive output voltage reference voltage value and a comparison of the output current to the corresponding time-varying output current reference value, a controller circuit associated with the power supply controls switching operation of the power supply to regulate the power supply output voltage.
    Type: Grant
    Filed: July 13, 2007
    Date of Patent: August 10, 2010
    Assignee: CHiL Semiconductor Corporation
    Inventors: Praveen K. Jain, Shangzhi Pan
  • Patent number: 7772823
    Abstract: A controller (1) comprises a comparator (10) which compares an input signal (Vo) with a reference signal (Vr) to obtain an error signal (ER). An integrator (11) applies an integrating action on the error signal (ER) to obtain a control signal (ICO). The integrator (11) allows influencing the integrating action. A copy circuit (81) supplies a copy control signal (ICOC) being proportional to the control signal (ICO). A determination circuit (85) determines whether the copy control signal (ICOC) reaches a limit value (IMIN, IMAX). An influencing circuit (83) influences the integrating action to limit the control signal (ICO) when the copy control signal (ICOC) reaches the limit value (IMIN, IMAX).
    Type: Grant
    Filed: September 23, 2005
    Date of Patent: August 10, 2010
    Assignee: ST-Ericsson SA
    Inventor: Pieter G. Blanken
  • Patent number: 7772810
    Abstract: A fully digital DC/DC automatic up/down converter circuit converts an input voltage to an output voltage of a predetermined value based on a switching operation. The switching operation includes switching operation comprise-cycles having at least one switching operation phase. The converter is controlled by a digital controller having a look-up table in which a plurality of data is stored. The digital controller uses certain data from the plurality of data with respect to an actual switched operating mode for continuously adjusting the begin and the end of a switching operation. The switched operating modes are a PWM and a PFM mode.
    Type: Grant
    Filed: August 4, 2005
    Date of Patent: August 10, 2010
    Assignee: ST-Ericsson SA
    Inventors: Henricus C. J. Buethker, Lambert J. H. Folmer, Cornelis Stienstra
  • Patent number: 7768243
    Abstract: A switched-mode power converter, including, between a first end of a main inductive element and a switch, a two-value inductive element automatically switching between its two values.
    Type: Grant
    Filed: January 31, 2008
    Date of Patent: August 3, 2010
    Assignee: STMicroelectronics S.A.
    Inventors: Francis Cuellar, Bertrand Rivet
  • Patent number: 7768214
    Abstract: A step-up/step-down regulator circuit wherein a switch has a terminal connected to an end of an inductor, another terminal grounded, and a control terminal connected to an end of a switch. In this way, performing an open/close control of the switch can indirectly perform an open/close control of the switch, thereby solving the problem that the structure and operation of a switch control circuit will be complicated when the switching between step-up and step-down operation is realized.
    Type: Grant
    Filed: October 21, 2005
    Date of Patent: August 3, 2010
    Assignee: Rohm Co., Ltd.
    Inventors: Mikiya Doi, Kenichi Nakata
  • Patent number: 7764055
    Abstract: A supply voltage controlled power amplifier includes a power amplifier, a closed power control loop configured to generate a power control signal, and a voltage regulator coupled to the power control loop, the voltage regulator including a first regulator stage, a second regulator stage, and a peak detector, wherein an output of the second regulator stage is applied as a feedback signal to the first regulator stage and wherein an output of the first regulator stage is decreased to a level consistent with an output of the power amplifier and an additional operating buffer amount.
    Type: Grant
    Filed: July 10, 2006
    Date of Patent: July 27, 2010
    Assignee: Skyworks Solutions, Inc.
    Inventors: Dmitriy Rozenblit, Tirdad Sowlati, Morten Damgaard, Darioush Agahi
  • Patent number: 7764054
    Abstract: A voltage regulator with current-mode, dual-edge pulse width modulation (PWM) and non-linear control. The voltage regulator may include a top switch (e.g., MOSFET) configured to couple a power supply supplying an input voltage to a load. A linear control circuit of the regulator may use a first ramp signal to control turning ON of the top switch and a second ramp signal to control turning OFF of the top switch. A non-linear control circuit may turn ON the top switch upon detection of a load current step-up change to maintain an output voltage of the regulator within its regulation band. The non-linear control circuit may turn OFF the top switch upon a load current step-down change to prevent output voltage overshoot.
    Type: Grant
    Filed: May 21, 2008
    Date of Patent: July 27, 2010
    Assignee: Fairchild Semiconductor Corporation
    Inventors: Yigang Guo, Francesco Carobolante
  • Patent number: 7750608
    Abstract: Systems and methods for increasing driver power dissipation efficiency in a low noise current supply utilizing a power supply and a voltage regulator to power an output current regulator. An analog processing circuit adjusts the voltage drop on the voltage regulator, to make it equal with the voltage drop on current regulator.
    Type: Grant
    Filed: February 14, 2008
    Date of Patent: July 6, 2010
    Assignee: Newport Corporation
    Inventor: Adrian S. Nastase
  • Patent number: 7750616
    Abstract: A buck converter LED driver circuit is provided. The driver circuit includes a buck power stage, a rectified AC voltage source, a voltage waveform sampler, and a control circuit. The buck power stage includes at least one LED and provides a first signal directly proportional to the current through the LED. The rectified AC voltage source is coupled to the buck power stage for driving the buck power stage. The voltage waveform sampler is coupled to the rectified AC voltage source for providing a second signal directly proportional to the voltage provided by the rectified AC voltage source. The control circuit is coupled to the voltage waveform sampler and the buck power stage for turning on and turning off the buck power stage according to a comparison between the first signal and the second signal.
    Type: Grant
    Filed: June 21, 2007
    Date of Patent: July 6, 2010
    Assignee: Green Mark Technology Inc.
    Inventor: Kwang-Hwa Liu
  • Patent number: 7746043
    Abstract: A method and system monitor gate charge characteristics of one or more field effect transistors in a switching power converter to detect an end of an inductor flyback time interval. The switching power converter includes a switch coupled to an inductor to control current flow in the inductor. When the switch turns OFF, a collapsing magnetic field causes the inductor current to decrease and the inductor voltage to reverse polarity. When the magnetic field completely collapses, the inductor current goes to zero. At the end of the inductor flyback time interval, a voltage is induced across a Miller capacitance of the switch. The voltage can be detected as a transient change in the gate voltage of the switch. A switch gate sensor detects the gate voltage change associated with the end of the inductor flyback time interval and provides a signal indicating an end of the inductor flyback time interval.
    Type: Grant
    Filed: December 31, 2007
    Date of Patent: June 29, 2010
    Assignee: Cirrus Logic, Inc.
    Inventor: John L. Melanson
  • Patent number: 7741901
    Abstract: For charging a bootstrap capacitor in a voltage converter, a circuit is provided for wider bandwidth to eliminate the feedback stability issue and pin out for compensation circuit. A pair of transistors are connected in series between a power input and the bootstrap capacitor, the first transistor is switched synchronously with a low-side transistor of the voltage converter, and a comparator compares a feedback voltage drawn from a feedback node between the pair of transistors with a reference voltage, to control the second transistor to determine to charge the bootstrap capacitor.
    Type: Grant
    Filed: February 5, 2008
    Date of Patent: June 22, 2010
    Assignee: Richtek Technology Corp.
    Inventors: Sao-Hung Lu, Isaac Y. Chen
  • Patent number: 7741818
    Abstract: A voltage regulator is disclosed. The voltage regulator includes an output unit for converting an input voltage provided by a power source into a predetermined voltage, and for outputting the converted voltage, a monitoring unit for determining whether the input voltage provided by the power source is greater than a reference voltage, and a step-up unit for stepping up the input voltage provided by the power source if the monitoring unit determines that the input voltage is less than the reference voltage. The output unit includes a converting unit for converting the stepped-up voltage into the predetermined voltage.
    Type: Grant
    Filed: June 4, 2007
    Date of Patent: June 22, 2010
    Assignee: Ricoh Company, Ltd.
    Inventor: Hideki Agari
  • Patent number: 7737666
    Abstract: Systems and techniques for efficient power regulators with improved reliability. A power regulator may include a first driver including a first switch and a second switch, where a power dissipation of the first switch is less than a power dissipation of the second switch. The power regulator may include a second driver. The first and second switches may be implemented as transistors, which may have different on-state breakdown voltages and/or on-state drain source resistances.
    Type: Grant
    Filed: December 22, 2003
    Date of Patent: June 15, 2010
    Assignee: Marvell World Trade Ltd.
    Inventors: Sehat Sutardja, Jianchen Zhang, Sofjan Goenawan
  • Patent number: 7733068
    Abstract: A DC-DC converter includes a switching transistor connected to an inductor and a power input terminal, with the inductor connected to an output terminal, a synchronous rectification transistor connected to a junction node therebetween, a first electric current detector to detect whether or not an electric current flowing through the synchronous rectification transistor is larger than a first electric current, a second electric current detector to detect whether or not the electric current flowing through the synchronous rectification transistor is larger than a second electric current that is larger than the first electric current, and a selection mechanism to select one of the first and second electric current detectors in accordance with a control signal. The synchronous rectification transistor is turned off by outputting an output signal the selected current detector.
    Type: Grant
    Filed: August 19, 2009
    Date of Patent: June 8, 2010
    Assignee: Ricoh Company, Ltd.
    Inventor: Ippei Noda
  • Patent number: 7733074
    Abstract: To provide a control circuit of a current mode DC-DC converter, a current mode DC-DC converter and a control method thereof having excellent high-speed responsiveness with respect to fluctuations in output voltage. The control circuit of the current mode DC-DC converter serves as a DC-DC converter 1 that controls a peak value of a coil current and comprises a window comparator that detects whether an output voltage VOUT is within a predetermined voltage range including a target voltage, and a peak current setting unit that sets a peak current setting value of a coil current to a lower limit value or an upper limit value in response to a high or low voltage level of the output voltage VOUT, in the case that the output voltage VOUT is not within the predetermined voltage range including the target voltage.
    Type: Grant
    Filed: November 8, 2007
    Date of Patent: June 8, 2010
    Assignee: Fujitsu Microelectronics Limited
    Inventors: Morihito Hasegawa, Takashi Matsumoto, Ryuta Nagai
  • Patent number: 7719247
    Abstract: A DC/DC converter includes a switch, an inductor, a capacitor, a resistor, and a voltage divider. The switch is coupled to the input voltage. The inductor is used for coupling the first switch to an output node of the DC/DC converter so as to generate the output voltage at the output node. The capacitor is coupled to the output voltage. The resistor is coupled to the capacitor in series, and is coupled to ground. The voltage divider is coupled across the capacitor so as to reduce the zero frequency of the DC/DC converter.
    Type: Grant
    Filed: September 29, 2008
    Date of Patent: May 18, 2010
    Assignee: O2Micro International Limited
    Inventors: Laszlo Lipcsei, Sorin Hornet
  • Patent number: 7714547
    Abstract: The teachings presented herein provide a method and apparatus for operating constant on-time DC/DC converters, including pseudo constant on-time variants, with a virtual current-mode slope signal. Use of the slope signal provides, among other advantages and improvements, greater noise immunity and the ability to operate with a wider range of converter output filters. More particularly, incorporating a properly synchronized slope signal into the on-time triggering comparison provides for a maximum slope offset at on-time triggering. Doing so prevent double-pulsing (i.e., erroneous on-time retriggering) and other undesirable behavior of conventional constant on-time DC/DC converters and, as a particular but non-limiting advantage, allows ready and advantageous use of the slope-compensated converter as taught herein with low ESR capacitors in the output filter.
    Type: Grant
    Filed: August 8, 2008
    Date of Patent: May 11, 2010
    Assignee: SEMTECH Corporation
    Inventors: John Kenneth Fogg, Pankaj Kashikar
  • Patent number: 7710084
    Abstract: A sample and hold inductor current sense configuration senses inductor current flowing through an output inductor of a voltage regulator and generates an average of the sensed inductor current. The average of the sensed inductor current may be generated from samples of peaks and valleys of the sensed inductor current. For example, the peak of the sensed inductor current may be stored in a first capacitor and the valley of the sensed inductor current may be stored in a second capacitor. The first and second capacitors may be coupled together to generate the average of the sensed inductor current. The average of the sensed inductor current may be provided to a droop control circuit to control droop of an output voltage of the voltage regulator. An input offset voltage of a current sense amplifier sensing the inductor current may be calibrated between samplings of the sensed inductor current.
    Type: Grant
    Filed: March 19, 2008
    Date of Patent: May 4, 2010
    Assignee: Fairchild Semiconductor Corporation
    Inventor: Yigang Guo
  • Patent number: 7705570
    Abstract: A power supply trim control signal is produced by integrating differences between monitored and target values of the output voltage of a power supply. Register storage requirements are reduced by producing the target value from a nominal voltage value and one of a plurality of margin offsets selected in accordance with control data. The control data also selects between open and closed loop trim control. Stability is enhanced by changing the target value slowly in response to any change in the control data.
    Type: Grant
    Filed: January 26, 2009
    Date of Patent: April 27, 2010
    Assignee: Power Integrations, Inc.
    Inventors: David Alan Brown, Mircea Cristian Boros
  • Patent number: 7683590
    Abstract: A step-down switching DC-DC converter may include an input coil on the input side, an output coil on the output side, a switch, an output capacitor, a first series circuit connected between a connection point on which the input coil and the switch are connected each other and a negative pole of a power source, and a second series circuit connected between a connection point on which the output coil and the switch are connected to each other and the negative pole of the power source. A connection point between a first intermediate capacitor and the first intermediate coil is connected to a connection point between a second intermediate capacitor and the switch via a switching device cooperating with the switch. The input coil and the first intermediate coil are electromagnetically coupled with each other. The output coil and the second intermediate coil are electromagnetically coupled with each other.
    Type: Grant
    Filed: March 13, 2009
    Date of Patent: March 23, 2010
    Assignee: NEC Corporation
    Inventor: Teiji Yoshida
  • Patent number: 7679350
    Abstract: A switch-mode DC/DC converter (101) and linear low drop out (LIDO) DC/DC regulator (105) are connected in parallel to drive a single load Both regulators share a common voltage reference, feedback network (103), input supply and output such that the regulated voltage is identical during each mode of operation. During heavy loads the switch-mode regulator (107) is in operation and the linear regulator is disabled for the highest efficiency possible. Conversely at light loads the linear regulator is in operation with the switch-mode regulator (107) disabled, also maximizing the efficiency. Each regulator senses load current (131) to automatically transition between the appropriate voltage regulators at fixed load current levels. The presented invention also includes a make before break transition scheme of the voltage regulators (103) to minimize the voltage transients.
    Type: Grant
    Filed: February 5, 2004
    Date of Patent: March 16, 2010
    Assignee: Monolithic Power Systems, Inc.
    Inventors: Christopher T. Falvey, Andrew Wu
  • Patent number: 7679342
    Abstract: A power converter and method of controlling a power switch therein to improve power conversion efficiency at low output current. In one embodiment, the power converter includes a first power switch coupled to a source of electrical power and a second power switch coupled to the first power switch and to an output terminal of the power converter. The power converter also includes a controller configured to alternately enable conduction of the first and the second power switches with a duty cycle in response to an output characteristic of the power converter. The controller is configured to control a level of current in the first power switch when the second power switch is substantially disabled to conduct.
    Type: Grant
    Filed: April 16, 2008
    Date of Patent: March 16, 2010
    Assignee: Enpirion, Inc.
    Inventors: Douglas D. Lopata, Ashraf W. Lotfi
  • Patent number: 7679341
    Abstract: A switching regulator integrated circuit (IC) is disclosed that includes a switch circuit that further includes a first switch and a second switch, a mode selector circuit controlled by external circuitry to select between a first mode and a second mode, and a control circuit. In response to a feedback signal from the switch circuit, when the first mode is selected, the control circuit toggles the first switch and the second switch ON and OFF alternately at a fixed first frequency. When a second mode is selected, the control circuit causes the second switch to turn OFF completely and the first switch to switch ON and OFF at a variable second frequency.
    Type: Grant
    Filed: December 12, 2007
    Date of Patent: March 16, 2010
    Assignee: Monolithic Power Systems, Inc.
    Inventor: Wei Chen
  • Patent number: 7679339
    Abstract: A switching power supply includes input terminals, which receive a first voltage, and a switching converter stage, provided with a first switching device. The power supply further includes a second switching device, connected between the input terminals and the switching converter stage, and an activation device, associated with the second switching device for controlling the second switching device so as to limit a second voltage applied to the switching converter stage.
    Type: Grant
    Filed: July 28, 2006
    Date of Patent: March 16, 2010
    Assignee: STMicroelectronics S.r.l.
    Inventors: Fabrizio Gaetano Di Franco, Cosimo Leonardi, Rosario Davide Stracquadaini, Francesco Giovanni Gennaro
  • Patent number: 7679340
    Abstract: Methods and apparatus relating to low power optimized voltage regulators are described. In one embodiment, a voltage regulator controller may cause leakage current from a load to drain a capacitor (e.g., coupled in parallel with the load) during a reduced power state.
    Type: Grant
    Filed: June 29, 2007
    Date of Patent: March 16, 2010
    Assignee: Intel Corporation
    Inventors: Krishnan Ravichandran, Raviprakash Nagaraj
  • Patent number: 7656136
    Abstract: In a digital boost or buck-boost converter, a pulse width modulation signal has an on-time and an off-time. A constant off-time period is provided to set the off-time to be constant, and an on-time period to determine the on-time is derived by monitoring the output voltage of the converter. With the constant off-time, the output voltage and the on-time period will have a linear relation, thereby reducing the output ripple when the converter operates with a high duty-ratio.
    Type: Grant
    Filed: July 13, 2007
    Date of Patent: February 2, 2010
    Assignee: Richtek Technology Corp.
    Inventor: Wei-Hsu Chang
  • Patent number: 7652460
    Abstract: A method for designing a digital compensator for a switching mode power supply is provided such that the digital compensator has complex conjugated zero pair or a right hand pole to eliminate the complex conjugated pole pair or right hand zero in the transfer function of the control-to-output voltage of the switching mode power supply.
    Type: Grant
    Filed: December 27, 2007
    Date of Patent: January 26, 2010
    Assignee: Richtek Technology Corp.
    Inventors: Wei-Hsu Chang, Dan Chen
  • Patent number: 7646189
    Abstract: In one embodiment, a PWM controller uses the input power of a power system to regulate a duty cycle of a switching PWM signal.
    Type: Grant
    Filed: October 31, 2007
    Date of Patent: January 12, 2010
    Assignee: Semiconductor Components Industries, L.L.C.
    Inventor: Gang Chen
  • Patent number: 7633275
    Abstract: A DC voltage converter is provided that cyclically converts an input-side supply voltage into an output voltage. The converter includes an inductive storage element connected between a terminal for the supply voltage and, in a manner such that it is coupled via a first switch, a reference potential terminal. The capacitively buffered output voltage terminal is connected, via a second switch, between the inductive storage element and the first switch. Provision is furthermore made of a third switch, which is intended to selectively short the inductive storage element that is connected in parallel and is controlled by a control circuit. The control circuit is controlled, on the input side, by a control voltage that is tapped off at the second terminal of the inductive storage element.
    Type: Grant
    Filed: June 28, 2005
    Date of Patent: December 15, 2009
    Assignee: Infineon Technologies AG
    Inventors: Andreas Leyk, Christian Kranz
  • Patent number: 7619400
    Abstract: This patent specification describes a switching regulator which includes a step-up/step-down unit configured to generate an output voltage by stepping up or down an input voltage in accordance with a control signal, and a control unit configured to cause the step-up/step-down unit to perform the step-up or step-down operation.
    Type: Grant
    Filed: November 28, 2006
    Date of Patent: November 17, 2009
    Assignee: Ricoh Company, Ltd.
    Inventor: Koichi Hagino
  • Patent number: 7619395
    Abstract: An End-Point Prediction scheme is described for voltage-mode buck regulators to generate adaptive output voltage to integrated-circuit systems. Internal nodal voltages of the regulator controller are predicted and set automatically by the proposed algorithms and circuits. The settling time of the regulator can therefore be significantly reduced for faster dynamic responses, even with dominant-pole compensation.
    Type: Grant
    Filed: July 13, 2006
    Date of Patent: November 17, 2009
    Assignee: The Hong Kong University of Science and Technology
    Inventors: Kwok Tai Philip Mok, Man Siu, Ka Nang Leung
  • Patent number: 7615973
    Abstract: Provided is an adder in which all of circuits can be constituted by CMOS transistors, a process is simplified, and a chip size can be reduced as compared with a conventional art. The adder according to the present invention includes: a first VI converter and a second VI converter that allow a current corresponding to an input voltage to flow therein; and a current addition resistor having one end commonly connected to output terminals of the first VI converter and the second VI converter and another end grounded, which is adjustable in a resistance value.
    Type: Grant
    Filed: February 15, 2008
    Date of Patent: November 10, 2009
    Assignee: Seiko Instruments Inc.
    Inventor: Osamu Uehara
  • Patent number: 7609036
    Abstract: A control device for a switching converter having an input terminal, an output terminal, a semi-bridge of a first and second transistor coupled between the input terminal and a reference voltage, includes a first circuit for driving the first transistor and a second circuit for driving the second transistor. The converter further includes a bootstrap circuit for powering the first drive circuit. The bootstrap circuit includes a capacitor coupled between a supply voltage and the common terminal of the first and second transistors. The control device acts upon the second transistor to assure the charging of the capacitor.
    Type: Grant
    Filed: October 26, 2006
    Date of Patent: October 27, 2009
    Assignee: STMicroelectronics S.R.L.
    Inventors: Vincenzo Bartolo, Dennis Marelli, Francesco Griseta
  • Publication number: 20090256533
    Abstract: An current-level decision device for a power supply device includes a reception end for receiving a current sense signal, a reference voltage generator for generating a first reference voltage, a reference voltage correction unit coupled to the reference voltage generator and the reception end for adjusting the reference voltage according to variation of the current sense signal, so as to generate a second reference voltage, a comparator coupled to the reception end and the reference voltage correction unit for comparing the current sense signal and the second reference voltage to generate a comparison result, and a control unit coupled to the comparator for controlling a switch transistor of the power supply according to the comparison result.
    Type: Application
    Filed: December 18, 2008
    Publication date: October 15, 2009
    Inventors: Chi-Hao Wu, Chia-Chieh Hung
  • Patent number: RE41037
    Abstract: Switching regulator circuits and methods are provided for regulating output voltage that include an adjustable minimum peak inductor current level for Burst Mode in current-mode DC-DC regulators. Minimum peak inductor current level control is achieved during Burst Mode by allowing external control for adjusting the burst threshold level. A single pin can be used to distinguish between forced continuous and Burst Mode as well as set the burst threshold level during Burst Mode, or an alternate method of setting a variable burst threshold level can be implemented in which two pins are used, one for selecting the mode of operation and the other for setting the burst threshold level during Burst Mode. The above principles can be applied to both step-up and step-down regulator circuit configurations, as well as both synchronous switching regulators and non-synchronous switching regulators.
    Type: Grant
    Filed: April 20, 2006
    Date of Patent: December 15, 2009
    Assignee: Linear Technology Corp.
    Inventors: Joey M. Esteves, Randy G. Flatness
  • Patent number: RE41766
    Abstract: A boost converter in which the conventional boost diode is replaced by a bidirectional normally conducting semiconductor switch. The circuit may be implemented so the bidirectional switch is self-driven by connecting a low voltage Schottky diode between a first gate-source terminal pair. An inrush current protection function may be provided by utilizing a second gate-source terminal pair to turn the switch on and off independent of the self-driven operation in response to predetermined excessive load current conditions. The inrush current protection function is implemented by use of a second Schottky diode connected between the second gate and source terminals, and an RC circuit connecting the second gate terminal to the return rail for the converter power output transistor with an externally controlled switch connected to the RC circuit to control the bias according to the load current.
    Type: Grant
    Filed: September 25, 2009
    Date of Patent: September 28, 2010
    Assignee: International Rectifier Corporation
    Inventor: Marco Soldano