Including Pre Or Post Regulation Patents (Class 323/266)
  • Patent number: 7282895
    Abstract: A DC/DC converter has a linear voltage regulator for reducing or eliminating the output ripple of the converter with a minimum loss of efficiency. The converter comprises a converter stage with a supply voltage input, a converted voltage output and a control input, a regulator stage having an input connected to the converted voltage output of the converter stage and an output connected to a load, and a tracking circuit with inputs for a voltage at the converted voltage output of the converter stage, a voltage at the output of the regulator stage and a load sense current, and an output connected to the control input of the converter stage. The tracking circuit controls the converter stage so as to increase the converted voltage with an increasing load sense current and vice versa. The output voltage of the converter is always just sufficient to eliminate the ripple without having to operate the regulator's pass transistor in its linear range.
    Type: Grant
    Filed: August 8, 2005
    Date of Patent: October 16, 2007
    Assignee: Texas Instruments Incorporated
    Inventors: Gerhard Thiele, Erich Bayer
  • Patent number: 7279872
    Abstract: A circuit for processing a supply voltage with a voltage peak to obtain an output signal with reduced or eliminated voltage peak, comprises a first capacitance and a second capacitance, wherein a controllable resistor is formed between the first and second capacitance in series to the same, which has a high resistance when a voltage at the first capacitance is smaller than an input voltage set value, and whose resistance is reduced to a lower resistance when the input voltage at the first capacitance is higher than or equal to the input voltage set value, so that finally, when the output voltage at the second capacitance reaches an output voltage set value, the controllable resistor is substantially no longer visible, but connects the two capacitances in parallel.
    Type: Grant
    Filed: February 27, 2006
    Date of Patent: October 9, 2007
    Inventors: Michael Hackner, Roland Ernst, Hans-Peter Hohe
  • Patent number: 7274175
    Abstract: A two stage multiple output power supply device is capable of outputting programmable DC voltages onto multiple outputs. The first stage receives an AC supply voltage and outputs a DC supply voltage. The second stage includes a DC-ID controller and multiple DC-to-DC converters, each DC-to-DC converter receiving the DC supply voltage and capable of outputting a programmable DC voltage onto a conductor of a power cord to power an electrical device. For each DC-to-DC converter, the DC-ID controller receives information in an AC signal on the conductor, the information indicating the voltage and current requirements and the polarity of an electrical device connected to the power cord for that DC-to-DC converter. In response to the information, the DC-ID controller controls the DC-to-DC converter to set a magnitude, a polarity and a current limit for the programmable DC voltage that will be output by the DC-to-DC converter.
    Type: Grant
    Filed: February 16, 2006
    Date of Patent: September 25, 2007
    Inventor: Mihai-Costin Manolescu
  • Patent number: 7248031
    Abstract: As for a transistor, overlapped are factors such as a variation of a gate insulation film which occurs due to a difference of a manufacturing process and a substrate used and a variation of a crystalline state in a channel forming region and thereby, there occurs a variation of a threshold voltage and mobility of a transistor. This invention provides an electric circuit which used a rectification type device in which an electric current is generated only in a single direction, when an electric potential difference was applied to electrodes at both ends of the device. Then, the invention provides an electric circuit which utilized a fact that, when a signal voltage is inputted to one terminal of the rectification type device, an electric potential of the other terminal becomes an electric potential offset only by the threshold voltage of the rectification type device.
    Type: Grant
    Filed: December 8, 2004
    Date of Patent: July 24, 2007
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hajime Kimura, Yasuko Watanabe
  • Patent number: 7239116
    Abstract: Disclosed is a fine resolution pulse width generator for use in a multiphase pulse width modulated voltage regulator. The fine pulse width is generated by first generating a pulse with a coarse pulse width and one or more delayed replicas thereof. Then, digitally controlled analog interpolators are used to generate the fine resolution pulse width pulse by interpolating among the coarse pulse width pulses. Both single edge and double edge modulation embodiments are disclosed providing interpolation of just the trailing edges of the coarse pulses or both the leading and trailing edges, respectively. The disclosed fine resolution pulse generator uses counters, thermometer encoders and analog interpolators to achieve interpolation accurately by insuring that each interpolation step corresponds to an equal weight. Accuracy of the interpolation is defined by the linearity (i.e. how well the interpolation fits a best fit straight line) and monotonicity (i.e. how each step contributes a positive weight to the total).
    Type: Grant
    Filed: April 23, 2005
    Date of Patent: July 3, 2007
    Assignee: Primarion, Inc.
    Inventor: Benjamin Tang
  • Patent number: 7218081
    Abstract: The present invention includes multiple power converters for driving one or more loads via an input power source, AC or DC. A first switching power converter has first one or more windings coupled to an input power source, and a second switching power converter having second one or more windings coupled to one or more loads. A magnetic device comprising a single integrated magnetic core couples the first one or more windings to the second one or more windings for reducing switching loss.
    Type: Grant
    Filed: April 29, 2004
    Date of Patent: May 15, 2007
    Assignee: Delta Electronics, Inc.
    Inventors: Yungtaek Jang, Milan M. Jovanovic
  • Patent number: 7205753
    Abstract: The invention describes a switching power supply system for automatically regulating circuit operating power and the method thereof. The switching power supply system has a sensing and monitoring unit connected to the computer system for detecting the operating status of the computer system and outputting a detection value, a setting unit for setting a trigger condition value, a storage unit connected to the setting unit for storing the trigger condition value, a comparator unit connected to the storage unit and the sensing and monitoring unit for comparing the detection value with the trigger condition value and outputting a comparison result signal, and a dual power system switching regulator unit connected to the comparator unit and to the converter through at least one dual power system unit for receiving the comparison result signal and regulating connection/disconnection between the dual power system unit and the converter based on the comparison result signal.
    Type: Grant
    Filed: June 30, 2004
    Date of Patent: April 17, 2007
    Assignee: Giga-Byte Technology Co., Ltd.
    Inventor: Yung-Cheng Chiu
  • Patent number: 7202646
    Abstract: A droop compensation system includes a controlled current source that provides a scaled model of the PRM output current or VTM input current on an interface connection. A controlled resistance modeling the VTM effective series input resistance is connected across the interface terminal. The voltage developed across the controlled resistance by the controlled current establishes a correction signal representative of the VTM droop that is used to adjust the PRM output thereby compensating for the droop. A VTM control interface provides a mechanism for enabling and disabling the VTM. The VTM control circuitry may be powered by the interface connection, allowing the VTM to operate and process power when the VTM input voltage is below its normal minimum operating voltage, increasing the VTM dynamic range and allowing “soft start” into a capacitive load.
    Type: Grant
    Filed: August 2, 2004
    Date of Patent: April 10, 2007
    Assignee: VLT, Inc.
    Inventor: Patrizio Vinciarelli
  • Patent number: 7202644
    Abstract: A DC-DC converting apparatus including a step-up and step-down circuit stepping up/down an input voltage to generate an output voltage and a PWM control circuit. The PWM control circuit generates an error signal, first to third voltages, a first triangular wave signal varying between the first and second voltages, and a second triangular wave signal varying between the third voltage and a fourth voltage determined based on the first to third voltages. The PWM control circuit compares the error signal with the first and second triangular wave signals and causes the step-up and step-down circuit to step up/down the input voltage based on the comparison. The first to fourth voltages V1 to V4 satisfy V1<V4<V2<V3 and V4=V3?(V2?V1). At least one of the first to third voltages is variably set to make a time in which voltage ranges of the first and second triangular wave signals overlap longer than a delay time caused by the comparison.
    Type: Grant
    Filed: June 16, 2005
    Date of Patent: April 10, 2007
    Assignee: Ricoh Company, Ltd
    Inventors: Shoichi Nitta, Masahiro Matsuo
  • Patent number: 7199563
    Abstract: The object of this invention is to improve efficiency in the step-up/down mode and eliminate ringing in the output voltage when switching between the step-up mode and the step-up/down mode. This DC-DC converter has a local feedback control pre-processing circuit 12 arranged between voltage input terminal IN and one of the terminals of choke coil 10 or node Nx as well as an output feedback control booster circuit 14 arranged between the other terminal of choke coil 10 and the voltage output terminal OUT. Pre-processing circuit 12 has switching elements 16 and 18 and control circuit 20 that turns on/off switching elements 16 and 18 in a complementary manner. Control circuit 20 has error amplifier 22, reference voltage generating circuit 24, PWM comparator 26, inverter 28, and low-pass filter (LPF) 30.
    Type: Grant
    Filed: December 17, 2004
    Date of Patent: April 3, 2007
    Assignee: Texas Instruments Incorporated
    Inventor: Katsuya Ikezawa
  • Patent number: 7196500
    Abstract: An integrated circuit distribution and upgrade method, and systems/devices to practice various aspect of the method that is for reducing power consumption and operating the integrated circuit with a constituent operating circuit and a proxy circuit near the lower end of the targeted voltage range.
    Type: Grant
    Filed: December 31, 2003
    Date of Patent: March 27, 2007
    Assignee: Intel Corporation
    Inventor: Edward A. Burton
  • Patent number: 7196505
    Abstract: An apparatus and method for regulating voltage levels. The apparatus includes a first transistor and a second transistor coupled to the first transistor. The first transistor is configured to receive a reference voltage, and the second transistor is configured to receive a feedback voltage and generate a first voltage. The first voltage is associated with a difference between the reference voltage and the feedback voltage. Additionally, the apparatus includes a third transistor coupled to the second transistor and configured to receive the first voltage from the second transistor and generate an output voltage in response to at least the first voltage. Moreover, the apparatus includes a fourth transistor coupled to the third transistor and configured to receive the output voltage from the third transistor and generate the feedback voltage, and a first current generation system coupled to the fourth transistor through at least a node.
    Type: Grant
    Filed: February 17, 2005
    Date of Patent: March 27, 2007
    Assignee: Semiconductor Manufacturing International (Shanghai) Corporation
    Inventors: Wenzhe Luo, Paul Ouyang
  • Patent number: 7187144
    Abstract: A power source supplies an input voltage. A voltage conversion circuit converts the input voltage from the power source into an operating voltage to be used to drive an electric load. A detection circuit measures an insulation resistance value on the output side of the voltage conversion circuit. A control circuit controls a voltage conversion ratio in the voltage conversion circuit, which is expressed as a ratio of the operating voltage to the input voltage, in accordance with the insulation resistance value detected by the detection circuit. The control circuit sets the voltage conversion ratio such that the operating voltage becomes lower at the time of degradation of an insulation resistance than at the time of normal operation thereof.
    Type: Grant
    Filed: March 22, 2006
    Date of Patent: March 6, 2007
    Assignee: Toyota Jidosha Kabushiki Kaisha
    Inventor: Hiroshi Nakayama
  • Patent number: 7180276
    Abstract: A voltage regulator for supplying two types of loads on a common chip, namely a high current load and a low current load. The voltage regulator employs a feedback loop to supply the low current load with a fine degree of regulation and a feed forward arrangement to supply the high current load with a coarse degree of regulation. The feedback loop employs a bandgap reference source feeding a comparator, with an output driver transistor drawing current from a common supply and having an output electrode connected to a voltage divider, allowing a sample of the output to be fed back to the comparator to maintain the desired output voltage. The output electrode also feeds a control transistor for the feed forward arrangement that also draws current from the common supply and supplies the high current load directly.
    Type: Grant
    Filed: April 12, 2006
    Date of Patent: February 20, 2007
    Assignee: Atmel Corporation
    Inventor: Nicola Telecco
  • Patent number: 7173400
    Abstract: A power supplying power supply circuit which supplies power to an N-phase PWM control DC/DC converter power supply circuit multiplies the output voltage thereof by 1/N by use of a voltage divider and outputs the result of multiplication to the inverting input terminal of an error amplifier. Further, the power supplying power supply circuit inputs the output voltage of the N-phase PWM control DC/DC converter power supply circuit to the non-inverting input terminal via a switching circuit. An output of the error amplifier is supplied to a transistor so as to control and set the voltage value of output power of the power supplying power supply circuit equal to N×output voltage of the N-phase PWM control DC/DC converter power supply circuit.
    Type: Grant
    Filed: November 2, 2004
    Date of Patent: February 6, 2007
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Shizuo Morioka
  • Patent number: 7161334
    Abstract: A high voltage power supply for use in a system such as a microfluidics system, uses a DC—DC converter in parallel with a voltage-controlled resistor. A feedback circuit provides a control signal for the DC—DC converter and voltage-controlled resistor so as to regulate the output voltage of the high voltage power supply, as well as, to sink or source current from the high voltage supply.
    Type: Grant
    Filed: April 16, 2003
    Date of Patent: January 9, 2007
    Assignee: Sandia National Laboratories
    Inventors: James F. Stamps, Daniel D. Yee
  • Patent number: 7161335
    Abstract: Alteration of voltage input to a voltage regulator output stage from a Vbus regulator stage in a two-stage voltage regulator provides optimal Vbus voltage placement for a wide range of current loads to increase voltage regulator efficiency and is particularly suited to CPUs having power-saving sleep modes of operation. An optimal voltage is selected or developed in response to information concerning operational mode or current consumption of the powered device. As a perfecting feature of one embodiment of the invention in which a discrete Vbus voltage is selected based on operational mode, the selected voltage is adjusted to further optimize the matching of the Vbus voltage placement to the load and provides a continuous range of voltages. In a second embodiment the entire Vbus positioning function is performed in response to current load information. A feed-forward arrangement is provided to avoid transient spikes as the Vbus voltage placement is altered.
    Type: Grant
    Filed: February 20, 2004
    Date of Patent: January 9, 2007
    Assignee: Virginia Tech Intellectual Properties, Inc.
    Inventors: Jia Wei, Ming Xu, Fred C. Lee
  • Patent number: 7154253
    Abstract: A digitally controlled hybrid power module is controlled by a programmable controller. The hybrid power module includes a digitally controlled switching supply with an output coupled to an input of a digitally controlled linear voltage regulator. Independent control of switching supply and the linear regulator is provided by the programmable controller, which may be a field programmable gate array (FPGA), microcontroller, or digital signal processor (DSP). The programmable controller may independently control one or more power modules. Each power module may also include enable switching and an associated current clamp for capacitive loads. An output voltage transient suppressor may also be used to control transients, such as those produced under fast switching conditions.
    Type: Grant
    Filed: March 22, 2005
    Date of Patent: December 26, 2006
    Assignee: Inovys Corporation
    Inventor: Andre Gunther
  • Patent number: 7116009
    Abstract: A power distributing apparatus is provided to reduce the number of voltage converters. The power distributing apparatus 1 includes a power source part 4 for supplying a power of 42V, an electrical connection box 7 connected with the part 4 through a power line 5, and a plurality of electronic control units 8a, 8b . . . , 8n. The electrical connection box 7 has a regular-supply converter 9 to convert a high voltage of 42V to an intermediate voltage higher than a load voltage of 5V. The regular-supply converter 9 can exhibit a high conversion efficiency when the apparatus is operated under high load. Each of the electronic control units 8a, 8b . . . , 8n has a series regulator 14 to convert the intermediate voltage to the load voltage. Owing to the supply of voltage higher than the load voltage by the regular-supply converter 9, there is no need to consider inconvenience due to voltage drop between the converter and a remote load.
    Type: Grant
    Filed: August 6, 2002
    Date of Patent: October 3, 2006
    Assignee: Yazaki Corporation
    Inventors: Yasuhiro Tamai, Tetsuya Hasegawa
  • Patent number: 7098633
    Abstract: A switching voltage converter, suitably a boost converter, employs an n-type transistor, preferably an NMOS FET, as a series switch, with its drain coupled to the cathode of the converter's diode and its source coupled to the converter's output node. A charge pump driven by the converter's switching voltage provides a voltage Von at the NMOS FET's gate input sufficient to turn the FET on. A series switch controller is arranged to, in response to a control signal, hold the NMOS FET off such that the converter's output voltage Vout is approximately zero regardless of the status of input voltage Vin, or allow the NMOS device to be turned on by Von.
    Type: Grant
    Filed: July 15, 2005
    Date of Patent: August 29, 2006
    Assignee: Analog Devices, Inc.
    Inventors: A. Paul Brokaw, Jeffrey G. Barrow, Marc J. Kobayashi, Christian S. Birk
  • Patent number: 7098635
    Abstract: An apparatus or a system having an integrated circuit (IC) or a microprocessor with an operational circuit, a proxy circuit and a voltage regulator. In various embodiments, the operational circuit operates at a first frequency, and the proxy circuit outputs a periodic signal at a second frequency reflective of a potential of the first frequency. The periodic signal is provided to the voltage regulator controller, which conditionally regulates voltage applied to the IC or microprocessor, based at least in part on the second frequency.
    Type: Grant
    Filed: December 31, 2003
    Date of Patent: August 29, 2006
    Assignee: Intel Corporation
    Inventor: Edward A. Burton
  • Patent number: 7084612
    Abstract: A single chip hybrid regulator is disclosed having a first stage being a switching regulator and a second stage being a linear regulator. The switching regulator uses a filter circuit including an inductor and a capacitor. To make the hybrid regulator very small, the inductor value is selected so that the inductor saturates at a current level well below the maximum load current for the regulator. At low load currents, the small inductor does not saturate, and the regulated voltage applied to the input of the linear regulator presents only a small differential voltage across the series transistor of the linear regulator, resulting in very little power being wasted by the series transistor. At higher currents, the small inductor begins to saturate or fully saturates; however, the increased ripple is smoothed by the linear regulator.
    Type: Grant
    Filed: April 30, 2004
    Date of Patent: August 1, 2006
    Assignee: Micrel, Inc.
    Inventor: Raymond Zinn
  • Patent number: 7078882
    Abstract: An active clamping circuit. The active clamping circuit is applicable to a DC-to-DC conversion circuit, and has an output terminal to supply an output voltage to a load. In the active clamping circuit, a determining circuit is coupled to the DC-to-DC conversion circuit to determine the output detects the output voltage and to output a first enable signal when the output voltage is higher than a first predetermined voltage. A voltage adjustment circuit is coupled to the determining circuit to pull low the output voltage according to the first enable signal. An inductor has a first end coupled to the output terminal of the DC-to-DC conversion circuit, and a diode is coupled between the inductor and an input terminal of the DC-to-DC conversion circuit as a conductive path to channel discharge current to the input terminal of the DC-to-DC conversion circuit.
    Type: Grant
    Filed: August 4, 2004
    Date of Patent: July 18, 2006
    Assignee: Asustek Computer Inc.
    Inventors: Hsiang-Chung Weng, Kai-Fu Chen, Sheng-Chung Huang, Chih-Jung Lin
  • Patent number: 7071660
    Abstract: A two-stage power converter that dynamically adjusts to output current requirements includes a first stage regulator that provides power to a second stage regulator. The first stage can be a buck converter, and the second stage can be a multiple-phase buck converter. The output voltage of the first stage (intermediate bus voltage Vbus) is varied according to the load current to optimize conversion efficiency. To provide maximum efficiency, the Vbus voltage is increased as load current increases. The Vbus voltage provided by the first stage can be varied by duty cycle or operating frequency control. In another embodiment, the switching frequency of the second stage is varied as output current changes so that output current ripple is held constant. In an embodiment employing a multiple-phase buck converter in the second stage, the number of operating phases are varied as output current changes.
    Type: Grant
    Filed: December 22, 2004
    Date of Patent: July 4, 2006
    Assignee: Virginia Tech Intellectual Properties, Inc.
    Inventors: Ming Xu, Jinghai Zhou, Yuancheng Ren, Fred C. Lee, Jia Wei
  • Patent number: 7068017
    Abstract: An arrangement is provided for supplying electrical energy to a load from a direct electrical energy converter that optimizes converter power generation efficiency. The arrangement for optimizing converter power generation efficiency includes an impedance transformation circuit coupled between the energy converter and load for regulating current delivered by the energy converter so as to maximize power delivered to the load.
    Type: Grant
    Filed: September 5, 2003
    Date of Patent: June 27, 2006
    Assignee: DaimlerChrysler Corporation
    Inventors: Christopher A Willner, Michael Cummins
  • Patent number: 7064528
    Abstract: A droop amplifier circuit for a DC-DC regulator including an amplifier, at least one first resistive device, a second resistive device, a third resistive device, and a first capacitive device. Each first resistive device is coupled between an output inductor (phase node or current sense node) and the amplifier's non-inverting input. The first capacitive device is coupled between the regulator output and the amplifier's output. The second resistive device is coupled between the regulator output and the amplifier's inverting input. The third resistive device is coupled between the amplifier's inverting input and output. A second capacitive device may be coupled between the regulator output and the amplifier's non-inverting input. A fourth resistive device may be coupled in parallel with the second capacitive device. A relatively small, simple and low performing amplifier is sufficient. Circuit area and power are reduced, and low input offset voltage is more easily achieved.
    Type: Grant
    Filed: May 26, 2004
    Date of Patent: June 20, 2006
    Assignee: Intersil Americas, Inc.
    Inventors: Thomas A. Jochum, John S. Kleine
  • Patent number: 7057377
    Abstract: The four types of the Z-state circuits basically include a sensing gate, two stacked PMOS transistors, and a feedback line. The sensing gate senses a voltage at its input assuming no feedback is applied. Again, the corresponding output of two stacked PMOS transistors is assumed to be connected to the sensing input. Two stacked PMOS transistors generate a high impedance Z-state at its output according to the corresponding gate voltages. Therefore, the feedback line keeps sampling the output and feeding back the output voltage to the sensing input. Consequently, the feedback configuration provides the initial output voltage, which is the midpoint voltage decided by the device aspect ratios of the sensing gate before normal operation starts.
    Type: Grant
    Filed: December 23, 2004
    Date of Patent: June 6, 2006
    Assignee: Ana Semiconductor
    Inventor: Sangbeom Park
  • Patent number: 7058373
    Abstract: In one aspect this invention provides a DC-DC converter that has a switch mode part for coupling between a DC source and a load, the switch mode part providing x amount of output power; and that further has a linear mode part coupled in parallel with the switch mode part between the DC source and the load, the linear mode part providing y amount of output power, where x is preferably greater than y, and the ratio of x to y may be optimized for particular application constraints. In a further aspect there is a radio frequency (RF) transmitter (TX) for coupling to an antenna, where the TX has a polar architecture having an amplitude modulation (AM) path coupled to a power supply of a power amplifier (PA) and a phase modulation (PM) path coupled to an input of the PA, where the power supply includes the switch mode part for coupling between a battery and the PA and the linear mode part coupled in parallel with the switch mode part between the battery and the PA.
    Type: Grant
    Filed: September 16, 2004
    Date of Patent: June 6, 2006
    Assignee: Nokia Corporation
    Inventor: Vlad Gabriel Grigore
  • Patent number: 7053592
    Abstract: A circuit configuration provides an output voltage from an input voltage. The circuit configuration has a voltage regulator with an input terminal for receiving an input voltage, an output terminal for providing an output voltage, and drive input for receiving a drive signal. A drive circuit is coupled to the drive input and switches the voltage regulator on and off in a clocked manner according to a state signal.
    Type: Grant
    Filed: May 28, 2003
    Date of Patent: May 30, 2006
    Assignee: Infineon Technologies AG
    Inventors: Eric Pihet, Josef Gerner
  • Patent number: 7045980
    Abstract: A power source (120) supplies an input voltage (V 1). A voltage conversion circuit (130) converts the input voltage (V1) from the power source (120) into an operating voltage (V2) to be used to drive an electric load (150). A detection circuit (170) measures an insulation resistance value (R) on the output side of the voltage conversion circuit (130). A control circuit (160) controls a voltage conversion ratio (K (K=V2/V1)) in the voltage conversion circuit (130), which is expressed as a ratio of the operating voltage (V2) to the input voltage (V1), in accordance with the insulation resistance value (R) detected by the detection circuit (170). The control circuit (160) sets the voltage conversion ratio (K) such that the operating voltage (V2) becomes lower at the time of degradation of an insulation resistance than at the time of normal operation thereof.
    Type: Grant
    Filed: November 30, 2004
    Date of Patent: May 16, 2006
    Assignee: Toyota Jidosha Kabushiki Kaisha
    Inventor: Hiroshi Nakayama
  • Patent number: 7038430
    Abstract: A power control circuit includes a switching regulator for converting voltage of external electric power into a medium voltage, a series regulator for converting the medium voltage to a prescribed voltage of output power to be supplied and a circuit for operating either the switching regulator or the series regulator under a protective condition if overvoltage or overcurrent is detected. The switching regulator includes a first transistor, a smoothing circuit and a first control circuit for controlling switching operation of the first transistor. The series regulator includes a second transistor and a second control circuit for controlling conductivity of the second transistor to regulate voltage of the output power to be constant, an overvoltage detecting circuit for detecting an overvoltage of the medium voltage, and an overcurrent detecting circuit for detecting an overcurrent supplied to the series regulator.
    Type: Grant
    Filed: October 6, 2003
    Date of Patent: May 2, 2006
    Assignee: Denso Corporation
    Inventors: Toru Itabashi, Takanori Ishikawa, Toshiyuki Iwasaka, Yukihide Niimi
  • Patent number: 7030594
    Abstract: A pulse width modulator and a loading system thereof are disclosed. The pulse width modulator comprises an amplitude-adjustable triangle-wave generator, an error signal generator and a pulse signal generator. The triangle-wave generator is adapted to perform an amplitude operation according to the reference voltage and the feedback voltage for generating an amplitude-adjustable triangle wave according to a variation of the feedback voltage. The error signal generator is adapted to perform an error operation according to the feedback voltage and the reference voltage for outputting an error signal. The pulse signal generator is adapted to receive and compare the error signal and the amplitude-adjustable triangle wave for outputting a pulse controlling signal for the loading system.
    Type: Grant
    Filed: January 5, 2004
    Date of Patent: April 18, 2006
    Assignee: Beyond Innovation Technology Co., Ltd.
    Inventors: Joshru Lee, Andre Yu
  • Patent number: 7023187
    Abstract: A cascaded DC-DC converter architecture has an upstream converter stage and a downstream converter stage, which derives its input voltage from the upstream stage. Cascading the two converter stages enables functionality of control and monitoring (including soft start and overcurrent detection) circuitry of the upstream stage to be used for the downstream stage, to reduce chip area, cost, and complexity. A voltage window regulator in the downstream converter ensures that, during shutdown, its output voltage will be maintained within a prescribed window of its regulated output voltage, so that no soft start delay is needed when the second converter stage is turned back on.
    Type: Grant
    Filed: August 7, 2002
    Date of Patent: April 4, 2006
    Assignee: Intersil Americas Inc.
    Inventors: William B. Shearon, Paul K. Sferrazza
  • Patent number: 7009852
    Abstract: An apparatus for reducing the heat losses caused by the DC Bus capacitor current is proposed. The apparatus includes: a double frequency boost converter circuit having two boost converter circuits coupled in parallel, in which two switches, respectively disposed on the two boost converter circuits, are turned on and off alternately to produce an output current having a frequency twice that of control signals of the two switches, and to offer a DC bus respectively, a full-bridge DC-DC converter coupled to an output terminal of the double frequency boost converter circuit for transforming an output of the DC bus to a DC voltage, and a DC bus capacitor coupled to the double frequency boost converter circuit and the full-bridge DC-DC converter in parallel for balancing two corresponding transient powers of the double frequency boost converter circuit and the full-bridge DC-DC converter respectively.
    Type: Grant
    Filed: July 30, 2004
    Date of Patent: March 7, 2006
    Assignee: Delta Electronics Inc.
    Inventors: Jianping Ying, Qingyou Zhang, Aibin Qiu, Teng Liu, Xingkuan Guo, Jianhong Zeng
  • Patent number: 7002266
    Abstract: A control loop system is provided that employs an active DC output control circuit that more accurately calibrates the desire voltage at a load, e.g. 3.3 volts, by adjusting a trim pin on a DC/DC converter. In a first embodiment, an active DC output control circuit calibrates a DC/DC converter that is connected to a single load. In a second embodiment, an active DC output control circuit calibrates multiple DC/DC converters that are connected to multiple loads.
    Type: Grant
    Filed: November 13, 2002
    Date of Patent: February 21, 2006
    Assignee: Summit Microelectronics
    Inventors: Kenneth C. Adkins, Theodore Martin Myers, John Tabler, Anurag Kaplish, Thomas J. O'Obrien
  • Patent number: 6992467
    Abstract: The invention relates to a safety barrier for limiting the current and voltage of an electrical consumer (15) connected downstream thereof. The safety barrier comprises an input terminal (8) and an output terminal (16) and an input and output terminal (10, 17) of a common line (12), and has at least one voltage and current-limiting device (7, 13, 14), which comprises a fuse (F1), a voltage-limiting device (D3) that is associated with the common line (12), a current-limiting device (R6) that is connected to the output of the common line and an additional protection circuit that is located in front of the voltage and current-limiting device (17, 13, 14).
    Type: Grant
    Filed: March 31, 2000
    Date of Patent: January 31, 2006
    Assignee: Pepperl & Fuchs GmbH
    Inventor: Wilhelm Fey
  • Patent number: 6984965
    Abstract: A Factorized Power Architecture (“FPA”) method and apparatus includes a front end power regulator (“PRM) which provides one or more controlled DC bus voltages which are distributed through the system and converted to the desired load voltages using one or more DC voltage transformation modules (“VTMs”) at the point of load. VTMs convert the DC bus voltage to the DC voltage required by the load using a fixed transformation ratio K=Vout/Vin and with a low output resistance. VTMs exhibit high power density, efficiency and, owing to their inherent simplicity and component utilization, reliability. VTMs may be paralleled and share power without dedicated protocol and control interfaces, supporting scalability and fault tolerance. Feedback may be provided from a feedback controller at the point of load to the front end or to upstream, on-board power regulator modules (“PRMs”) to achieve precise regulation.
    Type: Grant
    Filed: March 17, 2004
    Date of Patent: January 10, 2006
    Assignee: VLT, Inc.
    Inventor: Patrizio Vinciarelli
  • Patent number: 6979984
    Abstract: A voltage regulator (10) is formed to generate a compensation current to flow when an output voltage of the voltage regulator (10) exceeds a compensation value. The compensation current is at least equal to the leakage current of the output transistor (24).
    Type: Grant
    Filed: April 14, 2003
    Date of Patent: December 27, 2005
    Assignee: Semiconductor Components Industries, L.L.C.
    Inventors: Stephane Perrier, Patrick Bernard, Pierre Daude
  • Patent number: 6975098
    Abstract: A Factorized Power Architecture (“FPA”) method and apparatus for supplying power to highly transient loads such as microprocessors includes a front end power regulator (“PRM) which provides a controlled DC bus voltage which is converted to the desired load voltage using a DC voltage transformation module (“VTM”) at the point of load. The VTM converts the DC bus voltage to the DC voltage required by the load using a fixed transformation ratio K=Vout/Vin where Vin>Vout and with a low output resistance. The response time of the VTM, TVTM is less than the response time of the PRM, TPRM. A first capacitance, C1, across the load is made large enough to support the microprocessor current requirement within a time scale, T1, which is preferably greater than or equal to the characteristic open-loop response time of the VTM by itself, TVTM.
    Type: Grant
    Filed: May 22, 2003
    Date of Patent: December 13, 2005
    Assignee: VLT, Inc.
    Inventor: Patrizio Vinciarelli
  • Patent number: 6967470
    Abstract: A voltage regulator includes a constant current circuit which is connected between an input node with which a power supply voltage is supplied and an output node to which a load is connected and which supplies constant current to the output node. The voltage regulator also includes a first transistor which is provided in parallel to the constant current circuit and which flows insufficient current to the output node when current flowing through the load is larger than the constant current and a second transistor which is provided between the output node and a common potential node and which flows surplus current to the common potential node when current flowing through the load is less than the constant current. The voltage regulator also includes a control circuit which controls a conductive state of the first and the second transistors so that an output voltage of the output node is maintained at constant voltage.
    Type: Grant
    Filed: December 31, 2003
    Date of Patent: November 22, 2005
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Yasutaka Takabayashi
  • Patent number: 6940260
    Abstract: The present invention relates to a microenergy device for generating highly precise microenergy required for future high performance complex information appliances. The microenergy device of the present invention comprises a microenergy generating unit and a micromechanical modulating unit. The microenergy generating unit includes at least one digital microenergy generator which operates in response to a digital signal to be inputted into the generator. The micromechanical modulating unit performs mechanical modulation of an output of the microenergy generating unit and finally outputs the modulated microenergy.
    Type: Grant
    Filed: August 22, 2003
    Date of Patent: September 6, 2005
    Assignee: Korea Advanced Institute of Science and Technology
    Inventor: Young-Ho Cho
  • Patent number: 6937487
    Abstract: A power management system includes a voltage booster in combination with a voltage regulator to provide a regulated output voltage. The voltage provided to the voltage regulator is used to selectively enable/disable the doubling functionality of the voltage booster to increase power conversion efficiency.
    Type: Grant
    Filed: April 29, 2003
    Date of Patent: August 30, 2005
    Assignee: National Semiconductor Corporation
    Inventor: Ernest Armand Bron
  • Patent number: 6903536
    Abstract: The present invention discloses a PFC-PWM controller having interleaved switching. A PFC stage generates a PFC signal for switching a PFC boost converter of a power converter. A PWM stage generates a PWM signal for switching a DC-to-DC converter of the power converter. The PFC-PWM controller includes a power manager for generating a discharge current and a burst-signal. Under light-load conditions, the discharge current decreases in proportion to a load of the power converter. The burst signal is utilized to disable the PFC signal in a suspended condition for power saving. A pulse width of the pulse-signal ensures a dead time to spread switching signals, such as the PFC and PWM signals, and reduces switching noise. When the discharge current decreases, the pulse width of the pulse-signal will increase and a frequency of the pulse-signal will decrease correspondingly. This further reduces power consumption under light-load and zero-load conditions.
    Type: Grant
    Filed: November 12, 2003
    Date of Patent: June 7, 2005
    Assignee: System General Corp.
    Inventor: Ta-yung Yang
  • Patent number: 6900621
    Abstract: A digitally controlled hybrid power module is controlled by a programmable controller. The hybrid power module includes a digitally controlled switching supply with an output coupled to an input of a digitally controlled linear voltage regulator. Independent control of switching supply and the linear regulator is provided by the programmable controller, which may be a field programmable gate array (FPGA), microcontroller, or digital signal processor (DSP). The programmable controller may independently control one or more power modules. Each power module may also include enable switching and an associated current clamp for capacitive loads. An output voltage transient suppressor may also be used to control transients, such as those produced under fast switching conditions.
    Type: Grant
    Filed: July 3, 2003
    Date of Patent: May 31, 2005
    Assignee: Inovys
    Inventor: Andre Gunther
  • Patent number: 6891356
    Abstract: As for a transistor, overlapped are factors such as a variation of a gate insulation film which occurs due to a difference of a manufacturing process and a substrate used and a variation of a crystalline state in a channel forming region and thereby, there occurs a variation of a threshold voltage and mobility of a transistor. This invention provides an electric circuit which used a rectification type device in which an electric current is generated only in a single direction, when an electric potential difference was applied to electrodes at both ends of the device. Then, the invention provides an electric circuit which utilized a fact that, when a signal voltage is inputted to one terminal of the rectification type device, an electric potential of the other terminal becomes an electric potential offset only by the threshold voltage of the rectification type device.
    Type: Grant
    Filed: January 17, 2003
    Date of Patent: May 10, 2005
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hajime Kimura, Yasuko Watanabe
  • Patent number: 6873139
    Abstract: An off-line switching power supply for generating negative voltages without a transformer, comprising a line voltage connection for receiving a line voltage, an inductor having a first terminal and a second terminal, a power MOSFET having a drain and a source, the drain electrically connected to the first terminal of the inductor, the drain electrically connected to the first terminal of the inductor, the source electrically connected to the voltage and the second terminal of the inductor providing a negative output voltage.
    Type: Grant
    Filed: October 4, 2002
    Date of Patent: March 29, 2005
    Assignee: Maytag Corporation
    Inventors: Jonathan D. King, Tommy D. Hollingsworth
  • Patent number: 6868500
    Abstract: In accordance with one embodiment of the present invention, a circuit provides power stability functions for a microcontroller, during startup and normal operations performing power on reset functions and an array of power stability functions. The power on reset functions hold the microcontroller in a safe reset condition, reinforce the POR hold, and force its switch mode pump to drive up voltage provided to its common supply source. The power stability functions constitute a power on reset function, a power supply health, e.g., power state condition monitoring function, a control function for dynamically controlling the common supply source, and auxiliary functions, which may be protective of a flash memory. The power on reset function operates at a fixed and/or programmably changeable voltage levels. In one embodiment, the POR circuit is interconnected with a processor through a bus, enabling programmatic processor control of microcontroller power through interaction with the POR circuitry.
    Type: Grant
    Filed: June 22, 2001
    Date of Patent: March 15, 2005
    Assignee: Cypress Semiconductor Corporation
    Inventors: Harold Kutz, Warren Snyder
  • Patent number: 6864668
    Abstract: The present invention, generally speaking, provides for high-efficiency power control of a high-efficiency (e.g., hard-limiting or switch-mode) power amplifier. In one embodiment, the invention exploits the recognition that, for a constant-resistance circuit, power is equal to the square of the voltage across the circuit divided by the resistance of the circuit. In the case of certain switch mode amplifiers, such as Class E and Class F amplifiers, as well as saturated linear amplifiers, the amplifier may reasonably be regarded as having a constant resistance with varying power supply. In an exemplary embodiment, the supply voltage is controlled using a combination of two stages, a switch-mode converter stage that accomplishes gross power level control and a subsequent linear regulator stage that accomplishes more precise power envelope control, e.g., burst control.
    Type: Grant
    Filed: February 9, 1999
    Date of Patent: March 8, 2005
    Assignee: Tropian, Inc.
    Inventors: Earl McCune, Wendell Sander
  • Patent number: 6853171
    Abstract: A low loss multiple output stage of a boost converter includes a first output transistor having a first on-resistance, a second output transistor having a second on-resistance, a sink transistor, and a gate logic module. The sink transistor is operably coupled to allow energy to be provided to a first output via the first output transistor or to allow the energy to be provided to a second output via the gate logic module and the second output transistor based on a regulation signal. The gate logic module is operably coupled to, when the energy is to be provided to the first output, couple a gate and a well of the second output transistor to the first output; when the sink transistor is active, couple the gate and the well of the second output transistor to the second output, and when the energy is to be provided to the second output, couple the gate of the second transistor to ground and the well of the second output transistor to the second output.
    Type: Grant
    Filed: June 25, 2003
    Date of Patent: February 8, 2005
    Assignee: Sigmatel, Inc.
    Inventor: Marcus W. May
  • Patent number: 6850044
    Abstract: A power supply system includes a non-linear section that provides an intermediate voltage. A linear section receives the intermediate voltage and generates the output voltage. The linear section forms a control signal that is used by the non-linear section to change the value of the intermediate voltage as the output voltage changes to keep the differential voltage across the linear section low.
    Type: Grant
    Filed: March 13, 2003
    Date of Patent: February 1, 2005
    Assignee: Semiconductor Components Industries, L.L.C.
    Inventors: Jason Hansen, Christophe Basso