Abstract: A semiconductor device includes: a voltage-control-type clock generation circuit having a plurality of stages of first delay elements and whose oscillation frequency is controlled according to a control voltage applied to the first delay elements; a delay circuit having a plurality of stages of second delay elements connected serially; and a selection circuit selecting one from pulse signals output by the plurality of stages of respective second delay elements. The first delay elements and the second delay elements have a same structure formed on a same semiconductor substrate, and a delay amount of the second delay elements is adjusted according to the control voltage.

Abstract: Power is provided to one or more devices in a system that includes a hierarchical power smoothing environment having multiple tiers. In response to a peak in power usage by the one or more devices, power is provided from a first power smoothing component in a first tier of the multiple tiers. Additionally, power is provided to the one or more devices from power smoothing components in each of other tiers of the multiple tiers if the power smoothing component in a next lower tier of the multiple tiers is unable to provide sufficient power for the peak in power usage. If the power smoothing components in the multiple tiers are unable to provide sufficient power for the peak in power usage, then performance of at least one of the one or more devices is reduced in response to the peak in power usage.

Abstract: A multi-phase DC-DC converter and a method of controlling a multi-phase DC-DC converter are disclosed. The multi-phase DC-DC converter is adapted to control a plurality of channels in a multi-phase DC-DC converting circuit for providing an output voltage. The multi-phase DC-DC converter comprises a constant on unit, a plurality of PWM units and a pulse width logic unit. The constant on unit determines a time point of generating a turning on signal indicative of a preset time period according to the output voltage. Each PWM unit generates a PWM signal, and a pulse width thereof is determined according to the turning on signal and currents of the channels. The pulse width logic unit controls the channels according to the corresponding PWM signals generated by the plurality of PWM units.

Abstract: A voltage regulator can provide a regulated output voltage. The voltage regulator includes a regulating module that includes a resistor and a field effect transistor that has a threshold voltage. The resistor is coupled to a gate terminal and a source terminal of the field effect transistor. The regulating module provides the output voltage. A reference module is suitable for detecting a variation of the output voltage. The reference module is coupled with the regulating module. A current sink is suitable for subtracting a compensation current from the current flowing from the regulating module to the reference module. The compensation current is dependent on a variation of the threshold voltage.

Abstract: A method of controlling a power factor correction (PFC) converter having a first PFC sub-circuit and a second PFC sub-circuit determines when to transition the PFC converter between an interleaved mode and a saving energy mode (SEM). The method includes generating an amplified error signal based on a monitored output voltage of the PFC converter. The second PFC sub-circuit is disabled in response to the amplified error signal being less than a first threshold value and enabled in response to the amplified error signal exceeding a second threshold value.

Abstract: Aspects of the invention pertain to optimization of multi-phase voltage converter efficiency regardless of load conditions. A processor is coupled to different stages of a power control system. Input and output voltages to the different stages are monitored and varied the processor. The processor is also configured to activate or deactivate different phases of the voltage converter in accordance with load current conditions.

Abstract: Systems and methods are disclosed to control a buck converter by performing adaptive digital pulse width modulation (ADPWM) with a plurality of upper power transistors each uniquely controlled to enable greater than 100% duty cycle for the buck converter and a lower power transistor coupled to the plurality of upper power transistors; and driving an inductor having one end coupled to the lower power transistor and the upper power transistors.

Abstract: A controller receives a value indicative of a number of phases in a power supply to be activated for producing an output voltage to power a load. The controller utilizes the value to adjust a magnitude of at least one control coefficient associated with the power supply. The control can also use the value of the input voltage to adjust the magnitude of at least one control coefficient. The controller digitally computes values for the one or more control coefficients based on the received value indicating the number of phases in the power supply to be activated for producing the output voltage. Based on the adjusted magnitude of the at least one control coefficient, the controller produces control signals to control the number of phases in the power supply as specified by the value to produce the output voltage.

Abstract: A power supply with non-isolated DC DC splitting includes n conversion cells that are interlaced. The splitting switch of each cell is placed in a resonant circuit. The resonant circuit makes it possible to obtain a switching to the open state of said switch at zero current and voltage. The ripple at the input and output is minimized and the efficiency improved. In particular, the wiring inductances in the charge transfer loop of each cell no longer have negative effects on the efficiency. The cell may be of boost, buck, buck/boost, Cuk or SEPIC topology.

Abstract: In order to improve the efficiency of a Power Factor Convertor (PFC) first stage to a AC-DC converter the switching cell is split into two smaller ones (each comprising a switched inductor with an output diode). Below a certain load only one cell is active. The second cell only becomes active, out of phase with the first, but not generally in antiphase, after a predefined load level is surpassed in such a way that above that level the first cell has a fixed on time and the second cell a variable one.

Abstract: Methods and systems to generate a digital error indication of an input signal relative to a reference signal, using resistors, comparators, and latches. The digital error indication may indicate that the input signal is within a range of the reference signal, above the range, or below the range. The methods and systems may be implemented within a multi-phase digital voltage regulator to generate a digital error indication for each of a plurality of phase currents relative to an instantaneous average of the phase currents. The digital voltage regulator may be fabricated on an integrated circuit die with a corresponding load, such as a processor. The digital voltage regulator may include a plurality of multiplier or look-up based gain modules, each to receive a corresponding one of the digital error signals and to output one of three values. Outputs of each gain module may be integrated over time.

Abstract: An arrangement comprising at least a first photovoltaic module and a second photovoltaic module in a string is disclosed. The first photovoltaic module and second photovoltaic module are electrically connected in parallel and arranged to provide a DC voltage to a voltage bus. Also, an electrical connecting device configured for connecting to a photovoltaic module is disclosed. The electrical connecting device comprises first and second contacts for receiving a first DC voltage from the photovoltaic module and third and fourth contacts configured for electrically parallel connection to a DC voltage bus for providing a second DC voltage, dependent on the first DC voltage, to the DC voltage bus.

Abstract: Methods and circuits are described herein which may be used to improve the unloading transient response of a DC-DC converter. In some embodiments the transient response may be improved by improving the way MOSFET switches in the buck converter are controlled at the point in time when a current transient is detected, and subsequently during the transient, in such a way that the impact of the current transient is mitigated. In other embodiments an auxiliary current source is used to provide rapid transient response required by the overall power converter, leaving the main portion of the DC-DC converter to provide long term stability.

Abstract: An embodiment of a driving device is proposed for supplying at least one regulated global output current to a load. The driving device includes programming means for programming a value of the global output current within a global current range. Reference means are provided for supplying a reference voltage, which has a value corresponding to the value of the global output current. Conversion means are then used for converting the reference voltage into the global output current. In the driving device according to an embodiment of the disclosure, the conversion means include a plurality of conversion units for corresponding partial current ranges, which partition the global current range. Each conversion unit is adapted to convert the reference voltage into a partial output current that contributes to the global output current, with the partial output current that is within the corresponding partial current range.

Abstract: A multiphase DC-DC converter including at least one conversion path, multiple switch capacitance networks, and a multiphase switch controller. Each conversion path includes first and second intermediate nodes. Each switch capacitance network includes a capacitance coupled in parallel with an electronic switch and is coupled to one of the intermediate nodes. The switch controller controls the switch capacitance networks using zero voltage switching. Multiple phases may be implemented as multiple conversion paths each having first and second intermediate nodes coupled to first and second switch capacitance networks, respectively. A single conversion path may be provided with multiple switch capacitance networks coupled to each intermediate node for multiple phases. Alternatively, a common front end with a first intermediate node is coupled to one or more switch capacitance networks followed by multiple back-end networks coupled in parallel for multiple phases.

Abstract: A power regulation scheme includes a first voltage regulation portion having a first voltage regulator, a second voltage regulator, and a switching system. The first voltage regulation portion is connected in parallel with a second voltage regulation portion. The second voltage regulation portion regulates an input voltage if an open condition occurs within the first voltage regulation portion. The switching system forces the second voltage regulator to regulate the input voltage if a short condition occurs within the first voltage regulator.

Abstract: Systems and methods for intelligently optimizing voltage regulation efficiency for information handling systems by varying gate drive voltage value based on measured operating efficiency and/or other voltage regulation operating parameters. Different voltage regulation operating parameters may be dynamically monitored and recorded during a power conversion process, and these operating parameters may then be used to dynamically and variably control gate drive voltage level to improve/optimize voltage regulation operating efficiency performance.

Abstract: Methods and circuits for power supply arrangement and control are disclosed herein. In one embodiment, a power supply can include: (i) an input capacitor coupled to an input terminal that is coupled to a power source, where the power source provides power that is constrained by a predetermined limit; (ii) an output capacitor coupled to an output terminal that is coupled to a load, where the load has a first load condition or a second load condition; (iii) a first regulator to convert an input voltage at the input terminal to an output voltage at the output terminal to power the load; (iv) a second regulator coupled to the first regulator; and (v) an energy storage element coupled to the second regulator, where the second regulator delivers energy from the energy storage element to the first regulator to maintain regulation of an output voltage at the output terminal when in the second load condition.

Abstract: A voltage converter includes input terminals configured to receive an input voltage, and output terminals configured to provide an output voltage and an output current. At least one first converter stage is connected between the input terminals and the output terminals, having at least one unipolar transistor, and configured to provide a first output current. At least one second converter stage is connected between the input terminals and the output terminals, having at least one bipolar transistor, and configured to provide a second output current. A control circuit is configured to control the first output current and the second output current such that there is a first output current range in which the first output current is higher than the second output current.

Abstract: A power system is disclosed. The power system comprises a plurality of power supply units, a voltage sharing bus, and a current sharing bus. The sharing bus is used to transmit a sharing voltage, and the current sharing bus is used to transmit a first current reference value. Each of the power supply units comprises: a power converter, a feed-forward control (FFC) circuit, and a feedback control (FBC) circuit. The feed-forward control circuit is used to generate a second current reference value according to a difference between an input voltage of the power converter and the sharing voltage. The feedback control circuit is used to generate a current compensation value according to the second current reference value and the first current reference value. The power converter can adjusts the output current thereof in accordance with the current compensation value.

Abstract: A power regulation scheme includes a first voltage regulation portion having a first voltage regulator, a second voltage regulator, and a switching system. The first voltage regulation portion is connected in parallel with a second voltage regulation portion. The second voltage regulation portion regulates an input voltage if an open condition occurs within the first voltage regulation portion. The switching system forces the second voltage regulator to regulate the input voltage if a short condition occurs within the first voltage regulator.

Abstract: In a unit inverter system where multiple unit inverters are connected in parallel, the quantity of operating unit inverters is determined in accordance with an amount of power to be converted. A gate signal of a semiconductor switching element of a unit inverter is turned off after an output current of the inverter is reduced when reducing the quantity of inverter units, thereby improving the partial load efficiency of the system without an adverse effect on the system. A regulator connected to the inverter determines dead time of the inverter according to the output current value and an average output current value of the unit inverters, waits for the determined dead time so as to reduce the output current of the unit inverter, and then turns off the gate signal.

Abstract: Provided herein are circuits, systems and methods that monitor for a fault within a multi-phase DC-DC converter. This can include monitoring the channels of the DC-DC converter for way out of balance (WOB) conditions, and monitoring for a component fault in dependence on detected WOB conditions. A fault can be detected if, during a predetermined period of time, one of the WOB conditions occurs at least a specified amount of times more than another one of the WOB conditions. The DC-DC converter and/or another circuit can be shut-down in response to a fault being detected. Additionally, or alternatively, a component fault detection signal can be output in response to a fault being detected.

Abstract: When a commercial power supply E operates normally, converter sections PFC1, PFC2 connected in parallel to each other can operate to approximate the input current from the commercial power supply E to the waveform and phase of the input voltage to correct a power factor while supplying stabilized output voltages Vo1, Vo2 to a load. When the voltage of the commercial power supply E drops, the smoothing capacitor Co1 operates as an input power supply to power the converter section PFC2, which allows the smoothing capacitor Co2 to supply the stabilized output voltage Vo2 to the load.

Abstract: Provided herein are circuits, systems and methods that monitor for way out of balance (WOB) conditions within a multi-phase DC-DC converter, and adjust a balance between currents through channels of the DC-DC converter, in dependence on detected WOB conditions.

Abstract: A control circuit of an interleaved PFC power converter according to the present invention comprises a master switching control circuit, a slave switching control circuit, and a slave reference signal generator. The master switching control circuit generates a control signal and a first switching signal in response to an input voltage and a feedback signal. The first switching signal is utilized to control a first switch of the PFC power converter. The slave reference signal generator generates a slave control signal in response to a load condition of the PFC power converter and the control signal. The slave switching control circuit generates a second switching signal in response to the slave control signal. The slave control signal is utilized to control a second switch of the PFC power converter. The slave reference signal generator adjusts the control signal in response to the load condition for generating the slave control signal correspondingly.

Abstract: An embodiment of a power supply includes an input node that receives an input voltage, an output node on which a regulated output voltage is provided, an odd number of magnetically coupled phase paths each coupled between the input and output nodes, and a first magnetically uncoupled phase path coupled between the input and output nodes. Such a power supply can improve its efficiency by activating different combinations of the coupled and uncoupled phase paths depending on the load conditions. For example, the power supply may activate only an uncoupled phase path during light-load conditions, may activate only coupled phase paths during moderate-load conditions, and may activate both coupled and uncoupled phase paths during heavy-load conditions and during a step-up load transient.

Abstract: A multiphase DC-DC converter is provided that includes a multiphase transformer, the multiphase transformer including a plurality of input voltage terminals and an transformer output voltage terminal, each input voltage terminal associated with a corresponding phase. Each phase is assigned to an input voltage terminal of the plurality of input voltage terminals to minimize a ripple current at the input voltage terminals of the multiphase transformer.

Abstract: A multi-phase power converter with constant on-time control includes a plurality of channels to convert an input voltage into an output voltage, and each of the channels is driven by a control signal. When all channel currents of the channels are balanced, each of the control signals remains a constant on-time. When the channel currents are imbalanced, the on-times of the control signals are modulated according to the difference between each channel current and a target value for current balance between the channels.

Abstract: According to one embodiment, a semiconductor device includes a semiconductor element mounting unit, a first conductor, a semiconductor element, a first connection and a second connection. The first conductor is provided around the semiconductor element mounting unit. The semiconductor element is provided on the semiconductor element mounting unit and includes a first switch element and a second switch element provided parallel to the first switch element. The first connection and the second connection are provided on the first switch element side of an imaginary boundary line obtained by extending a boundary between the first switch element and the second switch element. The first connection and the second connection are electrically connected to the first switch element and the second switch element, respectively, and electrically connected to the first conductor.

Abstract: A current balancer suitable for a multi-phase power converting device is provided. The current balancer includes an error detection unit and a plurality of pulse control units. Each of the pulse control units includes a current-to-voltage converter, a charging and discharging controller, a capacitor, and a comparator. The error detection unit detects a plurality of channel currents generated by the multi-phase power converting device, and generates a plurality of error currents by calculating. The charging and discharging controller provides a charging voltage or a discharging voltage according to a constant pulse-width modulation (PWM) signal. When the channel currents are balanced, the comparator generates a PWM signal with a constant duty cycle. When the channel currents are not balanced, an error voltage generated by the current-to-voltage converter is used to adjust a voltage level of the charging voltage or the discharging voltage, so that the PWM signal is varied correspondingly.

Abstract: A power supply system includes multiple power converter phases. A controller (e.g., a processor device) monitors energy delivery for each of multiple power converter phases that supply energy to a load. The controller analyzes the energy delivery associated with each of the multiple power converter phases to identify an imbalance of energy delivered by the multiple power converter phases to the load. Based on the analyzing and detection of an imbalance condition, the controller modifies a future order of activating the multiple power converter phases for powering the load. Accordingly, a single phase of a multiphase switching power converter may be prevented from becoming overloaded while delivering energy to power the load.

Abstract: A circuit arrangement comprising a first semiconductor switching element, which has a load path and a drive terminal. A voltage supply circuit, is provided including an inductance connected in series with the load path of the first semiconductor switching element, and a capacitive charge storage arrangement, which is connected in parallel with the inductance and which has a first and a second output terminal for providing a supply voltage.

Abstract: A power supply circuit includes a pulse width modulation (PWM) chip, a number of phase circuits, a voltage output end, and a spike suppression circuit. The spike suppression circuit is connected to each of the phase circuits and the voltage output end. The PWM chip controls all of the phase circuits to alternately output power supply voltages according to a predetermined sequence. The spike suppression circuit receives the power supply voltages, and filters out voltage spikes in the power supply voltages, thereby outputting steady voltages to the voltage output end.

Abstract: Series switches for power delivery. A regulator operated as a current source is arranged in parallel with a switched capacitor divider. A switched capacitor divider is configured in series with a plurality of linear regulators with each regulating one of a plurality of voltage outputs from the switched capacitor divider. In another embodiment, a series switch bridge has a first pair of switches connected in series with a second pair of switches across a voltage input, each switch within a pair of switches is switched in-phase with the other while the first pair of switches is switched out of phase with the second pair of switches. A balancing capacitor is coupled across one switch in both the first and second pair to be in parallel when either of the pair of switches is closed to reduce a charge imbalance between the switches.

Abstract: A method and apparatus for equalizing phase currents in multiphase switching power converters is described in which pairs of stored digital values that directly or indirectly control the values of the currents in the conversion phases are altered in equal and opposite increments. In one embodiment the digital values being controlled are the relative on-times of the power switches in pairs of conversion phase. The method is stepwise and repetitive in the sense that, instead of calculating or inferring offset values that seek to bring all of the currents in the phases toward equality, pairs of phase currents are altered repetitively and iteratively, using equal and opposite steps in the values of their respective control variables, until the phases are all sufficiently close in value. The steps may be of fixed size or the step size may be selectively modified to optimize the convergence time of the algorithm.

Abstract: A multi-phase voltage regulator comprises a plurality of DC/DC voltage regulators. Each of the DC/DC voltage regulators is associated with a particular phase of the multi-phase regulator. Each of the regulators comprises a first switching transistor connected between an input voltage node and a phase node responsive to switching control signals. A second switching transistor is connected between the phase node and a ground node and is responsive to the switching control signals. An inductor is connected between the phase node and an output voltage node. Control logic generates the switching control signals responsive to a pulse control signal. PFM/PWM transition logic generates the pulse control signal. The pulse control signal transitions between a PWM signal and a PFM signal responsive to an error voltage, a feedback voltage from the output voltage node and an inductor current through the inductor. An error amplifier generates the error voltage responsive to the feedback voltage and a reference voltage.

Abstract: According to one configuration, a monitor circuit monitors a delivery of power supplied by one or more switch devices to a dynamic load. Based on an amount of power delivered to the load as measured by the monitor circuit, a control circuit produces a voltage control signal. A gate bias voltage generator circuit utilizes the voltage control signal to generate a switch activation voltage or bias voltage. A switch drive circuit uses the switch activation voltage as generated by the bias voltage generator to activate each of the one or more switch devices during a portion of a switching cycle when a respective switch device is in an ON state, and the respective switch device conducts current from a voltage source through the switch device to the load. The control circuit adjusts the voltage control signal to modify a level of the switch activation voltage depending on the dynamic load.

Abstract: A multi-loop power factor correction circuit includes a first rectifier circuit, an integrated multi-inductor magnetic member, plural switching circuits, plural rectifying elements, and a power factor correction controlling circuit. The integrated multi-inductor magnetic member includes a first slab, a second slab, a middle post, plural lateral posts, and plural winding coil assemblies. The winding coil assemblies are wound around respective lateral posts to form at least a first inductor and a second inductor. The magnetic flux cross-section area of the middle post is smaller than the sum of the magnetic flux cross-section areas of the lateral posts. The switching circuits are alternately conducted, so that the distribution of an input AC current is similar to the waveform of the input AC voltage.

Abstract: A multiphase DC/DC converter according to the present invention includes: a plurality of DC/DC converters whose outputs are connected in common to supply electric power to a load; a load state detection portion which detects a state of the load connected to the plurality of DC/DC converters and outputs a detection result; and a control circuit which drives each of the plurality of DC/DC converters based on outputs from the plurality of DC/DC converters, and based on an output from the load state detection portion, drives the plurality of DC/DC converters with output phases of the plurality of DC/DC converters deviated from each other or with the output phases of the plurality of DC/DC converters aligned with each other.

Abstract: A method and system control the adding or dropping of phases in a multiphase voltage regulator. The regulator has an efficiency and this efficiency of the regulator is calculated for a given number of phases being activated from an output voltage, input voltage, output current, and duty cycle of the regulator. The efficiency of the regulator is also calculated if a phase is added using the derivative of the duty cycle as a function of the output current. The efficiency of the regulator is further calculated if a phase is dropped using the derivative of the duty cycle as a function of the output current. From these operations of calculating, a phase is either added, dropped, or the phase is maintained at its current value to thereby optimize the efficiency of the regulator.

Abstract: A power supply, an over voltage protection (OVP) apparatus, and an OVP method are provided. The present invention employs the OVP apparatus for monitoring a core power. When a voltage level of the core power is higher than a reference voltage, the OVP apparatus disables a power supply unit. As such, the present invention is adapted for avoiding damage to a capacitor of a conversion unit or load caused by abnormal boost of the voltage level of the core power.

Abstract: A switching circuit device provided between a first node and a second node within a power supply circuit, an inductor being coupled to the first or second node, the switching circuit device has: a first transistor that is provided between the first node and the second node and has a first gate width; a second transistor that is provided in parallel with the first transistor between the first node and the second node and has a second gate width larger than the first gate width; and a driving signal generation circuit, which, in response to a control signal generated according to an output voltage of the power supply circuit, outputs a first driving signal which drives the first transistor on and off, and a second driving signal which drives the second transistor on and off, with different timings between the first driving signal output and the second driving signal output.

Abstract: A multiphase power converter has a plurality of phase circuits, each of which provides a phase current when being active. During single-phase operation of the multiphase power converter, an enhanced phase control circuit and method monitor the summation of the phase currents, and when the summation becomes higher than a threshold, switch the multiphase power converter to a higher power zone to increase the number of active phases. A high efficiency and high reliability multiphase power converter is thus accomplished.

Abstract: An apparatus includes pulse width modulation (PWM) circuitry configured to generate a PWM signal based on a feedback voltage associated with current flowing through a load, such as one or more light emitting diodes (LEDs). The apparatus also includes a power switch configured to control the current flowing through the load on the PWM signal. The apparatus further includes averaging circuitry configured to provide an average of the feedback voltage to the PWM circuitry. The averaging circuitry is may be configured to provide the feedback voltage to the PWM circuitry during a first phase of operation and to provide the average of the feedback voltage to the PWM circuitry during a second phase of operation. The average of the feedback voltage may be referenced to a reference voltage received by an error amplifier in the PWM circuitry during both the first and second phases of operation.

Abstract: An apparatus includes at least one filter configured to filter a reference voltage to generate a filtered reference voltage. The apparatus also includes an amplifier configured to amplify a difference between the filtered reference voltage and a feedback voltage to generate a drive signal. The apparatus further includes a first transistor configured to generate an output voltage based on the drive signal, where the feedback voltage is based on the output voltage. The apparatus also includes a second transistor configured to generate a first bias current for the amplifier based on the drive signal. In addition, the apparatus includes a voltage-to-current converter configured to generate a second bias current for the amplifier based on the reference voltage and the feedback voltage. The second transistor can generate higher first bias currents during higher load currents, and the voltage-to-current converter can generate higher second bias currents during faster load current variations.

Abstract: A multi-module bidirectional power converter may comprise a low side common node, a high side common node and at least first and second bidirectional DC/DC converter modules. The modules may comprise first and second low voltage switches, first and second high voltage switches and a transformer. The transformer may comprise a low side winding having first and second legs and a high side winding having first and second legs. The first leg of the low side winding may be connected with the first and second low voltage switches of the module. The second leg of the low side winding may be connected with the low side common node of the multi-module bidirectional power converter. The first leg of the high side winding may be connected with the first and second high voltage switches of the module. The second leg of the high side winding may be connected to the high side common node of the multi-module bidirectional power converter.

Abstract: A consistently balanced thermal load switched mode converter alternates among all phases of the power switching circuit to provide a uniform temperature rise on all components of the circuit under all load conditions. During low load conditions typically phases are held idle and the load is concentrated on the active phase(s) only, with cooling requirements (air flow, etc.) based on the temperature of the active phase(s). By alternating the active phases in a balanced sequence the thermal load is distributed across all of the phases minimizing system cooling requirements under all load conditions.

Abstract: A power regulation scheme includes a first voltage regulation portion connected in parallel with a second voltage regulation portion that regulates a voltage if an open condition occurs within the first voltage regulation portion. Each voltage regulation portion may include a first voltage regulator connected in series with a second voltage regulator that regulates the voltage if a short condition occurs within the first voltage regulator. Each voltage regulation portion may utilize a switching element to route an output voltage of the first voltage regulator past the second voltage regulator if the output voltage has been regulated and/or to force the output voltage to be regulated by the second voltage regulator if the output voltage has not been regulated.

Abstract: An integrated circuit device for delivering power to a load includes a controller circuit, a cascade circuit, and a power delivery circuit. The controller circuit generates a plurality of control signals. The cascade circuit receives the control signals from the controller circuit and sequentially outputs the control signals onto a cascade bus. The power delivery circuit receives the control signals from the controller circuit and delivers an amount of current to the load, in response to one of the control signals.