With Threshold Detection Patents (Class 323/274)
  • Patent number: 11085953
    Abstract: The present invention relates to a half-bridge signal processing circuit comprising a first and a second branch. The first branch comprises a first stimulus responsive sense element and a first current source arranged to provide a current to the first sense element. The second branch comprises a second stimulus responsive sense element and a second current source arranged to provide a current to said second sense element. The first and the second branch have a terminal in common. The first branch comprises a first node between said the current source and the first stimulus responsive sense element configured to generate a first signal related to a voltage over the first sense element. The second branch comprises a second node between the second current source and the second stimulus responsive sense element configured to generate a second signal related to a voltage over the second sense element.
    Type: Grant
    Filed: July 16, 2019
    Date of Patent: August 10, 2021
    Assignee: MELEXIS TECHNOLOGIES NV
    Inventors: Asparuh Ivanov Grigorov, Johan Vergauwen
  • Patent number: 11070047
    Abstract: Disclosed are an overcurrent protection driving circuit and a display apparatus. The overcurrent protection driving circuit includes a power supply circuit, a current feedback circuit, a current detection circuit, a level output circuit and a switching circuit, the power supply circuit outputs a direct current voltage to a display panel via the switching circuit, the current feedback circuit converts a voltage signal transmitted by the power supply circuit to the display panel to a current signal and feeds the current signal back to the current detection circuit, and when a current value corresponding to the current signal is smaller than an overcurrent protection current threshold value, the current detection circuit outputs a first level signal to control the switching-off of the switching circuit to cut off the supply of power from the power supply circuit to the display panel.
    Type: Grant
    Filed: April 17, 2019
    Date of Patent: July 20, 2021
    Assignees: Chongqing HKC Optoelectronics Technology Co., Ltd., HKC Corporation Limited
    Inventor: Xiaoyu Huang
  • Patent number: 11003202
    Abstract: A PMOS-output LDO with full spectrum PSR is disclosed. In one implementation, a LDO includes a pass transistor (MO) having a source coupled to an input voltage (Vin); a noise cancelling transistor (MD) having a source coupled to the Vin, a gate coupled to a drain and a gate of the pass transistor; a source follower transistor (MSF) having a source coupled to a drain of the pass transistor, a drain coupled to the drain and gate of the noise cancelling transistor; a current sink coupled between the drain of the source follower transistor and ground; and an error amplifier having an output to drive the gate of the source follower transistor.
    Type: Grant
    Filed: March 4, 2020
    Date of Patent: May 11, 2021
    Assignee: QUALCOMM INCORPORATED
    Inventor: Soheil Golara
  • Patent number: 10996700
    Abstract: A fast response amplifier circuit includes a pre-stage circuit and an output stage circuit. The pre-stage circuit generates a control signal according to a difference between a first input signal and a second input signal. The output stage circuit generates an output signal at an output node according to the control signal. The output stage circuit includes: a power transistor controlled by a driving signal to generate the output signal; a voltage positioning transistor operates according to the output signal to steer a first portion and a second portion of a bias current; an overshoot detecting circuit detecting an overshoot of the output signal to generate an overshoot indicating signal; and a first overshoot suppressor which generates a first overshoot suppressing signal according to the overshoot indicating signal to adjust a conduction resistance of the power transistor to suppress an overshoot of the output signal.
    Type: Grant
    Filed: December 7, 2019
    Date of Patent: May 4, 2021
    Assignee: PIXART IMAGING INCORPORATION
    Inventor: Kok-Siang Tan
  • Patent number: 10921837
    Abstract: A voltage regulator includes a voltage regulation unit that regulates an external power supply voltage and outputs an internal voltage, and an optimization control unit that adjusts a bias current, drivability, and output capacitance of the voltage regulation unit in response to a training enable signal and optimizes the internal voltage to a predetermined value.
    Type: Grant
    Filed: March 4, 2016
    Date of Patent: February 16, 2021
    Assignee: SK hynix Inc.
    Inventor: Hyun-Ju Ham
  • Patent number: 10916933
    Abstract: A power control device includes: an output voltage controller configured to control an output voltage based on a feedback voltage corresponding to the output voltage; and an overvoltage protector configured to continue or stop the operation of the output voltage controller based on a first detection result of whether the output voltage has exceeded an output voltage threshold value and a second detection result of whether the feedback voltage has fallen to or below a feedback voltage threshold value.
    Type: Grant
    Filed: June 12, 2020
    Date of Patent: February 9, 2021
    Assignee: Rohm Co., Ltd.
    Inventor: Kenichi Okajima
  • Patent number: 10915121
    Abstract: A system includes a low dropout regulator (LDO) circuit. The LDO circuit includes an error amplifier with an input node, a reference node, and an output node. The LDO circuit also includes a pass transistor with a control terminal, a first current terminal, and a second current terminal. The control terminal is coupled to the output node of the error amplifier, the first current terminal is coupled to a voltage source node, and the second current terminal is coupled to an LDO output node. The LDO output node is coupled to the input node of the error amplifier. The LDO circuit also includes a switched-capacitor network coupled between error amplifier and the pass transistor. The switched-capacitor network comprises a pair of switches and a current-controlled oscillator coupled to control terminals of the switches.
    Type: Grant
    Filed: November 8, 2018
    Date of Patent: February 9, 2021
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Raveesh Magod Ramakrishna, Sanjeev Manandhar
  • Patent number: 10866607
    Abstract: Techniques that can prevent the low dropout (LDO) output voltage degradation that occurs with conventional LDO regulators, even with large LDO supply variations. An LDO regulator circuit can include another loop that is much slower than the main LDO regulator loop, concentrates the load regulation, and fixes the voltage regulation runaway problem due to the large supply variation with large frequency content. The LDO regulator circuit can include a negative feedback correction loop that corrects the LDO output by, in some examples, adding sink current to the main voltage regulation loop via a programmable current sink element.
    Type: Grant
    Filed: December 17, 2019
    Date of Patent: December 15, 2020
    Assignee: Analog Devices International Unlimited Company
    Inventors: Celal Avci, James Lin, Shawn S. Kuo
  • Patent number: 10866605
    Abstract: An ultra-low power consumption power supply structure, comprising: a first LDO circuit, a second LDO circuit, a first Bandgap module, a second Bandgap module and a switching circuit, wherein the first LDO circuit is used for providing an LDO output voltage when an SOC chip is in a normal operating mode, and the second LDO circuit is used for providing an LDO output voltage when the SOC chip is in an ultra-low power consumption mode; the first Bandgap module is used for providing, based on a main power supply voltage, a first reference voltage for the first LDO circuit at the time of power-on startup, and the second Bandgap module is used for providing a second reference voltage for the second LDO circuit after power-on startup is completed; and the switching circuit is used for switching the mode in which the first reference voltage is output by the first Bandgap module at the time of power-on startup to the mode in which the second reference voltage is output by the second Bandgap module after power-on start
    Type: Grant
    Filed: May 22, 2018
    Date of Patent: December 15, 2020
    Assignee: Beijing Smartchip Microelectronics Technology Comp
    Inventors: Dongyan Zhao, Xiaoke Tang, Xiaoman Wang, Dejian Li, Haifeng Zhang, Yi Hu, Lixin Yang, Yidong Yuan, Lang Tan, Yongwang Ma, Jiali Hou
  • Patent number: 10862396
    Abstract: An electronic device includes a switched-mode power supply having a first operating phase during which the output node of the switched-mode power supply is coupled by an on switch to a source of a first reference voltage. The first operating phase is followed by a second operation phase during which the output node of the switched-mode power supply is in a high impedance state. While in the second operating phase, a capacitor connected to the output node of the switched-mode power supply at least partially discharges into a load.
    Type: Grant
    Filed: October 11, 2019
    Date of Patent: December 8, 2020
    Assignee: STMicroelectronics (Rousset) SAS
    Inventors: Sebastien Ortet, Didier Davino, Cedric Thomas
  • Patent number: 10761551
    Abstract: A voltage regulator includes two input pairs of opposite type transistors, p-type and n-type, to provide a soft-start functionality for gradually increasing the voltage regulator's output voltage from zero, or a voltage below the thresholds of the n-type transistors, to an operational voltage. The voltage regulator operates in a soft-start mode during which a variable input voltage signal is ramped up to allow the output voltage to reach the operational voltage, and a normal-operation mode during which the operational voltage is maintained.
    Type: Grant
    Filed: June 25, 2019
    Date of Patent: September 1, 2020
    Assignee: STMicroelectronics (China) Investment Co. Ltd
    Inventors: Zhenghao Cui, Fei Wang, Ming Jiang
  • Patent number: 10749552
    Abstract: Systems, apparatuses, and methods for performing efficient data transfer in a computing system are disclosed. A computing system includes multiple transmitters sending singled-ended data signals to multiple receivers. A termination voltage is generated and sent to the multiple receivers. The termination voltage is coupled to each of signal termination circuitry and signal sampling circuitry within each of the multiple receivers. Any change in the termination voltage affects the termination circuitry and affects comparisons performed by the sampling circuitry. Received signals are reconstructed at the receivers using the received signals, the signal termination circuitry and the signal sampling circuitry.
    Type: Grant
    Filed: September 24, 2018
    Date of Patent: August 18, 2020
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Balwinder Singh, Milam Paraschou, Chad S. Gallun, Jeffrey Cooper, Dean E. Gonzales, Alushulla Jack Ambundo, Thomas H. Likens, III, Gerald R. Talbot
  • Patent number: 10739801
    Abstract: A band-gap reference circuit including a low drop-out (LDO) regulator and a reference circuit is disclosed. The LDO regulator outputs a regulating voltage which is provided to the reference circuit, and wherein the regulating voltage is maintained constant and powers the reference circuit such that the reference circuit outputs a band-gap reference voltage. According to the reference circuitry, the LDO regulator can output a stable voltage such that the regulating voltage can be maintained constant, therefore, causing the band-gap reference voltage output from the reference circuit to be maintained constant, hence improving the reliability of the band-gap reference voltage.
    Type: Grant
    Filed: December 6, 2018
    Date of Patent: August 11, 2020
    Assignee: WUHAN XINXIN SEMICONDUCTOR MANUFACTURING CO., LD.
    Inventor: Yuan Tang
  • Patent number: 10734954
    Abstract: An operational amplifier including an input stage coupled to an input terminal, an output stage coupled to an output terminal, and a gain node between the input stage and the output stage. A bias current source is couplable to the input stage to supply a bias current thereto and a current mirror circuit mirrors the bias current toward the gain node and the output stage. A switch circuit includes a switch activatable to bring the gain node to a pre-bias voltage and a switch coupled to the output stage and switchable between a first state and a second state in which the output stage is active and non-active, respectively—. A further switch circuit is coupled to the output terminal and switchable between a first state and a second state in which the output stage is coupled to the output terminal and to a reference level, respectively.
    Type: Grant
    Filed: August 30, 2017
    Date of Patent: August 4, 2020
    Assignee: STMICROELECTRONICS S.r.l.
    Inventors: Andrea Gambero, Davide Ugo Ghisu, Sandro Rossi
  • Patent number: 10714929
    Abstract: A power control device includes: an output voltage controller configured to control an output voltage based on a feedback voltage corresponding to the output voltage; and an overvoltage protector configured to continue or stop the operation of the output voltage controller based on a first detection result of whether the output voltage has exceeded an output voltage threshold value and a second detection result of whether the feedback voltage has fallen to or below a feedback voltage threshold value.
    Type: Grant
    Filed: February 27, 2019
    Date of Patent: July 14, 2020
    Assignee: Rohm Co., Ltd.
    Inventor: Kenichi Okajima
  • Patent number: 10666147
    Abstract: A GaN resonant circuit is disclosed. The GaN resonant circuit includes a power switch configured to be selectively conductive according to one or more gate signals, and configured to generate a switch signal indicative of the value of the current flowing therethrough. The GaN resonant circuit also includes a power switch driver, configured to generate the gate signals in response to one or more control signals, where the power switch driver is configured to cause the power switch to become nonconductive in response to the switch signal indicating that the value of the current flowing through the power switch has transitioned across a threshold value.
    Type: Grant
    Filed: April 8, 2019
    Date of Patent: May 26, 2020
    Assignee: Navitas Semiconductor, Inc.
    Inventors: Thomas Ribarich, Daniel Marvin Kinzer, Tao Liu, Marco Giandalia, Victor Sinow
  • Patent number: 10615687
    Abstract: The present disclosure relates to a direct current (DC)-DC converter associated with a radio frequency transceiver, which includes a transceiver capacitor. The disclosed DC-DC converter includes a battery terminal configured to provide a battery voltage, a charge pump coupled to the battery terminal and configured to provide a boosted voltage based on the battery voltage, a power inductor is coupled between the charge pump and the transceiver capacitor, and fast voltage charging circuitry with a fast-path block that is coupled between the charge pump and the transceiver capacitor. Herein, the transceiver capacitor is capable to be charged with the boosted voltage through the power inductor. The fast-path block is parallel with the power inductor and configured to provide an extra charging path to the transceiver capacitor, so as to accelerate a charging speed of the transceiver capacitor.
    Type: Grant
    Filed: June 21, 2019
    Date of Patent: April 7, 2020
    Assignee: Qorvo US, Inc.
    Inventor: Nadim Khlat
  • Patent number: 10581534
    Abstract: A noise cancellation system comprises a first noise cancellation apparatus configured to process an I-channel signal, wherein an I-channel differential mode second-order intermodulation component and an I-channel common mode second-order intermodulation component cancel each other in the first noise cancellation apparatus and a second noise cancellation apparatus configured to process a Q-channel signal, wherein a Q-channel differential mode second-order intermodulation component and a Q-channel common mode second-order intermodulation component cancel each other in the second noise cancellation apparatus.
    Type: Grant
    Filed: October 27, 2017
    Date of Patent: March 3, 2020
    Assignee: Futurewei Technologies, Inc.
    Inventors: Ping Yin, Robert Irvine, Seong-Mo Yim, Yusong Chi, Chengfang Liao, Feng Wang, Eric Sung
  • Patent number: 10546717
    Abstract: The system described herein relates to a high-voltage supply unit for providing an output voltage for a particle beam apparatus, wherein the particle beam apparatus is embodied as, for example, an electron beam apparatus and/or an ion beam apparatus. The system described herein is based on the fact that it was recognized that a bipolar voltage supply unit can be formed by means of a unipolar first current source and a unipolar second current source, said bipolar voltage supply unit enabling a load current in two directions. The high-voltage supply unit according to the system described herein can be operated in the 4-quadrant operation. In the 4-quadrant operation, a first voltage source for supplying the first current source and a second voltage source for supplying the second current source are embodied as different voltage sources.
    Type: Grant
    Filed: March 19, 2018
    Date of Patent: January 28, 2020
    Assignee: Carl Zeiss Microscopy GmbH
    Inventors: Edgar Fichter, Joerg Fober, Dirk Preikszas, Christian Hendrich, Michael Schnell, Momme Mommsen
  • Patent number: 10539972
    Abstract: A dynamic current sink includes the following elements. A voltage comparator compares a reference voltage with a second control signal from an LDO (Low Dropout Linear Regulator) to generate a first control signal. A first transistor selectively pulls down a voltage at a first node according to the first control signal. The inverter is coupled between the first node and a second node. An NAND gate has a first input terminal coupled to a second transistor and a third node, a second input terminal coupled to the second node, and an output terminal coupled to a fourth node. A capacitor is coupled between the fourth node and a fifth node. A resistor is coupled between the fifth node and a ground voltage. A third transistor has a control terminal coupled to the fifth node, and selectively draws a discharge current from an output node of the LDO.
    Type: Grant
    Filed: December 26, 2017
    Date of Patent: January 21, 2020
    Assignee: MEDIATEK INC.
    Inventors: Chin-Hsun Chen, Hao-Yuan Lin, Chia-Hua Chou
  • Patent number: 10505443
    Abstract: According to one embodiment, a charge pump is configured to generate a negative potential at an output node. A first transistor and a first resistor are coupled in series in order between a first node and a second node. A second resistor is coupled between the second node and the output node. A second transistor and a third resistor are coupled in series in order between the first node and a third node. A fourth resistor is coupled between the third node and the output node. A third transistor is coupled between a fourth node and the output node, and coupled to the second node and the third node at a gate.
    Type: Grant
    Filed: August 31, 2018
    Date of Patent: December 10, 2019
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventor: Hironori Nagasawa
  • Patent number: 10491119
    Abstract: A current sensing circuit is described. The current sensing circuit is for sensing a high side current through a high side switch and/or for sensing a low side current through a low side switch of a half bridge comprising the high side switch and the low side switch, which are arranged in series between a high side potential and a low side potential. The high side switch and the low side switch are in respective on-phases in a mutually exclusive manner. The high side sensing circuit comprises mirroring circuitry to mirror a current from a first node of the high side sensing circuit to an output node of the high side sensing circuit. The current sensing circuit comprises a low side sensing circuit to provide a sensed low side current which is indicative of the low side current during an on-phase of the low side switch.
    Type: Grant
    Filed: October 6, 2017
    Date of Patent: November 26, 2019
    Assignee: Dialog Semiconductor (UK) Limited
    Inventors: Pietro Gambetta, Luigi Lacapra
  • Patent number: 10490289
    Abstract: A voltage generator of a nonvolatile memory device includes a charging circuit, a current mirror circuit, a discharging circuit and an output circuit. The charging circuit amplifies a difference between a reference voltage and a feedback voltage to generate a first current. The current mirror circuit is connected to the charging circuit and generates a second current based on the first current. The discharging circuit is connected to the current mirror circuit to draw the second current, and discharges the output voltage to a target level by adjusting discharging amount of the second current based on a sensing voltage which reflects a change of the feedback voltage. The output circuit is connected to the current mirror circuit, and provides the output voltage based on the first current and the second current to a first word-line connected to an output node.
    Type: Grant
    Filed: January 3, 2018
    Date of Patent: November 26, 2019
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Gyo-Soo Choo, Ji-Hyun Park, Chi-Weon Yoon, Moo-Sung Kim
  • Patent number: 10455509
    Abstract: The techniques described herein reduce a rate at which a mobile device consumes energy when receiving, processing and storing data events (e.g., emails, instant messages, social networking messages and notifications, etc.). In various embodiments, the techniques may be implemented in accordance with a connected standby mode of operation for the mobile device. Therefore, the techniques may decouple data reception from data processing when exchanging data events in the connected standby mode. In various embodiments, the techniques may store persistent memory operations for multiple data events in a temporary cache and process the stored persistent memory operations as a batch (e.g., perform the persistent memory operations together). In various embodiments, the techniques may partition data storage space allocated for data communications applications on the mobile device.
    Type: Grant
    Filed: May 5, 2017
    Date of Patent: October 22, 2019
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Yunxin Liu, Thomas Moscibroda, Ranveer Chandra, Yongguang Zhang, Fengyuan Xu
  • Patent number: 10427626
    Abstract: Provided is a vehicle control device comprising a plurality of constant voltage generation circuits, wherein a specified voltage is supplied to a load even if any one of the constant voltage generation circuits outputs a voltage that exceeds the specified voltage. This vehicle control device is provided with a first and second constant voltage generation circuit that each output a voltage to a load, and when either the first or second constant voltage generation circuit outputs a voltage that exceeds a reference voltage, cuts off the output of that constant voltage generation circuit from the load.
    Type: Grant
    Filed: January 29, 2016
    Date of Patent: October 1, 2019
    Assignee: HITACHI AUTOMOTIVE SYSTEMS, LTD.
    Inventor: Itaru Tanabe
  • Patent number: 10416695
    Abstract: A voltage regulation system includes an error amplifier configured to generate an error amplifier output based on a reference voltage, input voltage, first feedback voltage, and second feedback voltage. The feedback voltages are based on a first output voltage at the system's output node. The system further includes a capacitor configured to provide the first feedback voltage to the error amplifier. The system further includes a voltage-controlled current source configured to generate a current based on the first output voltage. The second feedback voltage is based on the current. The system further includes a transistor configured to provide a second output voltage at the output node based on the error amplifier output. The transistor is connected to the output node and the capacitor. Such a voltage regulation system may allow a high power supply rejection response over a wide range of frequencies and loads while maintaining stability and phase margin.
    Type: Grant
    Filed: June 19, 2018
    Date of Patent: September 17, 2019
    Assignee: SYNAPTICS INCORPORATED
    Inventor: Eric Bohannon
  • Patent number: 10416694
    Abstract: A regulator circuit includes: a voltage detection circuit that detects a magnitude of an output voltage of an output node, and outputs a feedback voltage that indicates a result of the detection; an error amplifier circuit that compares the feedback voltage with a reference voltage, and outputs a voltage that indicates a result of the comparison; an output circuit that supplies an output current to the output node according to the voltage output by the error amplifier circuit; a current detection circuit that detects a magnitude of the output current; and a current bias circuit that supplies an output bias current to the output node, and increases or decreases the output bias current based on a result of the detection of the current detection circuit.
    Type: Grant
    Filed: September 14, 2018
    Date of Patent: September 17, 2019
    Assignee: Panasonic Intellectual Property Management Co., Ltd.
    Inventors: Takashi Ono, Reiji Mochida
  • Patent number: 10386876
    Abstract: A circuit protective system. The system has: (i) an input for sensing an operational voltage responsive to a current flowing through a transistor; (ii) circuitry for applying a forced voltage at the input; (iii) voltage-to-current conversion circuitry for outputting a reference current in response to the forced voltage at the input; (iv) circuitry for providing a reference trim current in response to a trim indicator; and (v) comparison circuitry for outputting a limit signal in response to a comparison of the reference current and the reference trim current.
    Type: Grant
    Filed: August 8, 2016
    Date of Patent: August 20, 2019
    Assignee: Texas Instruments Incorporated
    Inventors: Md. Abidur Rahman, Sualp Aras, Tri Cao Nguyen
  • Patent number: 10379555
    Abstract: A voltage regulator includes two input pairs of opposite type transistors, p-type and n-type, to provide a soft-start functionality for gradually increasing the voltage regulator's output voltage from zero, or a voltage below the thresholds of the n-type transistors, to an operational voltage. The voltage regulator operates in a soft-start mode during which a variable input voltage signal is ramped up to allow the output voltage to reach the operational voltage, and a normal-operation mode during which the operational voltage is maintained.
    Type: Grant
    Filed: February 15, 2017
    Date of Patent: August 13, 2019
    Assignee: STMicroelectronics (China) Investment Co. Ltd
    Inventors: Zhenghao Cui, Fei Wang, Ming Jiang
  • Patent number: 10345838
    Abstract: An example embodiment is directed to a voltage regulation circuit. The voltage regulation circuit comprises a first control loop and a second control loop that are separately activatable. The first control loop regulates an output current provided to an output terminal, and the second control loop regulates an output voltage provided to the output terminal. The voltage regulation circuit further includes a mode switching circuit that switches operation between the first and the second control loops by separately activating one of the first and second control loops and deactivating the other in response to a fault condition at the output terminal at which a regulated load is connectable.
    Type: Grant
    Filed: June 26, 2018
    Date of Patent: July 9, 2019
    Assignee: NXP B.V.
    Inventors: Ravichandra Karadi, Arnoud Pieter van der Wel
  • Patent number: 10319539
    Abstract: A ruggedized electronic device includes a case and an enclosure within the case. The case provides a first level of explosive atmosphere protection to components within the case. The enclosure provides a second level of explosive atmosphere protection to the components within the enclosure. The second level is higher than the first level. The enclosure includes a main board within the enclosure, and a switch. The main board includes a connection from within the enclosure to the case. The switch provides the connection to the case in a first switched mode and isolates the connection from the case in a second switched mode.
    Type: Grant
    Filed: March 11, 2016
    Date of Patent: June 11, 2019
    Assignee: Dell Products, LP
    Inventors: David W. Grunow, Mark D. Menendez
  • Patent number: 10274986
    Abstract: An integrated circuit is disclosed for current-controlled voltage regulation. In an example aspect, the integrated circuit includes a voltage regulator and a current-controlled clamp. The voltage regulator has a regulator output node and produces a regulator current. The voltage regulator includes an error amplifier and an output transistor. The error amplifier has first and second input nodes and an error amplifier output node, with the first input node coupled to a reference voltage. The error amplifier generates an error amplifier output voltage at the output node. The output transistor is coupled between the error amplifier output node and the regulator output node. The output transistor is coupled to the second input node via the regulator output node to establish a feedback path for the voltage regulator. The current-controlled clamp is coupled to the error amplifier output node and clamps the error amplifier output voltage based on the regulator current.
    Type: Grant
    Filed: September 22, 2017
    Date of Patent: April 30, 2019
    Assignee: QUALCOMM Incorporated
    Inventors: Chi Fan Yung, Xiaodan Zou, Ngai Yeung Ho, Hua Guan, Kan Li
  • Patent number: 10254777
    Abstract: A regulator circuit includes an OP-amp, buffer, power transistor, voltage divider, load, and feedback current generator. The OP-amp generates a first voltage signal by amplifying a difference between input and feedback voltage signals, and drives a first node as the first voltage signal. The buffer drives a second node as a second voltage signal based on the first voltage signal. The power transistor includes drain, gate and source terminals respectively connected to a supply voltage, the second node, and a third node. The voltage divider generates the feedback voltage signal by dividing an output voltage signal of the third node. The load includes a terminal connected to the third node and another terminal receiving a ground voltage. The feedback current generator provides a first feedback current corresponding to a ripple of the output voltage signal to the first node for enhancing a speed at which the ripple reduced.
    Type: Grant
    Filed: August 31, 2015
    Date of Patent: April 9, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Quoc Hoang Duong
  • Patent number: 10256623
    Abstract: A power control device includes: an output voltage controller to control the output voltage of a power supply circuit based on a feedback voltage obtained by dividing the output voltage with voltage dividing resistors; and an overvoltage protection circuit to protect against an overvoltage in the output voltage. The overvoltage protection circuit includes: an output voltage detector to detect whether the output voltage has risen above an output voltage threshold value; and a feedback voltage detector to detect whether the feedback voltage has fallen to or below a feedback voltage threshold value. The overvoltage protection circuit continues or stops operation of the output voltage controller based on a first detection output from the output voltage detector and a second detection output from the feedback voltage detector.
    Type: Grant
    Filed: July 13, 2018
    Date of Patent: April 9, 2019
    Assignee: Rohm Co., Ltd.
    Inventor: Kenichi Okajima
  • Patent number: 10216206
    Abstract: A voltage regulator apparatus with a rejection capability for high frequency power noise includes a low dropout linear regulator and a noise rejection circuit. The low dropout linear regulator has at least one operational amplifier which is powered by a power source, and the low dropout linear regulator is configured for receiving and regulating an input voltage signal to provide an output voltage signal for a load. The noise rejection circuit is coupled between the power source and the low dropout linear regulator, and is configured for providing a power noise rejection capability upon a high frequency part of a power signal of the power source to generate the power signal with less high frequency noise to the at least one operational amplifier.
    Type: Grant
    Filed: August 9, 2017
    Date of Patent: February 26, 2019
    Assignee: PixArt Imaging Inc.
    Inventor: Chia-Ming Wu
  • Patent number: 10207662
    Abstract: A voltage regulation system, particularly for a motor vehicle, adapted to be connected to a voltage source in order to provide a regulated voltage Vdd to at least one functional component F, the regulation system including a pre-regulator adapted to be connected to a voltage source and a regulator REG including at least one pre-regulation port PPR adapted to be connected to the pre-regulator and one functional port Pdd adapted to be connected to a functional component, the regulator including an adaptation device Q directly connecting the pre-regulation port to the functional port of the regulator, the adaptation device consisting of a single MOS power transistor including a drain D, a source S and a gate G. The MOS transistor includes an intrinsic diode DIODE between its drain and its source which is oriented to block the flow of a current between the functional port and the pre-regulation port.
    Type: Grant
    Filed: September 26, 2014
    Date of Patent: February 19, 2019
    Assignees: CONTINENTAL AUTOMOTIVE FRANCE, CONTINENTAL AUTOMOTIVE GMBH
    Inventors: Jean-Pierre Delcol, Aurore Desgeorge
  • Patent number: 10209756
    Abstract: An operating system including a voltage converter, a processing circuit, and a protector is provided. The voltage converter converts an input voltage according to a feedback voltage to generate an output voltage. The processing circuit is coupled to the voltage converter and processes the output voltage according to a control signal to generate the feedback voltage. The protector is coupled to the voltage converter and the processing circuit and activates or deactivates the voltage converter according to the feedback voltage.
    Type: Grant
    Filed: October 6, 2016
    Date of Patent: February 19, 2019
    Assignee: VIA TECHNOLOGIES, INC.
    Inventors: Wei-Hung Chen, Kuo-Yu Wu
  • Patent number: 10185342
    Abstract: A configurable charge converter may include an adaptive low-dropout regulator. The adaptive low-dropout regulator may include a headroom detection circuit and a power supply controller. The headroom detection circuit may monitor a voltage drop across a field effect transistor (FET) and cause a programmable power supply to increase or decrease an output voltage accordingly. In some aspects, the configurable charge converter may include an adaptive low-dropout regulator and a buck/boost converter. The output power of the configurable charge controller may be provided by the adaptive low-dropout regulator, the buck/boost converter, or by both the adaptive low-dropout regulator and the buck/boost converter operating in combination.
    Type: Grant
    Filed: September 13, 2017
    Date of Patent: January 22, 2019
    Assignee: QUALCOMM Incorporated
    Inventors: Aaron Melgar, Christian Sporck, Chunping Song, David Wong, Rashed Hoque, Neal Horovitz, Hector Ivan Oporta, Daryl Bergstrom
  • Patent number: 10152071
    Abstract: This application relates to a circuit for generating an output voltage and regulating the output voltage to a target voltage. The circuit includes a switchable voltage divider circuit configured to generate a feedback voltage that is a variable fraction of the output voltage, an error amplifier stage configured to generate a control voltage on the basis of a reference voltage and the variable fraction of the output voltage, a buffer stage configured to generate the output voltage on the basis of the control voltage, and a charge injection circuit configured to inject charge at an intermediate node between the error amplifier stage and the buffer stage to thereby modify the control voltage generated by the error amplifier stage. The application further relates to a method of operating such circuit.
    Type: Grant
    Filed: November 21, 2016
    Date of Patent: December 11, 2018
    Assignee: Dialog Semiconductor (UK) Limited
    Inventors: Dan Ciomaga, Mihail Jefremow, Stephan Drebinger, Fabio Rigoni
  • Patent number: 10118495
    Abstract: A vehicle power distribution system includes a battery having a nominal voltage, a vehicle electrical load having a supply voltage different than the nominal voltage, and a monolithic solid state relay including integrated circuitry to convert the nominal voltage to the rated voltage and an output configured to selectively energize the vehicle electrical load with the rated voltage in response to a control signal from a vehicle controller applied to an input of the relay. The relay may include a PWM controller to provide a switching signal to a transistor connected to an output filter to step down the nominal voltage of the battery to the rated voltage of the vehicle electrical load. Relay output voltage and current monitoring circuitry may be connected to the PWM controller to provide over current and over voltage protection.
    Type: Grant
    Filed: December 3, 2015
    Date of Patent: November 6, 2018
    Assignee: Ford Global Technologies, LLC
    Inventor: Amin Emrani
  • Patent number: 10088884
    Abstract: A protocol can specifie a power-sourcing voltage range that indicates power sourcing capabilities. Additional power sourcing capabilities can be communicated using voltage variations within the power-sourcing voltage range. A power-sourcing device can provide power to an external power-sinking device over a wired connection containing a plurality of wires. A voltage control circuit can be configured to drive a voltage over a wire of the plurality of wires. Processing circuitry can communicate, using the voltage control circuit, first power-sourcing capabilities to the external power-sinking device by setting the voltage over the wire to a value within the power-sourcing voltage range. The processing circuitry can also communicate, using the voltage control circuit, the additional power sourcing capabilities of the power-sourcing device using voltage variations on the wire, the voltage variations maintaining voltage on the wire within the power-sourcing voltage range.
    Type: Grant
    Filed: October 23, 2015
    Date of Patent: October 2, 2018
    Assignee: NXP B.V.
    Inventors: Kenneth Jaramillo, Madan Mohan Reddy Vemula, Sharad Murari, Abhijeet Chandrakant Kulkarni, Krishnan Tiruchi Natarajan
  • Patent number: 10038378
    Abstract: In a particular implementation, an apparatus to stabilize a supply voltage includes a first current source, a second current source, and a control circuit. The first current source is responsive to a detection signal and has an output coupled to a voltage regulator circuit via an output node. The second current source is also coupled to the output node. The control circuit includes an input responsive to the detection signal and an output coupled to the second current source. The control circuit is configured to enable the second current source based on a delayed version of the detection signal.
    Type: Grant
    Filed: September 21, 2016
    Date of Patent: July 31, 2018
    Assignee: QUALCOMM Incorporated
    Inventors: Burt Price, Dhaval Shah, Yeshwant Kolla
  • Patent number: 10037072
    Abstract: The present invention relates to a chip power supply method and a chip, where configuration memory array provides configuration voltage to an NMOS transmission gate, and an LDO circuit supplies power to the chip. The method includes: determining that a working state of the chip switches from a first state to a second state, where the first state and the second state are separately an initial mode, a program mode or a user mode; and adjusting, according to the working state of the chip, a configuration bit to adjust an output voltage of the LDO circuit. The present invention reduces power dissipation of the chip during memory configuration, and improves working performance thereof during the user mode.
    Type: Grant
    Filed: June 15, 2015
    Date of Patent: July 31, 2018
    Assignee: CAPITAL MICROELECTRONICS CO., LTD.
    Inventors: Xueping Zhou, Zixian Chen, Qinghua Xue
  • Patent number: 9977444
    Abstract: A power management system comprises an input power detector configured to generate a first enablement signal by detecting whether a first voltage is supplied; a first output stage connected to the input power detector and configured to receive and regulate the first voltage upon receiving the first enablement signal; an error operational amplifier is connected to the first output stage, a first input port of the error operational amplifier is configured to receive a first reference voltage, a second input port of the error operational amplifier is connected to a connection point of a first resistor and a second resistor, the first resistor is connected to the first output stage, the second resistor is connected to ground, and a system output port is located at the connection of the output port of the first output stage and the first resistor, to drive a load.
    Type: Grant
    Filed: February 20, 2017
    Date of Patent: May 22, 2018
    Assignee: BEKEN CORPORATION
    Inventors: Ronghui Kong, Jiazhou Liu
  • Patent number: 9964976
    Abstract: A voltage-regulator device includes an error-amplifier stage configured to receive a first reference voltage and a feedback voltage, an output amplifier stage coupled to the error-amplifier stage and configured to generate an output voltage related to the first reference voltage by an amplification factor, and a feedback stage configured to generate the feedback voltage. A compensation stage is configured to implement a second feedback loop, and cause, in response to a variation of the output voltage, a corresponding variation of a first biasing voltage for the output amplifier stage. The compensation stage includes a coupling-capacitor element coupled between the output amplifier stage and a first internal node, and a driving module coupled between the first internal node, and the output amplifier stage and configured to generate a compensation voltage for driving the output amplifier stage.
    Type: Grant
    Filed: May 16, 2017
    Date of Patent: May 8, 2018
    Assignee: STMICROELECTRONICS S.R.L.
    Inventors: Antonino Conte, Carmelo Paolino
  • Patent number: 9946281
    Abstract: A method achieves minimum limit cycle oscillation (LCO) amplitude of a digital low dropout regulator (D-LDO) by adding auxiliary unit power transistors in parallel with the main PMOS array with selected unit strength and LCO mode. An improved D-LDO with reduced LCO amplitude includes an auxiliary power transistor array in selected strength driven by an output of a comparator in parallel with a main power transistor array.
    Type: Grant
    Filed: February 8, 2017
    Date of Patent: April 17, 2018
    Assignee: University of Macau
    Inventors: Mo Huang, Yan Lu, Sai-Wang Sin, Seng-Pan U, Rui Paulo da Silva Martins
  • Patent number: 9921594
    Abstract: Systems, methods and apparatus for efficient control and biasing of pass devices that include at least one thin pass device and a remaining of thick pass devices. When operated at extreme high and low voltages, the at least one thin pass device maintains operation in its saturation region of operation while the remaining pass devices may be driven into their triode regions of operation. The thin and thick pass devices are arranged in a cascode configuration that includes a plurality of stacked devices. Biasing of the thin and thick cascode devices can be according to a voltage division scheme which protects the devices when the voltage across the stack is high, and provides a skewed voltage division across the stacked devices that promotes a higher gate-to-source voltage of the thick pass devices for a lower RON. In one exemplary case, gate length of the at least one thin pass device may be reduced to provide a lower gate-to-source voltage of the thin pass device during operation in the saturation region.
    Type: Grant
    Filed: April 13, 2017
    Date of Patent: March 20, 2018
    Assignee: pSemi Corporation
    Inventors: David Kovac, Joseph Golat
  • Patent number: 9892763
    Abstract: Disclosed are methods, circuits, apparatuses and systems for providing power to a dynamic load such as a non-volatile memory array. According to embodiments, a voltage source may be adapted to generate and output a supply current at substantially a target voltage through a regulating transistor whose channel is in series between an output terminal of said charge pump and an input terminal of said NVM array. A discharge circuit branch coupled to an output terminal of the regulating transistor may be adapted to drain away current from the regulating transistor output terminal when a voltage at the regulating transistor output terminal exceeds a first defined threshold voltage. A bulk regulating circuit branch coupled to a bulk of the regulating transistor may be adapted to reduce a bulk-voltage of the regulating transistor when a voltage at the regulating transistor output terminal exceeds a defined threshold voltage.
    Type: Grant
    Filed: November 2, 2015
    Date of Patent: February 13, 2018
    Assignee: Cypress Semiconductor Corporation
    Inventor: Alexander Kushnarenko
  • Patent number: 9871524
    Abstract: An integrated circuit embedded in a plug of a universal serial bus (USB) 3.1 type-C cable assembly is disclosed. The integrated circuit includes a first pin connected to an operation transmission line through which an operation voltage is transmitted, a second pin connected to a configuration channel (CC) line, a first resistor connected to the first pin, a ground line, and a switching circuit configured to connect the first resistor and the ground line using a channel voltage supplied to the second pin when the operation voltage is not applied, and disconnect the first resistor from the ground line based on the operation voltage.
    Type: Grant
    Filed: March 23, 2016
    Date of Patent: January 16, 2018
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Je Kook Kim, Jin Hyuck Yu, You So Cheon
  • Patent number: 9867242
    Abstract: Tuning a bias voltage supplied to a series of one or more LEDs in a constant current LED pulsing drive circuit may comprise the steps of: (A) setting the bias voltage to a test value, the test value being at least equal to the sum of the bias voltage second component and the maximum forward voltage rating of each of the one or more LEDs; (B) measuring an intermediate voltage present between the series of one or more LEDs and the constant current source when the LEDs are turned on; (C) determining if the intermediate voltage exceeds the second component of the bias voltage; and (D) upon determining the intermediate voltage exceeds the second component of the bias voltage, reducing the bias voltage applied to the one or more LEDs by an amount necessary to cause the intermediate voltage to equal the second component of the bias voltage.
    Type: Grant
    Filed: December 12, 2016
    Date of Patent: January 9, 2018
    Assignee: Datalogic USA, Inc.
    Inventors: WenLiang Gao, Pat O'Donnell