Abstract: Described embodiments include a circuit for voltage regulator startup. The circuit includes a voltage regulation circuit having first and second regulator inputs and a regulator output. A startup circuit has a startup input coupled to the first regulator input, and a startup output. A reference generation circuit has first and second reference inputs and first and second reference outputs. The first reference input is coupled to the regulator output. The second reference input is coupled to the startup output, and the first reference output is coupled to a reference output terminal and to the second regulator input. A reference detection circuit has a first detection input coupled to the regulator output, and a second detection input coupled to the second reference output, and provides a reference ready signal responsive to a reference voltage being within a reference specification.

Abstract: Disclosed is a low dropout linear voltage regulator and a control circuit thereof. The control circuit comprises an error amplifier, a foldback current-limiting protection circuit, an undershoot suppression circuit and an output detection circuit. The foldback current-limiting protection circuit limits the output current of power transistor and performs short circuit protection, the undershoot suppression circuit pulls the control terminal of the power transistor to low voltage level when the output voltage undershoots.

Abstract: A linear voltage regulator includes a transistor, an error amplifier, a feedback circuit and a compensation circuit. The transistor has a first terminal for receiving an input voltage, a second terminal for providing an output voltage, and a control terminal. The error amplifier has a first input terminal, a second input terminal and an output terminal, wherein the first input terminal receives a reference voltage, and the output terminal is coupled to the control terminal of the transistor. The feedback circuit receives the output voltage and generates a feedback voltage lower than the output voltage. The compensation circuit is configured to receive the feedback voltage and generate a compensation voltage at the second input terminal of the error amplifier. The compensation circuit includes a compensation capacitor for introducing a zero point into an open-loop transfer function of the linear voltage regulator to improve system stability.

Abstract: Provided are a device to-be-charged and a charging control method. The device to-be-charged can include a wireless receiving circuit, a charging management circuit, and a step-down circuit. The wireless receiving circuit can be configured to receive a wireless charging signal to charge a battery. The charging management circuit can be configured to perform constant voltage control and/or constant current control on charging of the battery. The step-down circuit is configured to decrease an output voltage of the wireless receiving circuit or an output voltage of the charging management circuit.

Abstract: An electronic device comprises a regulator, and an oscillator and a resistor coupled to the regulator. The electronic device further comprises a feedback controller that includes a differential amplifier coupled between the oscillator, the resistor, and the regulator. The feedback controller is configured to apply a control voltage to the regulator in response to a resistor voltage upon the resistor and an oscillator voltage upon the oscillator. The feedback controller can be coupled to control a substantially equal voltage upon the resistor and the oscillator.

Abstract: A power management integrated circuit (PMIC) includes; a DC-DC converter configured to provide output power to a load, a controller configured to control switching of the DC-DC converter, and a sense circuit including a capacitive element and configured to detect an output current flowing through a node between the DC-DC converter and the load.

Abstract: A system includes a battery. The system also includes a low dropout regulator (LDO) circuit with an input coupled to the battery and the LDO circuit. The system also includes a load coupled to an output of the LDO circuit. The LDO circuit includes an error amplifier and a control circuit coupled to the error amplifier. The LDO circuit also includes a first pass transistor coupled to the control circuit and configured to provide a first pass current as a function of load current according to a first continuous conduction curve. The LDO circuit also includes a second pass transistor coupled to the control circuit and configured to provide a second pass current as a function of load current according to a second continuous conduction curve.

Abstract: An LDO regulator includes an error amplifier, a power transistor, a monitoring circuit and/or an adaptive pole adjusting circuit (APAC). The error amplifier compares a reference voltage and a feedback voltage to generate a first error voltage based on the comparison. The power transistor including a gate coupled to an output terminal of the buffer, regulates an input voltage based on a second error voltage which is generated based on the first error voltage to provide an output voltage to an output node. The monitoring circuit, connected to the output terminal of the buffer in parallel with the power transistor, generates a control voltage associated with a load current. The APAC, connected between the output terminal of the error amplifier and the ground voltage, selectively connects an adjusting capacitor between the output terminal of the error amplifier and the ground voltage in response to the control voltage.

Abstract: An overheat protection circuit includes a first constant current source which supplies a first constant current to a temperature sensitive element, a first transistor provided between the temperature sensitive element and the first constant current source, an output current detection circuit which controls a gate voltage of the first transistor by a voltage based on a sense current corresponding to an output current of a semiconductor device, and an output circuit which supplies an overheat detection signal based on a result of comparison between a temperature sensitive current and the first constant current.

Abstract: A low dropout regulator is disclosed. The low dropout regulator includes an amplifier, a first transistor, a second transistor and a switch. When a supply voltage value of the low dropout regulator is less than a supply voltage threshold value, a first path of the switch is selected and a first switch voltage value is transmitted to the first transistor so as to fully conduct the first transistor, and an output voltage value of the low dropout regulator is equal to the supply voltage value. When the supply voltage value is not less than the supply voltage threshold value, a second path of the switch is selected and a second switch voltage value is transmitted to the first transistor so as to turn off the first transistor, and the output voltage value is adjusted by the second transistor and the amplifier.

Abstract: A linear power supply circuit, includes: output transistor between input terminal where input voltage is applied and output terminal where output voltage is applied; a driver driving the output transistor based on difference between voltage based on the output voltage and reference voltage; and phase compensation circuit, wherein the driver includes differential amplifier outputting voltage corresponding to the difference between the voltage based on the output voltage and the reference voltage, a first capacitance having one end where output of the differential amplifier is applied and the other end where ground potential is applied, a converter converting the voltage based on the output of the differential amplifier into current, and a current amplifier amplifying the current output from the converter, and wherein the phase compensation circuit lowers gain of transfer function of the linear power supply circuit and output capacitor connected to the output terminal.

Abstract: A technique to provide power management for multiple dice. The technique provides for determining for each respective die of the multiple dice, power consumption for operating each respective die; and generating a respective signal from each respective die that corresponds to the power consumption of each respective die. The technique further provides, for each respective signal, driving a respective open-drain transistor to conduct, in which an output of each open-drain transistor connects to the common node and the common node connects to a reference voltage, to change a voltage of a common node corresponding to the respective signal; and utilizing the voltage of the common node to indicate total power consumption of the dice.

Abstract: A circuit having a DC-to-DC converter and an input circuit connected on the line side of the DC-to-DC converter, having a first terminal and a second terminal for connection to a power supply and a third terminal and a fourth terminal for connection to the DC-to-DC converter. Between the first and third terminals, the input circle has a semiconductor element, wherein a first component terminal of the semiconductor element is connected via at least a first capacitor and a second capacitor to a second component terminal of the semiconductor element, wherein a resistance of the semiconductor element is controllable by a voltage between the first component terminal and the second component terminal.

Abstract: The present invention relates to a half-bridge signal processing circuit comprising a first and a second branch. The first branch comprises a first stimulus responsive sense element and a first current source arranged to provide a current to the first sense element. The second branch comprises a second stimulus responsive sense element and a second current source arranged to provide a current to said second sense element. The first and the second branch have a terminal in common. The first branch comprises a first node between said the current source and the first stimulus responsive sense element configured to generate a first signal related to a voltage over the first sense element. The second branch comprises a second node between the second current source and the second stimulus responsive sense element configured to generate a second signal related to a voltage over the second sense element.

Abstract: Disclosed are an overcurrent protection driving circuit and a display apparatus. The overcurrent protection driving circuit includes a power supply circuit, a current feedback circuit, a current detection circuit, a level output circuit and a switching circuit, the power supply circuit outputs a direct current voltage to a display panel via the switching circuit, the current feedback circuit converts a voltage signal transmitted by the power supply circuit to the display panel to a current signal and feeds the current signal back to the current detection circuit, and when a current value corresponding to the current signal is smaller than an overcurrent protection current threshold value, the current detection circuit outputs a first level signal to control the switching-off of the switching circuit to cut off the supply of power from the power supply circuit to the display panel.

Abstract: A PMOS-output LDO with full spectrum PSR is disclosed. In one implementation, a LDO includes a pass transistor (MO) having a source coupled to an input voltage (Vin); a noise cancelling transistor (MD) having a source coupled to the Vin, a gate coupled to a drain and a gate of the pass transistor; a source follower transistor (MSF) having a source coupled to a drain of the pass transistor, a drain coupled to the drain and gate of the noise cancelling transistor; a current sink coupled between the drain of the source follower transistor and ground; and an error amplifier having an output to drive the gate of the source follower transistor.

Abstract: A fast response amplifier circuit includes a pre-stage circuit and an output stage circuit. The pre-stage circuit generates a control signal according to a difference between a first input signal and a second input signal. The output stage circuit generates an output signal at an output node according to the control signal. The output stage circuit includes: a power transistor controlled by a driving signal to generate the output signal; a voltage positioning transistor operates according to the output signal to steer a first portion and a second portion of a bias current; an overshoot detecting circuit detecting an overshoot of the output signal to generate an overshoot indicating signal; and a first overshoot suppressor which generates a first overshoot suppressing signal according to the overshoot indicating signal to adjust a conduction resistance of the power transistor to suppress an overshoot of the output signal.

Abstract: A voltage regulator includes a voltage regulation unit that regulates an external power supply voltage and outputs an internal voltage, and an optimization control unit that adjusts a bias current, drivability, and output capacitance of the voltage regulation unit in response to a training enable signal and optimizes the internal voltage to a predetermined value.

Abstract: A power control device includes: an output voltage controller configured to control an output voltage based on a feedback voltage corresponding to the output voltage; and an overvoltage protector configured to continue or stop the operation of the output voltage controller based on a first detection result of whether the output voltage has exceeded an output voltage threshold value and a second detection result of whether the feedback voltage has fallen to or below a feedback voltage threshold value.

Abstract: A system includes a low dropout regulator (LDO) circuit. The LDO circuit includes an error amplifier with an input node, a reference node, and an output node. The LDO circuit also includes a pass transistor with a control terminal, a first current terminal, and a second current terminal. The control terminal is coupled to the output node of the error amplifier, the first current terminal is coupled to a voltage source node, and the second current terminal is coupled to an LDO output node. The LDO output node is coupled to the input node of the error amplifier. The LDO circuit also includes a switched-capacitor network coupled between error amplifier and the pass transistor. The switched-capacitor network comprises a pair of switches and a current-controlled oscillator coupled to control terminals of the switches.

Abstract: An ultra-low power consumption power supply structure, comprising: a first LDO circuit, a second LDO circuit, a first Bandgap module, a second Bandgap module and a switching circuit, wherein the first LDO circuit is used for providing an LDO output voltage when an SOC chip is in a normal operating mode, and the second LDO circuit is used for providing an LDO output voltage when the SOC chip is in an ultra-low power consumption mode; the first Bandgap module is used for providing, based on a main power supply voltage, a first reference voltage for the first LDO circuit at the time of power-on startup, and the second Bandgap module is used for providing a second reference voltage for the second LDO circuit after power-on startup is completed; and the switching circuit is used for switching the mode in which the first reference voltage is output by the first Bandgap module at the time of power-on startup to the mode in which the second reference voltage is output by the second Bandgap module after power-on start

Abstract: Techniques that can prevent the low dropout (LDO) output voltage degradation that occurs with conventional LDO regulators, even with large LDO supply variations. An LDO regulator circuit can include another loop that is much slower than the main LDO regulator loop, concentrates the load regulation, and fixes the voltage regulation runaway problem due to the large supply variation with large frequency content. The LDO regulator circuit can include a negative feedback correction loop that corrects the LDO output by, in some examples, adding sink current to the main voltage regulation loop via a programmable current sink element.

Abstract: An electronic device includes a switched-mode power supply having a first operating phase during which the output node of the switched-mode power supply is coupled by an on switch to a source of a first reference voltage. The first operating phase is followed by a second operation phase during which the output node of the switched-mode power supply is in a high impedance state. While in the second operating phase, a capacitor connected to the output node of the switched-mode power supply at least partially discharges into a load.

Abstract: A voltage regulator includes two input pairs of opposite type transistors, p-type and n-type, to provide a soft-start functionality for gradually increasing the voltage regulator's output voltage from zero, or a voltage below the thresholds of the n-type transistors, to an operational voltage. The voltage regulator operates in a soft-start mode during which a variable input voltage signal is ramped up to allow the output voltage to reach the operational voltage, and a normal-operation mode during which the operational voltage is maintained.

Abstract: Systems, apparatuses, and methods for performing efficient data transfer in a computing system are disclosed. A computing system includes multiple transmitters sending singled-ended data signals to multiple receivers. A termination voltage is generated and sent to the multiple receivers. The termination voltage is coupled to each of signal termination circuitry and signal sampling circuitry within each of the multiple receivers. Any change in the termination voltage affects the termination circuitry and affects comparisons performed by the sampling circuitry. Received signals are reconstructed at the receivers using the received signals, the signal termination circuitry and the signal sampling circuitry.

Abstract: A band-gap reference circuit including a low drop-out (LDO) regulator and a reference circuit is disclosed. The LDO regulator outputs a regulating voltage which is provided to the reference circuit, and wherein the regulating voltage is maintained constant and powers the reference circuit such that the reference circuit outputs a band-gap reference voltage. According to the reference circuitry, the LDO regulator can output a stable voltage such that the regulating voltage can be maintained constant, therefore, causing the band-gap reference voltage output from the reference circuit to be maintained constant, hence improving the reliability of the band-gap reference voltage.

Abstract: An operational amplifier including an input stage coupled to an input terminal, an output stage coupled to an output terminal, and a gain node between the input stage and the output stage. A bias current source is couplable to the input stage to supply a bias current thereto and a current mirror circuit mirrors the bias current toward the gain node and the output stage. A switch circuit includes a switch activatable to bring the gain node to a pre-bias voltage and a switch coupled to the output stage and switchable between a first state and a second state in which the output stage is active and non-active, respectively—. A further switch circuit is coupled to the output terminal and switchable between a first state and a second state in which the output stage is coupled to the output terminal and to a reference level, respectively.

Abstract: A power control device includes: an output voltage controller configured to control an output voltage based on a feedback voltage corresponding to the output voltage; and an overvoltage protector configured to continue or stop the operation of the output voltage controller based on a first detection result of whether the output voltage has exceeded an output voltage threshold value and a second detection result of whether the feedback voltage has fallen to or below a feedback voltage threshold value.

Abstract: A GaN resonant circuit is disclosed. The GaN resonant circuit includes a power switch configured to be selectively conductive according to one or more gate signals, and configured to generate a switch signal indicative of the value of the current flowing therethrough. The GaN resonant circuit also includes a power switch driver, configured to generate the gate signals in response to one or more control signals, where the power switch driver is configured to cause the power switch to become nonconductive in response to the switch signal indicating that the value of the current flowing through the power switch has transitioned across a threshold value.

Abstract: The present disclosure relates to a direct current (DC)-DC converter associated with a radio frequency transceiver, which includes a transceiver capacitor. The disclosed DC-DC converter includes a battery terminal configured to provide a battery voltage, a charge pump coupled to the battery terminal and configured to provide a boosted voltage based on the battery voltage, a power inductor is coupled between the charge pump and the transceiver capacitor, and fast voltage charging circuitry with a fast-path block that is coupled between the charge pump and the transceiver capacitor. Herein, the transceiver capacitor is capable to be charged with the boosted voltage through the power inductor. The fast-path block is parallel with the power inductor and configured to provide an extra charging path to the transceiver capacitor, so as to accelerate a charging speed of the transceiver capacitor.

Abstract: A noise cancellation system comprises a first noise cancellation apparatus configured to process an I-channel signal, wherein an I-channel differential mode second-order intermodulation component and an I-channel common mode second-order intermodulation component cancel each other in the first noise cancellation apparatus and a second noise cancellation apparatus configured to process a Q-channel signal, wherein a Q-channel differential mode second-order intermodulation component and a Q-channel common mode second-order intermodulation component cancel each other in the second noise cancellation apparatus.

Abstract: The system described herein relates to a high-voltage supply unit for providing an output voltage for a particle beam apparatus, wherein the particle beam apparatus is embodied as, for example, an electron beam apparatus and/or an ion beam apparatus. The system described herein is based on the fact that it was recognized that a bipolar voltage supply unit can be formed by means of a unipolar first current source and a unipolar second current source, said bipolar voltage supply unit enabling a load current in two directions. The high-voltage supply unit according to the system described herein can be operated in the 4-quadrant operation. In the 4-quadrant operation, a first voltage source for supplying the first current source and a second voltage source for supplying the second current source are embodied as different voltage sources.

Abstract: A dynamic current sink includes the following elements. A voltage comparator compares a reference voltage with a second control signal from an LDO (Low Dropout Linear Regulator) to generate a first control signal. A first transistor selectively pulls down a voltage at a first node according to the first control signal. The inverter is coupled between the first node and a second node. An NAND gate has a first input terminal coupled to a second transistor and a third node, a second input terminal coupled to the second node, and an output terminal coupled to a fourth node. A capacitor is coupled between the fourth node and a fifth node. A resistor is coupled between the fifth node and a ground voltage. A third transistor has a control terminal coupled to the fifth node, and selectively draws a discharge current from an output node of the LDO.

Abstract: According to one embodiment, a charge pump is configured to generate a negative potential at an output node. A first transistor and a first resistor are coupled in series in order between a first node and a second node. A second resistor is coupled between the second node and the output node. A second transistor and a third resistor are coupled in series in order between the first node and a third node. A fourth resistor is coupled between the third node and the output node. A third transistor is coupled between a fourth node and the output node, and coupled to the second node and the third node at a gate.

Abstract: A voltage generator of a nonvolatile memory device includes a charging circuit, a current mirror circuit, a discharging circuit and an output circuit. The charging circuit amplifies a difference between a reference voltage and a feedback voltage to generate a first current. The current mirror circuit is connected to the charging circuit and generates a second current based on the first current. The discharging circuit is connected to the current mirror circuit to draw the second current, and discharges the output voltage to a target level by adjusting discharging amount of the second current based on a sensing voltage which reflects a change of the feedback voltage. The output circuit is connected to the current mirror circuit, and provides the output voltage based on the first current and the second current to a first word-line connected to an output node.

Abstract: A current sensing circuit is described. The current sensing circuit is for sensing a high side current through a high side switch and/or for sensing a low side current through a low side switch of a half bridge comprising the high side switch and the low side switch, which are arranged in series between a high side potential and a low side potential. The high side switch and the low side switch are in respective on-phases in a mutually exclusive manner. The high side sensing circuit comprises mirroring circuitry to mirror a current from a first node of the high side sensing circuit to an output node of the high side sensing circuit. The current sensing circuit comprises a low side sensing circuit to provide a sensed low side current which is indicative of the low side current during an on-phase of the low side switch.

Abstract: The techniques described herein reduce a rate at which a mobile device consumes energy when receiving, processing and storing data events (e.g., emails, instant messages, social networking messages and notifications, etc.). In various embodiments, the techniques may be implemented in accordance with a connected standby mode of operation for the mobile device. Therefore, the techniques may decouple data reception from data processing when exchanging data events in the connected standby mode. In various embodiments, the techniques may store persistent memory operations for multiple data events in a temporary cache and process the stored persistent memory operations as a batch (e.g., perform the persistent memory operations together). In various embodiments, the techniques may partition data storage space allocated for data communications applications on the mobile device.

Abstract: Provided is a vehicle control device comprising a plurality of constant voltage generation circuits, wherein a specified voltage is supplied to a load even if any one of the constant voltage generation circuits outputs a voltage that exceeds the specified voltage. This vehicle control device is provided with a first and second constant voltage generation circuit that each output a voltage to a load, and when either the first or second constant voltage generation circuit outputs a voltage that exceeds a reference voltage, cuts off the output of that constant voltage generation circuit from the load.

Abstract: A voltage regulation system includes an error amplifier configured to generate an error amplifier output based on a reference voltage, input voltage, first feedback voltage, and second feedback voltage. The feedback voltages are based on a first output voltage at the system's output node. The system further includes a capacitor configured to provide the first feedback voltage to the error amplifier. The system further includes a voltage-controlled current source configured to generate a current based on the first output voltage. The second feedback voltage is based on the current. The system further includes a transistor configured to provide a second output voltage at the output node based on the error amplifier output. The transistor is connected to the output node and the capacitor. Such a voltage regulation system may allow a high power supply rejection response over a wide range of frequencies and loads while maintaining stability and phase margin.

Abstract: A regulator circuit includes: a voltage detection circuit that detects a magnitude of an output voltage of an output node, and outputs a feedback voltage that indicates a result of the detection; an error amplifier circuit that compares the feedback voltage with a reference voltage, and outputs a voltage that indicates a result of the comparison; an output circuit that supplies an output current to the output node according to the voltage output by the error amplifier circuit; a current detection circuit that detects a magnitude of the output current; and a current bias circuit that supplies an output bias current to the output node, and increases or decreases the output bias current based on a result of the detection of the current detection circuit.

Abstract: A circuit protective system. The system has: (i) an input for sensing an operational voltage responsive to a current flowing through a transistor; (ii) circuitry for applying a forced voltage at the input; (iii) voltage-to-current conversion circuitry for outputting a reference current in response to the forced voltage at the input; (iv) circuitry for providing a reference trim current in response to a trim indicator; and (v) comparison circuitry for outputting a limit signal in response to a comparison of the reference current and the reference trim current.

Abstract: A voltage regulator includes two input pairs of opposite type transistors, p-type and n-type, to provide a soft-start functionality for gradually increasing the voltage regulator's output voltage from zero, or a voltage below the thresholds of the n-type transistors, to an operational voltage. The voltage regulator operates in a soft-start mode during which a variable input voltage signal is ramped up to allow the output voltage to reach the operational voltage, and a normal-operation mode during which the operational voltage is maintained.

Abstract: An example embodiment is directed to a voltage regulation circuit. The voltage regulation circuit comprises a first control loop and a second control loop that are separately activatable. The first control loop regulates an output current provided to an output terminal, and the second control loop regulates an output voltage provided to the output terminal. The voltage regulation circuit further includes a mode switching circuit that switches operation between the first and the second control loops by separately activating one of the first and second control loops and deactivating the other in response to a fault condition at the output terminal at which a regulated load is connectable.

Abstract: A ruggedized electronic device includes a case and an enclosure within the case. The case provides a first level of explosive atmosphere protection to components within the case. The enclosure provides a second level of explosive atmosphere protection to the components within the enclosure. The second level is higher than the first level. The enclosure includes a main board within the enclosure, and a switch. The main board includes a connection from within the enclosure to the case. The switch provides the connection to the case in a first switched mode and isolates the connection from the case in a second switched mode.

Abstract: An integrated circuit is disclosed for current-controlled voltage regulation. In an example aspect, the integrated circuit includes a voltage regulator and a current-controlled clamp. The voltage regulator has a regulator output node and produces a regulator current. The voltage regulator includes an error amplifier and an output transistor. The error amplifier has first and second input nodes and an error amplifier output node, with the first input node coupled to a reference voltage. The error amplifier generates an error amplifier output voltage at the output node. The output transistor is coupled between the error amplifier output node and the regulator output node. The output transistor is coupled to the second input node via the regulator output node to establish a feedback path for the voltage regulator. The current-controlled clamp is coupled to the error amplifier output node and clamps the error amplifier output voltage based on the regulator current.

Abstract: A power control device includes: an output voltage controller to control the output voltage of a power supply circuit based on a feedback voltage obtained by dividing the output voltage with voltage dividing resistors; and an overvoltage protection circuit to protect against an overvoltage in the output voltage. The overvoltage protection circuit includes: an output voltage detector to detect whether the output voltage has risen above an output voltage threshold value; and a feedback voltage detector to detect whether the feedback voltage has fallen to or below a feedback voltage threshold value. The overvoltage protection circuit continues or stops operation of the output voltage controller based on a first detection output from the output voltage detector and a second detection output from the feedback voltage detector.

Abstract: A regulator circuit includes an OP-amp, buffer, power transistor, voltage divider, load, and feedback current generator. The OP-amp generates a first voltage signal by amplifying a difference between input and feedback voltage signals, and drives a first node as the first voltage signal. The buffer drives a second node as a second voltage signal based on the first voltage signal. The power transistor includes drain, gate and source terminals respectively connected to a supply voltage, the second node, and a third node. The voltage divider generates the feedback voltage signal by dividing an output voltage signal of the third node. The load includes a terminal connected to the third node and another terminal receiving a ground voltage. The feedback current generator provides a first feedback current corresponding to a ripple of the output voltage signal to the first node for enhancing a speed at which the ripple reduced.

Abstract: A voltage regulator apparatus with a rejection capability for high frequency power noise includes a low dropout linear regulator and a noise rejection circuit. The low dropout linear regulator has at least one operational amplifier which is powered by a power source, and the low dropout linear regulator is configured for receiving and regulating an input voltage signal to provide an output voltage signal for a load. The noise rejection circuit is coupled between the power source and the low dropout linear regulator, and is configured for providing a power noise rejection capability upon a high frequency part of a power signal of the power source to generate the power signal with less high frequency noise to the at least one operational amplifier.

Abstract: An operating system including a voltage converter, a processing circuit, and a protector is provided. The voltage converter converts an input voltage according to a feedback voltage to generate an output voltage. The processing circuit is coupled to the voltage converter and processes the output voltage according to a control signal to generate the feedback voltage. The protector is coupled to the voltage converter and the processing circuit and activates or deactivates the voltage converter according to the feedback voltage.

Abstract: A voltage regulation system, particularly for a motor vehicle, adapted to be connected to a voltage source in order to provide a regulated voltage Vdd to at least one functional component F, the regulation system including a pre-regulator adapted to be connected to a voltage source and a regulator REG including at least one pre-regulation port PPR adapted to be connected to the pre-regulator and one functional port Pdd adapted to be connected to a functional component, the regulator including an adaptation device Q directly connecting the pre-regulation port to the functional port of the regulator, the adaptation device consisting of a single MOS power transistor including a drain D, a source S and a gate G. The MOS transistor includes an intrinsic diode DIODE between its drain and its source which is oriented to block the flow of a current between the functional port and the pre-regulation port.