Abstract: A voltage regulator can include an input device, a current mirror, one or more offset control circuits, an output device, and a positive feedback loop. The input device can be configured to receive a source voltage from a voltage source. The current mirror can be coupled to the input device and configured to provide load current regulation within the voltage regulator. The one or more offset control circuits can be configured to balance voltage levels within the voltage regulator. The output device can include at least a first transistor that is matched to a second transistor within the voltage regulator such that the matching is configured to provide supply regulation within the voltage regulator. The positive feedback loop can be formed at least in part by the current mirror, the first transistor and the second transistor.

Abstract: A power circuit includes at least one power detector coupled to both a first power voltage input via a pin or pad and a second power voltage supplied into a component, and configured to output a sensed power voltage changed from the first power voltage in response to a drop of the second power voltage, and a comparator configured to compare the sensed power voltage with a reference voltage to output a power sensing result.

Abstract: An amplifier circuit includes an amplifier and an output transistor. The amplifier is coupled to an output node of the output transistor for providing an output voltage to a load device. The amplifier circuit also includes a slew-rate control circuit coupled to a gate node of the output transistor and configured to control voltage rise of the gate node of the output transistor during power-up to reduce output voltage overshoot.

Abstract: Disclosed is a power supply that automatically switches between a voltage regulation mode and an over current protection mode, as needed. The power supply includes a voltage regulator that generates a first control voltage for applying to the control terminal of a pass transistor during a voltage regulation mode to maintain an output voltage at a desired voltage level. The power supply includes a current limiter that generates a second control voltage for applying to the control terminal of the pass transistor during an over current protection mode to prevent an output current from rising above a maximum output current limit. The power supply includes additional circuitry that detects when over current protection is required and automatically switches the control voltage applied to the control terminal from the first control voltage to the second control voltage or vice versa, as necessary. Also disclosed is an associated power supply method.

Abstract: A charging circuit applied to a first electronic device includes a charging interface, a charging module coupled therewith and configured to detect a connection between the charging interface and a second electronic device, and adjust a current output to the second electronic device, a reverse charging protocol module, and a control module. The reverse charging protocol module is configured to determine a reverse charging protocol matched with the charging current of the second electronic device. The control module is coupled with the charging module and the reverse charging protocol module, and configured to acquire the reverse charging protocol determined by the reverse charging protocol module in response to the connection between the charging interface and the second electronic device, and control the charging module to adjust the current output to the second electronic device based on the reverse charging protocol. The charging circuit can increase the reverse charging current.

Abstract: A linear power supply circuit according to the present invention is provided with: an output transistor provided between an input end to which an input voltage is applied and an output end to which an output voltage is applied; a driver for driving the output transistor; and a feedback unit for feeding, back to the driver, information about an output electrical current that is output from the output end. The driver drives the output transistor on the basis of the difference between a voltage based on the output voltage and a reference voltage, as well as the information.

Abstract: According to one embodiment, a semiconductor device includes a first terminal, a second terminal, and a first circuit. The first circuit includes a first switch element having a first end coupled to a first node to which a first voltage is supplied, a second end coupled to the first terminal, and a gate coupled between the first node and the second terminal, and a second switch element coupled between the first node and the first terminal. The first circuit is configured to switch the first switch element from OFF state to ON state when supply of the first voltage is interrupted, and switch the second switch element from OFF state to ON state while maintaining the first switch element in ON state when a voltage of the first terminal changes to a second voltage.

Abstract: An analog-to-digital conversion system includes an analog-to-digital converter and a power supply. The analog-to-digital converter is configured to convert an analog input signal to generate a digital output signal, and configured to generate a control signal according to a state of converting the analog input signal. The power supply is configured to provide a supply voltage to the analog-to-digital converter, and change the ability to provide the supply current of the power supply according to the control signal to stabilize the supply voltage.

Abstract: Various methods and circuital arrangements for leakage reduction in MOS devices are presented. A pull-up circuit is selectively coupled to a gate of the MOS device to provide control of a voltage to the gate that is larger than a source voltage. Voltage switching circuits selectively couple different voltages to the body and/or back-gate terminals of the MOS device. During a standby mode of operation, the leakage current of the MOS device is decreased by driving the MOS device further into its subthreshold leakage region. During the standby mode, a threshold voltage of the MOS device is increased by coupling a voltage higher than the source voltage to the body and/or back-gate terminals. The MOS device can be a pass device used in low dropout regulator (LDO). During the standby mode, the LDO maintains output regulation by driving the MOS device further into its subthreshold leakage region and/or increasing the threshold voltage.

Abstract: A low dropout voltage regulator that in one configuration provides a drive signal to regulate an output voltage in response thereto includes an error amplifier, an intermediate amplifier, a buffer amplifier, and a compensation network. The error amplifier has a first input for receiving a reference voltage, a second input for receiving a feedback signal representative of the output voltage, a first output, and a second output. The intermediate amplifier has a first input coupled to the first output of said error amplifier, a second input coupled to the second output of the error amplifier, and an output. The buffer amplifier has a first input coupled to the output of the intermediate amplifier, and an output for providing the drive signal. The compensation network has a first terminal coupled to the first input of the intermediate amplifier, and a second terminal coupled to the output of the intermediate amplifier.

Abstract: A power supply circuit in which an increase in a leakage current can be suppressed is provided. In a power supply circuit in which a main LDO unit outputs a first internal voltage during a normal operation and a sub LDO unit outputs a sleep voltage during a sleep operation, the sleep voltage is applied to a drain of a transistor, and an external voltage higher than the sleep voltage is applied to a gate and a back gate thereof.

Abstract: Provided is a drive module. A main control unit in the drive module is configured to determine, according to the output voltage of the electrical energy storage unit, an optimal analog reference voltage output efficiency value of a power supply chip, determine, according to the output voltage of the electrical energy storage unit and the optimal analog reference voltage output efficiency value of the power supply chip, a voltage value of an analog reference voltage, and generate, according to the voltage value of the analog reference voltage, a control instruction corresponding to pulse signal information. A pulse signal generation unit is configured to generate a corresponding pulse signal according to the control instruction. An analog reference voltage unit in the power supply chip is configured to receive an electrical signal output by the electrical energy storage unit, and generate, according to the pulse signal, a corresponding analog reference voltage signal.

Abstract: A triggered sink circuit for a linear voltage regulator, such as low-dropout voltage regulator (LDO), is disclosed. The triggered sink circuit is activated only when needed to sink current from an output in response to a transient load change. The triggered sink circuit includes a large sink transistor that when activated drains current from the output of the LDO to quickly restore an output voltage back towards a regulated value, thereby improving a load transient response to the load change. The improved load transient response prevents the output transistor of the LDO from being completely deactivated to restore regulation. Accordingly, the LDO's response to a subsequent load transient can be improved.

Abstract: A current sensing circuit for sensing a current flowing through a current sense resistor, wherein the current sense resistor is configured to receive a variable power input voltage. The current sensing circuit includes: a current sense amplifier having a first input terminal configured to be coupled to a first terminal of the current sense resistor to receive the power input voltage, a second input terminal configured to be coupled to a second terminal of the current sense resistor, and an output terminal for providing a current sensing signal indicative of the current flowing through the current sense resistor; and a calibration circuit configured to be coupled to the first input terminal of the current sense amplifier. The calibration circuit is configured to convert the power input voltage into a calibration current, and provide the calibration current to the current sense amplifier, so as to reduce a change in the current sensing signal caused by a change in the power input voltage.

Abstract: A linear regulator circuit having fast transient response includes an error amplifier (EA) circuit and an output stage circuit. The EA circuit amplifies a difference between a feedback signal and a reference signal to generate an error amplified signal. The output stage circuit includes at least one output power switch which is controlled by the error amplified signal to generate an output signal at an output node. The EA circuit includes at least one pre-stage amplifier circuit which includes a current source circuit, a differential input circuit, a first, a second and a third current mirror circuits and at least one feedback capacitor. One differential transistor of the differential input circuit, the first and the second current mirror circuit form a positive potential feedback (PPFB) loop. The feedback capacitor is coupled between the output node and at least one inverting node at the PPFB loop.

Abstract: A linear power supply circuit is provided with: an output transistor; and a driver for driving the output transistor on the basis of the difference between a voltage based on an output voltage and a reference voltage. The driver is provided with: a differential amplifier for outputting a voltage according to the difference between the voltage based on the output voltage and the reference voltage; a capacitor one end of which has an output of the differential amplifier applied thereto and the other end of which has the voltage based on the output voltage applied thereto; a converter for converting a voltage based on the output of the differential amplifier into an electrical current and outputting the electrical current; and a current amplifier for amplifying the electrical current of the output of the converter. The supply voltage of the differential amplifier is a first constant voltage or the input voltage.

Abstract: A power supply control apparatus includes a voltage control transistor connected between a DC voltage input terminal and an output terminal; a control circuit controlling the voltage control transistor according to an output feedback voltage; and a first external terminal receiving an output control signal to control an output voltage. The control circuit includes a first error amplifier outputting a voltage according to an electric potential difference between a voltage divided by a first voltage dividing circuit which divides the output voltage of the output terminal and a predetermined reference voltage; and an output changing circuit including a second error amplifier receiving a voltage input in the first external terminal, a transistor having a control terminal receiving the output of the second error amplifier, and a current mirror circuit connected to the voltage input terminal which transfers an electric current flowing in the transistor.

Abstract: An example apparatus includes power amplification circuitry and current-level switch circuitry. The power amplification circuitry has a first input port, a second input port, and field-effect transistor (FET) circuitry, the FET circuitry to operate in a saturation mode while drawing power provided at the first input port from a first power source. The current-level switch circuitry is to sense a change in a current-level used to maintain the FET circuitry in the saturation mode and, in response to the sensed change in the current-level, to cause the power amplification circuitry to draw power provided at the second input port from a second power source while maintaining the saturation mode of the FET circuitry.

Abstract: An active gain control circuit includes a voltage divider having a variable resistance configured to attenuate a rectified input line voltage to produce a reference signal, a filter circuit configured to extract a DC-level reference voltage from the reference signal, and an operational amplifier configured to receive the DC-level reference voltage and a comparison voltage, and to generate a gate control signal based on a difference between the comparison voltage and the DC-level reference voltage, wherein a resistance of the voltage divider is controlled by the gate control signal.

Abstract: A low-dropout voltage system comprising a current supply with a transistor circuitry, a mode switch capacitor, and a decoupling capacitor, wherein the mode switch capacitor facilitates the low-drop voltage system to swiftly transition from a low mode with a minimal to no transient current output to a high mode with a transient current of about 6 mA by dynamically biasing the transistor circuitry while limiting a voltage or current draw from an external power source.

Abstract: A termination voltage regulation apparatus with transient response enhancement includes a termination voltage regulator and a transient response enhancer. The termination voltage regulator provides a termination voltage at a termination voltage terminal, including first and second switching units. The transient response enhancer, coupled to the termination voltage regulator, is utilized for enhancing transient response of the termination voltage regulator, including a first enhancement circuit for sensing a first signal associated with the first switching unit and enabling a first control terminal of the first switching unit to be at a first voltage in response to the first signal in a sinking mode; and a second enhancement circuit for sensing a second signal associated with the second switching unit and enabling a second control terminal of the second switching unit to be at a second voltage in response to the second signal in a sourcing mode.

Abstract: A system includes a current mirror coupled to a first transistor, the first transistor includes a first gate, a first current terminal, and a second current terminal, a controller coupled to the current mirror and a converter, the controller is to output a delayed signal for a second transistor, the second transistor being a part of the converter, and a source voltage coupled to the current mirror.

Abstract: Aspects of the invention include a circuit having a two-stage amplifier coupled to a transistor array and to a comparator, the transistor array being configured to provide an output to a load, the transistor array including transistors. The circuit includes a controller coupled to the comparator and to the transistor array, the two-stage amplifier being configured to modulate a current density in the transistor array via gate terminals of the transistors, wherein, by using the comparator and the controller, the two-stage amplifier is configured to modulate a number of the transistors that are to couple to the load.

Abstract: Disclosed are a series regulator and electronic equipment. The series regulator includes a first amplifier that drives a first transistor connected between a power supply and a load, a second amplifier that drives a second transistor connected in parallel to the first transistor, an amplifier control circuit that controls whether or not operation of the first amplifier is possible according to the load, and a first overcurrent protection circuit that limits a first output current flowing in the first transistor to a first overcurrent set value or smaller. The first overcurrent protection circuit carries out variable control of the first overcurrent set value according to a second output current flowing in the second transistor. The electronic equipment includes the series regulator and a load that receives power supply from the series regulator and operates.

Abstract: High-resolution switched digital regulators are disclosed having fast cross corner and variable temperature response, with constrained ripple. The strength of the power transistors utilized by the regulator are adjusted to control the current delivered to the load. The regulators utilize a slow control loop in parallel with a primary fast switching loop. The slow loop uses the switching signal of the primary loop to estimate the load current and set the power transistor size accordingly.

Abstract: For example, a linear power supply includes an output transistor connected between an input terminal of an input voltage and an output terminal of an output voltage, an internal power supply configured to step down the input voltage to generate a predetermined internal power supply voltage, a reference voltage generator configured to generate a predetermined reference voltage from the internal power supply voltage, an amplifier configured to generate a drive signal for the output transistor such that a feedback voltage in accordance with the output voltage is equal to the reference voltage, a drive current generator configured to generate a drive current for the amplifier, and a drive current controller configured to detect a variation of the internal power supply voltage to variably control the drive current.

Abstract: A power converter can be implemented as a series of power conversion stages, including a wireless power conversion stage. In typical embodiments, the power converter receives power directly from mains voltage and outputs power to a battery within an electronic device. A transmitter side of the power converter converts alternating current received from a power source (e.g., mains voltage) to an alternating current suitable for applying to a primary coil of the wireless power conversion stage of the power converter.

Abstract: A voltage detector includes a first voltage detection circuit, a second voltage detection circuit, and a voltage divider circuit having a first node for providing a first divided voltage, and a second node for providing a second divided voltage. The second voltage detection circuit has a comparator circuit including a first input end connected to the first node and a second input end connected to a reference voltage. The first voltage detection circuit has a first NMOS transistor including a gate to which the second divided voltage is applied, and a constant current source with one end connected to the first NMOS transistor. The first NMOS transistor is configured to turn on in response to the second divided voltage being higher than a second threshold voltage and turn off in response to the second divided voltage being lower than the second threshold voltage.

Abstract: A regulator configured to provide at an output node a load current at an output voltage is described. The regulator comprises a pass transistor for providing the load current at the output node. Furthermore, the regulator comprises feedback means for deriving a feedback voltage from the output voltage at the output node. In addition, the regulator comprises a differential amplifier configured to control the pass transistor in dependence of the feedback voltage and in dependence of a reference voltage. The regulator further comprises compensation means configured to determine a sensed current which is indicative of the load current at the output node. Furthermore, the compensation means are configured to adjust an operation point of the regulator in dependence of the sensed current and in dependence of a value of a track impedance of a conductive track which links the output node to a load.

Abstract: A current detection circuit includes normally-on-type and a first normally-off-type switching elements with main current paths that are connected in series, and a second normally-off-type switching element that has a source and a gate that are connected to a source and a gate of the first normally-off-type switching element and a drain that is connected to a constant current source, and executes a division process by using drain voltages of the two normally-off-type switching elements.

Abstract: A voltage regulator circuit includes a power supply terminal and a ground terminal, and a differential amplifier coupled between the power supply terminal and the ground terminal. The voltage regulator circuit also includes an output transistor, which includes a gate node coupled to an output node of the differential amplifier to receive a gate voltage and to provide a regulated output voltage at an output node of the output transistor. The differential amplifier is configured to provide the gate voltage based on a differential between a reference voltage and the regulated output voltage. The voltage regulator also includes a compensation capacitance coupled between a virtual ground node in the differential amplifier and either the power supply terminal or the ground terminal and a virtual ground node in the differential amplifier.

Abstract: A voltage regulator circuit may include a first loop that forms a reference signal that substantially does not vary in response to the output voltage, the reference circuit may also be configured to form a control signal that is representative of changes in the reference signal. The voltage regulator circuit may also include a second loop configured to form a value of a control electrode of an output transistor according to the control signal and wherein the output circuit is configured to change a value of the control electrode according to a difference between the output voltage and the reference signal.

Abstract: An electronic circuit includes a differential amplifier, an output stage and a control circuit. The differential produces a signal proportional to a difference between a reference voltage and a voltage that is proportional to the output signal. The output stage includes multiple switchable circuits coupled between a voltage source and the output terminal such that the switching of the circuits changes impedance between the voltage source and the output terminal. The control circuit receives a feedback indicative of the voltage of the output signal and controls the impedance of the multiple switchable circuits such that current flowing out of the voltage source rises piecewise smoothly from power-on to steady state operation of the electronic circuit.

Abstract: A low-dropout (LDO) regulator and an associated method and apparatus are described. The LDO regulator generally includes a first transistor coupled between an input voltage node and an output voltage node of the LDO regulator. The LDO regulator further includes a first amplifier having an output coupled to a gate of the first transistor, wherein a feedback path couples the output voltage node to an input of the first amplifier. The LDO regulator further includes a second amplifier having an output coupled to an enable input of the first amplifier, wherein a voltage-sensing path couples the input voltage node to an input of the second amplifier. The LDO regulator further includes and a second transistor coupled between the gate of the first transistor and a reference potential node, the output of the second amplifier being coupled to a gate of the second transistor.

Abstract: Described is an apparatus which comprises: a first voltage regulator (VR) having a reference input node; and a first multiplexer to provide a reference voltage to the reference input node and operable to select one of at least two different reference voltages as the reference voltage.

Abstract: A semiconductor memory module includes a memory printed circuit board (PCB) that includes first connectors, a second connector, and a third connector configured to be connectable with an external device, memory devices that are mounted on the memory PCB and are connected with the first connectors, and a power management integrated circuit that is mounted on the memory PCB, receives a first voltage through the second connector, generates a second voltage from the first voltage, and supplies the second voltage to the memory devices. The power management integrated circuit adjusts the second voltage depending on a difference between a signal received through the third connector and the second voltage.

Abstract: Various methods and circuital arrangements for protection of a power amplifier from over voltage are presented. According to one aspect, a protection circuit coupled to a varying supply voltage of the power amplifier controls a biasing current to the power amplifier to limit a power dissipation through the power amplifier. An overvoltage protection circuit detects a level of the varying supply voltage and decreases the biasing current as a linear function of an increasing supply voltage once the supply voltage reaches a programmable voltage level. A slope of the linear function can be made programmable. Programmability of the voltage level and the slope can be used to control biasing currents to a plurality of power amplifiers operating at different times and having different requirements in terms of voltage limits and thermal breakdown. According to another aspect a voltage to current converter for use in the overvoltage protection circuit is presented.

Abstract: Apparatus and associated methods relate to providing a piecewise loadline having a number of segments with different slopes and selecting a segment of the piecewise loadline based on an output current of a power supply. In an illustrative example, the piecewise loadline may include a segment that has a negative slope. When the output current is less than a predetermined threshold, the segment with the negative slope may be selected to improve power efficiency. In some embodiments, the piecewise loadline may have several segments with different positive slopes. Different segments may be selected to make the load work in different modes. For example, by selecting an overcurrent loadline, the load (e.g., a processor) may be informed to throttle back its performance. Having a piecewise loadline may allow independent optimization of the loadline resistances, voltage thresholds, and current limits.

Abstract: An electronic device includes a voltage regulator circuit having a power NFET coupled between an upper supply voltage and a pre-regulator output node and a current source coupled in series with a diode element between the upper supply voltage and a lower supply voltage. A gate of the power NFET is coupled to a first node between the current source and a diode element. A bypass circuit includes a power PFET coupled between the upper supply voltage and the pre-regulator output node. A comparison circuit is coupled to turn the bypass circuit off when the upper supply voltage is greater than a regulation threshold voltage.

Abstract: A voltage regulator with a load line circuit is disclosed. The load line circuit is configured to receive a sensed voltage corresponding to an output current of the voltage regulator. The load line circuit is further configured to generate a complex (e.g., nonlinear) load line voltage that is combined with the output voltage of the voltage regulator and compared with a set voltage of the voltage regulator to produce an error signal. The error signal is used as feedback for the voltage regulator so that the output voltage of the voltage regulator can droop by a particular amount corresponding to a particular output current of the voltage regulator. The disclosed analog approach requires neither clock signals nor digital circuitry and utilizes a parallel topology that allows the disclosed approach to be fast and energy efficient.

Abstract: A control device for an electromagnetic drive of a switchgear includes a plurality of power supply units, each of which is configured to provide, in a specified input voltage range in each case, electrical power that is sufficient for operating the electromagnetic drive: The control device is configured to automatically control the use of the power supply units for operating the electromagnetic drive on the basis of an input voltage of the control device.

Abstract: An apparatus and method for detecting transient voltage at an electrical component of a circuit board is provided. The apparatus including a circuit including a comparator and a latch, wherein a first input of the comparator is electrically coupled to the electrical component, and the comparator receives a threshold voltage at a second input, where the comparator outputs either a high signal or a low signal in response to both the first input and the second input, and an output of the comparator is electrically coupled to an input of the latch such that the latch outputs a high signal in response to receiving a high signal from the comparator, and an indicator electrically coupled to an output of the latch, and where the apparatus is mounted non-permanently to the circuit board to provide a non-permanent electrical coupling between the comparator and the electrical component.

Abstract: According to an aspect, a low dropout (LDO) voltage regulator includes a differential amplifier, a pass transistor coupled to an output of the differential amplifier, where the pass transistor is configured to provide an output voltage of the LDO voltage regulator, and a soft-start circuit coupled to the differential amplifier. The soft-start circuit is configured to adjust a soft-start driving signal to control a slope of the output voltage based on the output voltage during a start-up operation of the LDO voltage regulator.

Abstract: A linear regulator for applications with low area constraint resulting in limited load decoupling capacitance that introduces a compensating zero in the regulator loop to counteract the loss of phase margin and further introduces a feed-forward noise cancellation path operating over a wide frequency range covering a first package resonance frequency. The feed-forward path has low power consumption and improves the power-supply rejection ratio.

Abstract: An integrated circuit (IC) comprises an output and a voltage regulator. The voltage regulator comprises an amplifier having a first input coupled to a reference voltage source and a second input coupled to the output, a first resistor coupled to the output and coupled to a ground terminal, a metal oxide semiconductor field effect transistor (MOSFET) having a gate coupled to an output of the amplifier and a drain coupled to the output, and a second resistor coupled to a source of the MOSFET and coupled to the ground terminal.

Abstract: A low dropout (LDO) regulating device includes a regulator and a pre-charger. The regulator is configured to adjust an output voltage provided to an output node in accordance with a voltage difference between a first reference voltage and a feedback voltage on a feedback node, wherein the feedback node is coupled to the output node. The pre-charger is electrically connected to the regulator, and is electrically connected to the feedback node for charge sharing.

Abstract: A voltage regulator and a method for regulating an output voltage are presented. The voltage regulator includes a frequency compensation circuit having a first capacitor coupled to a capacitance multiplier. The capacitance multiplier has a second capacitor coupled to a voltage amplifier. The voltage amplifier amplifies a first voltage that is a function of the output voltage. The advantage of this regulator and method is that it allows increasing the total capacitance of the frequency compensation circuit without unduly increasing the size of the regulator. Another advantage is the allowance of changing the amplification factor without affecting the DC gain.

Abstract: A low dropout, LDO, voltage regulator comprising: an LDO input configured to receive an input voltage signal; an LDO output configured to output an output voltage signal; an error amplifying circuit, which is configured to receive a reference signal and a feedback signal associated with the output voltage signal, the error amplifying circuit being further configured to output an error signal; an output stage, which is configured to receive the error signal and output a control signal; and an output device, which is connected to the LDO input and configured to provide the output voltage signal and which is controlled by the control signal for regulating the output voltage signal; wherein the output stage is connected to the input voltage for receiving an adaptive bias current.

Abstract: A power converter comprises an inductor coil whose first pole is connected to an input terminal of the power converter, a controllable switch between the ground and a second pole of the inductor coil, a first unidirectionally conductive component providing a path for electric current from the inductor coil towards an output terminal of the power converter when the controllable switch is non-conductive, and an over-current protector at the output terminal. The power converter comprises a second unidirectionally conductive component for conducting electric current from the input terminal to the over-current protector in a fault situation where voltage at the output terminal is smaller than voltage at the input terminal. Thus, the second unidirectionally conductive component constitutes a low-inductance bypass route for fault current and enables the over-current protector to react fast to a fault situation.

Abstract: Generally, this disclosure relates to methods of prioritizing or directing available power to a main device, such as a temperature-stabilized and/or temperature-controlled storage container. In an embodiment, the method may include measuring electrical power available from a solar photovoltaic module array that is electrically coupled to the main device, and modulating the electrical power drawn by the main device based on the available electrical power. Available power unused by the main device may be diverted to one or more secondary devices.